xref: /linux/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1b84bd223SGeert Uytterhoeven// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2b84bd223SGeert Uytterhoeven/*
3b84bd223SGeert Uytterhoeven * Device Tree Source for the common parts shared by the White Hawk CPU and
4b84bd223SGeert Uytterhoeven * White Hawk Single boards
5b84bd223SGeert Uytterhoeven *
6b84bd223SGeert Uytterhoeven * Copyright (C) 2022 Renesas Electronics Corp.
7b84bd223SGeert Uytterhoeven */
8b84bd223SGeert Uytterhoeven
9b84bd223SGeert Uytterhoeven#include <dt-bindings/gpio/gpio.h>
10b84bd223SGeert Uytterhoeven#include <dt-bindings/input/input.h>
11b84bd223SGeert Uytterhoeven#include <dt-bindings/leds/common.h>
12b84bd223SGeert Uytterhoeven
13b84bd223SGeert Uytterhoeven/ {
14b84bd223SGeert Uytterhoeven	aliases {
15b84bd223SGeert Uytterhoeven		ethernet0 = &avb0;
16e9e6ed5aSWolfram Sang		i2c0 = &i2c0;
17e9e6ed5aSWolfram Sang		i2c1 = &i2c1;
18e9e6ed5aSWolfram Sang		i2c2 = &i2c2;
19e9e6ed5aSWolfram Sang		i2c3 = &i2c3;
20e9e6ed5aSWolfram Sang		i2c4 = &i2c4;
21e9e6ed5aSWolfram Sang		i2c5 = &i2c5;
22b84bd223SGeert Uytterhoeven		serial0 = &hscif0;
23b84bd223SGeert Uytterhoeven	};
24b84bd223SGeert Uytterhoeven
25b84bd223SGeert Uytterhoeven	chosen {
26b84bd223SGeert Uytterhoeven		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
27b84bd223SGeert Uytterhoeven		stdout-path = "serial0:921600n8";
28b84bd223SGeert Uytterhoeven	};
29b84bd223SGeert Uytterhoeven
30b84bd223SGeert Uytterhoeven	sn65dsi86_refclk: clk-x6 {
31b84bd223SGeert Uytterhoeven		compatible = "fixed-clock";
32b84bd223SGeert Uytterhoeven		#clock-cells = <0>;
33b84bd223SGeert Uytterhoeven		clock-frequency = <38400000>;
34b84bd223SGeert Uytterhoeven	};
35b84bd223SGeert Uytterhoeven
36b84bd223SGeert Uytterhoeven	keys {
37b84bd223SGeert Uytterhoeven		compatible = "gpio-keys";
38b84bd223SGeert Uytterhoeven
39b84bd223SGeert Uytterhoeven		pinctrl-0 = <&keys_pins>;
40b84bd223SGeert Uytterhoeven		pinctrl-names = "default";
41b84bd223SGeert Uytterhoeven
42b84bd223SGeert Uytterhoeven		key-1 {
43b84bd223SGeert Uytterhoeven			gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
44b84bd223SGeert Uytterhoeven			linux,code = <KEY_1>;
45b84bd223SGeert Uytterhoeven			label = "SW47";
46b84bd223SGeert Uytterhoeven			wakeup-source;
47b84bd223SGeert Uytterhoeven			debounce-interval = <20>;
48b84bd223SGeert Uytterhoeven		};
49b84bd223SGeert Uytterhoeven
50b84bd223SGeert Uytterhoeven		key-2 {
51b84bd223SGeert Uytterhoeven			gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
52b84bd223SGeert Uytterhoeven			linux,code = <KEY_2>;
53b84bd223SGeert Uytterhoeven			label = "SW48";
54b84bd223SGeert Uytterhoeven			wakeup-source;
55b84bd223SGeert Uytterhoeven			debounce-interval = <20>;
56b84bd223SGeert Uytterhoeven		};
57b84bd223SGeert Uytterhoeven
58b84bd223SGeert Uytterhoeven		key-3 {
59b84bd223SGeert Uytterhoeven			gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
60b84bd223SGeert Uytterhoeven			linux,code = <KEY_3>;
61b84bd223SGeert Uytterhoeven			label = "SW49";
62b84bd223SGeert Uytterhoeven			wakeup-source;
63b84bd223SGeert Uytterhoeven			debounce-interval = <20>;
64b84bd223SGeert Uytterhoeven		};
65b84bd223SGeert Uytterhoeven	};
66b84bd223SGeert Uytterhoeven
67b84bd223SGeert Uytterhoeven	leds {
68b84bd223SGeert Uytterhoeven		compatible = "gpio-leds";
69b84bd223SGeert Uytterhoeven
70b84bd223SGeert Uytterhoeven		led-1 {
71b84bd223SGeert Uytterhoeven			gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
72b84bd223SGeert Uytterhoeven			color = <LED_COLOR_ID_GREEN>;
73b84bd223SGeert Uytterhoeven			function = LED_FUNCTION_INDICATOR;
74b84bd223SGeert Uytterhoeven			function-enumerator = <1>;
75b84bd223SGeert Uytterhoeven		};
76b84bd223SGeert Uytterhoeven
77b84bd223SGeert Uytterhoeven		led-2 {
78b84bd223SGeert Uytterhoeven			gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
79b84bd223SGeert Uytterhoeven			color = <LED_COLOR_ID_GREEN>;
80b84bd223SGeert Uytterhoeven			function = LED_FUNCTION_INDICATOR;
81b84bd223SGeert Uytterhoeven			function-enumerator = <2>;
82b84bd223SGeert Uytterhoeven		};
83b84bd223SGeert Uytterhoeven
84b84bd223SGeert Uytterhoeven		led-3 {
85b84bd223SGeert Uytterhoeven			gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
86b84bd223SGeert Uytterhoeven			color = <LED_COLOR_ID_GREEN>;
87b84bd223SGeert Uytterhoeven			function = LED_FUNCTION_INDICATOR;
88b84bd223SGeert Uytterhoeven			function-enumerator = <3>;
89b84bd223SGeert Uytterhoeven		};
90b84bd223SGeert Uytterhoeven	};
91b84bd223SGeert Uytterhoeven
92b84bd223SGeert Uytterhoeven	memory@48000000 {
93b84bd223SGeert Uytterhoeven		device_type = "memory";
94b84bd223SGeert Uytterhoeven		/* first 128MB is reserved for secure area. */
95b84bd223SGeert Uytterhoeven		reg = <0x0 0x48000000 0x0 0x78000000>;
96b84bd223SGeert Uytterhoeven	};
97b84bd223SGeert Uytterhoeven
98b84bd223SGeert Uytterhoeven	memory@480000000 {
99b84bd223SGeert Uytterhoeven		device_type = "memory";
100b84bd223SGeert Uytterhoeven		reg = <0x4 0x80000000 0x0 0x80000000>;
101b84bd223SGeert Uytterhoeven	};
102b84bd223SGeert Uytterhoeven
103b84bd223SGeert Uytterhoeven	memory@600000000 {
104b84bd223SGeert Uytterhoeven		device_type = "memory";
105b84bd223SGeert Uytterhoeven		reg = <0x6 0x00000000 0x1 0x00000000>;
106b84bd223SGeert Uytterhoeven	};
107b84bd223SGeert Uytterhoeven
108b84bd223SGeert Uytterhoeven	mini-dp-con {
109b84bd223SGeert Uytterhoeven		compatible = "dp-connector";
110b84bd223SGeert Uytterhoeven		label = "CN5";
111b84bd223SGeert Uytterhoeven		type = "mini";
112b84bd223SGeert Uytterhoeven
113b84bd223SGeert Uytterhoeven		port {
114b84bd223SGeert Uytterhoeven			mini_dp_con_in: endpoint {
115b84bd223SGeert Uytterhoeven				remote-endpoint = <&sn65dsi86_out>;
116b84bd223SGeert Uytterhoeven			};
117b84bd223SGeert Uytterhoeven		};
118b84bd223SGeert Uytterhoeven	};
119b84bd223SGeert Uytterhoeven
120*6ca537aaSYoshihiro Shimoda	pcie_clk: clk-9fgv0841-pci {
121*6ca537aaSYoshihiro Shimoda		compatible = "fixed-clock";
122*6ca537aaSYoshihiro Shimoda		clock-frequency = <100000000>;
123*6ca537aaSYoshihiro Shimoda		#clock-cells = <0>;
124*6ca537aaSYoshihiro Shimoda	};
125*6ca537aaSYoshihiro Shimoda
126b84bd223SGeert Uytterhoeven	reg_1p2v: regulator-1p2v {
127b84bd223SGeert Uytterhoeven		compatible = "regulator-fixed";
128b84bd223SGeert Uytterhoeven		regulator-name = "fixed-1.2V";
129b84bd223SGeert Uytterhoeven		regulator-min-microvolt = <1200000>;
130b84bd223SGeert Uytterhoeven		regulator-max-microvolt = <1200000>;
131b84bd223SGeert Uytterhoeven		regulator-boot-on;
132b84bd223SGeert Uytterhoeven		regulator-always-on;
133b84bd223SGeert Uytterhoeven	};
134b84bd223SGeert Uytterhoeven
135b84bd223SGeert Uytterhoeven	reg_1p8v: regulator-1p8v {
136b84bd223SGeert Uytterhoeven		compatible = "regulator-fixed";
137b84bd223SGeert Uytterhoeven		regulator-name = "fixed-1.8V";
138b84bd223SGeert Uytterhoeven		regulator-min-microvolt = <1800000>;
139b84bd223SGeert Uytterhoeven		regulator-max-microvolt = <1800000>;
140b84bd223SGeert Uytterhoeven		regulator-boot-on;
141b84bd223SGeert Uytterhoeven		regulator-always-on;
142b84bd223SGeert Uytterhoeven	};
143b84bd223SGeert Uytterhoeven
144b84bd223SGeert Uytterhoeven	reg_3p3v: regulator-3p3v {
145b84bd223SGeert Uytterhoeven		compatible = "regulator-fixed";
146b84bd223SGeert Uytterhoeven		regulator-name = "fixed-3.3V";
147b84bd223SGeert Uytterhoeven		regulator-min-microvolt = <3300000>;
148b84bd223SGeert Uytterhoeven		regulator-max-microvolt = <3300000>;
149b84bd223SGeert Uytterhoeven		regulator-boot-on;
150b84bd223SGeert Uytterhoeven		regulator-always-on;
151b84bd223SGeert Uytterhoeven	};
152b84bd223SGeert Uytterhoeven};
153b84bd223SGeert Uytterhoeven
154b84bd223SGeert Uytterhoeven&avb0 {
155b84bd223SGeert Uytterhoeven	pinctrl-0 = <&avb0_pins>;
156b84bd223SGeert Uytterhoeven	pinctrl-names = "default";
15754bf0c27SNiklas Söderlund	phy-handle = <&avb0_phy>;
158b84bd223SGeert Uytterhoeven	tx-internal-delay-ps = <2000>;
159b84bd223SGeert Uytterhoeven	status = "okay";
160b84bd223SGeert Uytterhoeven
16154bf0c27SNiklas Söderlund	mdio {
16254bf0c27SNiklas Söderlund		#address-cells = <1>;
16354bf0c27SNiklas Söderlund		#size-cells = <0>;
16454bf0c27SNiklas Söderlund
16554bf0c27SNiklas Söderlund		avb0_phy: ethernet-phy@0 {
166b84bd223SGeert Uytterhoeven			compatible = "ethernet-phy-id0022.1622",
167b84bd223SGeert Uytterhoeven				     "ethernet-phy-ieee802.3-c22";
168b84bd223SGeert Uytterhoeven			rxc-skew-ps = <1500>;
169b84bd223SGeert Uytterhoeven			reg = <0>;
170b84bd223SGeert Uytterhoeven			interrupt-parent = <&gpio7>;
171b84bd223SGeert Uytterhoeven			interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
172b84bd223SGeert Uytterhoeven			reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
173b84bd223SGeert Uytterhoeven		};
174b84bd223SGeert Uytterhoeven	};
17554bf0c27SNiklas Söderlund};
176b84bd223SGeert Uytterhoeven
177b84bd223SGeert Uytterhoeven&dsi0 {
178b84bd223SGeert Uytterhoeven	status = "okay";
179b84bd223SGeert Uytterhoeven
180b84bd223SGeert Uytterhoeven	ports {
181b84bd223SGeert Uytterhoeven		port@1 {
182b84bd223SGeert Uytterhoeven			dsi0_out: endpoint {
183b84bd223SGeert Uytterhoeven				remote-endpoint = <&sn65dsi86_in>;
184b84bd223SGeert Uytterhoeven				data-lanes = <1 2 3 4>;
185b84bd223SGeert Uytterhoeven			};
186b84bd223SGeert Uytterhoeven		};
187b84bd223SGeert Uytterhoeven	};
188b84bd223SGeert Uytterhoeven};
189b84bd223SGeert Uytterhoeven
190b84bd223SGeert Uytterhoeven&du {
191b84bd223SGeert Uytterhoeven	status = "okay";
192b84bd223SGeert Uytterhoeven};
193b84bd223SGeert Uytterhoeven
194b84bd223SGeert Uytterhoeven&extal_clk {
195b84bd223SGeert Uytterhoeven	clock-frequency = <16666666>;
196b84bd223SGeert Uytterhoeven};
197b84bd223SGeert Uytterhoeven
198b84bd223SGeert Uytterhoeven&extalr_clk {
199b84bd223SGeert Uytterhoeven	clock-frequency = <32768>;
200b84bd223SGeert Uytterhoeven};
201b84bd223SGeert Uytterhoeven
202b84bd223SGeert Uytterhoeven&hscif0 {
203b84bd223SGeert Uytterhoeven	pinctrl-0 = <&hscif0_pins>;
204b84bd223SGeert Uytterhoeven	pinctrl-names = "default";
205b84bd223SGeert Uytterhoeven
206b84bd223SGeert Uytterhoeven	status = "okay";
207b84bd223SGeert Uytterhoeven};
208b84bd223SGeert Uytterhoeven
209b84bd223SGeert Uytterhoeven&i2c0 {
210b84bd223SGeert Uytterhoeven	pinctrl-0 = <&i2c0_pins>;
211b84bd223SGeert Uytterhoeven	pinctrl-names = "default";
212b84bd223SGeert Uytterhoeven
213b84bd223SGeert Uytterhoeven	status = "okay";
214b84bd223SGeert Uytterhoeven	clock-frequency = <400000>;
215b84bd223SGeert Uytterhoeven
216b84bd223SGeert Uytterhoeven	io_expander_a: gpio@20 {
217b84bd223SGeert Uytterhoeven		compatible = "onnn,pca9654";
218b84bd223SGeert Uytterhoeven		reg = <0x20>;
219b84bd223SGeert Uytterhoeven		interrupt-parent = <&gpio0>;
220b84bd223SGeert Uytterhoeven		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
221b84bd223SGeert Uytterhoeven		gpio-controller;
222b84bd223SGeert Uytterhoeven		#gpio-cells = <2>;
223b84bd223SGeert Uytterhoeven		interrupt-controller;
224b84bd223SGeert Uytterhoeven		#interrupt-cells = <2>;
225b84bd223SGeert Uytterhoeven	};
226b84bd223SGeert Uytterhoeven
227b84bd223SGeert Uytterhoeven	eeprom@50 {
228b84bd223SGeert Uytterhoeven		compatible = "rohm,br24g01", "atmel,24c01";
229b84bd223SGeert Uytterhoeven		label = "cpu-board";
230b84bd223SGeert Uytterhoeven		reg = <0x50>;
231b84bd223SGeert Uytterhoeven		pagesize = <8>;
232b84bd223SGeert Uytterhoeven	};
233b84bd223SGeert Uytterhoeven};
234b84bd223SGeert Uytterhoeven
235b84bd223SGeert Uytterhoeven&i2c1 {
236b84bd223SGeert Uytterhoeven	pinctrl-0 = <&i2c1_pins>;
237b84bd223SGeert Uytterhoeven	pinctrl-names = "default";
238b84bd223SGeert Uytterhoeven
239b84bd223SGeert Uytterhoeven	status = "okay";
240b84bd223SGeert Uytterhoeven	clock-frequency = <400000>;
241b84bd223SGeert Uytterhoeven
242b84bd223SGeert Uytterhoeven	bridge@2c {
243b84bd223SGeert Uytterhoeven		compatible = "ti,sn65dsi86";
244b84bd223SGeert Uytterhoeven		reg = <0x2c>;
245b84bd223SGeert Uytterhoeven
246b84bd223SGeert Uytterhoeven		clocks = <&sn65dsi86_refclk>;
247b84bd223SGeert Uytterhoeven		clock-names = "refclk";
248b84bd223SGeert Uytterhoeven
249b84bd223SGeert Uytterhoeven		interrupt-parent = <&intc_ex>;
250b84bd223SGeert Uytterhoeven		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
251b84bd223SGeert Uytterhoeven
252b84bd223SGeert Uytterhoeven		enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
253b84bd223SGeert Uytterhoeven
254b84bd223SGeert Uytterhoeven		vccio-supply = <&reg_1p8v>;
255b84bd223SGeert Uytterhoeven		vpll-supply = <&reg_1p8v>;
256b84bd223SGeert Uytterhoeven		vcca-supply = <&reg_1p2v>;
257b84bd223SGeert Uytterhoeven		vcc-supply = <&reg_1p2v>;
258b84bd223SGeert Uytterhoeven
259b84bd223SGeert Uytterhoeven		ports {
260b84bd223SGeert Uytterhoeven			#address-cells = <1>;
261b84bd223SGeert Uytterhoeven			#size-cells = <0>;
262b84bd223SGeert Uytterhoeven
263b84bd223SGeert Uytterhoeven			port@0 {
264b84bd223SGeert Uytterhoeven				reg = <0>;
265b84bd223SGeert Uytterhoeven				sn65dsi86_in: endpoint {
266b84bd223SGeert Uytterhoeven					remote-endpoint = <&dsi0_out>;
267b84bd223SGeert Uytterhoeven				};
268b84bd223SGeert Uytterhoeven			};
269b84bd223SGeert Uytterhoeven
270b84bd223SGeert Uytterhoeven			port@1 {
271b84bd223SGeert Uytterhoeven				reg = <1>;
272b84bd223SGeert Uytterhoeven				sn65dsi86_out: endpoint {
273b84bd223SGeert Uytterhoeven					remote-endpoint = <&mini_dp_con_in>;
274b84bd223SGeert Uytterhoeven				};
275b84bd223SGeert Uytterhoeven			};
276b84bd223SGeert Uytterhoeven		};
277b84bd223SGeert Uytterhoeven	};
278b84bd223SGeert Uytterhoeven};
279b84bd223SGeert Uytterhoeven
280b84bd223SGeert Uytterhoeven&mmc0 {
281b84bd223SGeert Uytterhoeven	pinctrl-0 = <&mmc_pins>;
282b84bd223SGeert Uytterhoeven	pinctrl-1 = <&mmc_pins>;
283b84bd223SGeert Uytterhoeven	pinctrl-names = "default", "state_uhs";
284b84bd223SGeert Uytterhoeven
285b84bd223SGeert Uytterhoeven	vmmc-supply = <&reg_3p3v>;
286b84bd223SGeert Uytterhoeven	vqmmc-supply = <&reg_1p8v>;
287b84bd223SGeert Uytterhoeven	mmc-hs200-1_8v;
288b84bd223SGeert Uytterhoeven	mmc-hs400-1_8v;
289b84bd223SGeert Uytterhoeven	bus-width = <8>;
290b84bd223SGeert Uytterhoeven	no-sd;
291b84bd223SGeert Uytterhoeven	no-sdio;
292b84bd223SGeert Uytterhoeven	non-removable;
293b84bd223SGeert Uytterhoeven	full-pwr-cycle-in-suspend;
294b84bd223SGeert Uytterhoeven	status = "okay";
295b84bd223SGeert Uytterhoeven};
296b84bd223SGeert Uytterhoeven
297*6ca537aaSYoshihiro Shimoda&pcie0_clkref {
298*6ca537aaSYoshihiro Shimoda	compatible = "gpio-gate-clock";
299*6ca537aaSYoshihiro Shimoda	clocks = <&pcie_clk>;
300*6ca537aaSYoshihiro Shimoda	enable-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
301*6ca537aaSYoshihiro Shimoda	/delete-property/ clock-frequency;
302*6ca537aaSYoshihiro Shimoda};
303*6ca537aaSYoshihiro Shimoda
304*6ca537aaSYoshihiro Shimoda&pciec0 {
305*6ca537aaSYoshihiro Shimoda	reset-gpio = <&io_expander_a 0 GPIO_ACTIVE_LOW>;
306*6ca537aaSYoshihiro Shimoda	status = "okay";
307*6ca537aaSYoshihiro Shimoda};
308*6ca537aaSYoshihiro Shimoda
309b84bd223SGeert Uytterhoeven&pfc {
310b84bd223SGeert Uytterhoeven	pinctrl-0 = <&scif_clk_pins>;
311b84bd223SGeert Uytterhoeven	pinctrl-names = "default";
312b84bd223SGeert Uytterhoeven
313b84bd223SGeert Uytterhoeven	avb0_pins: avb0 {
314b84bd223SGeert Uytterhoeven		mux {
315b84bd223SGeert Uytterhoeven			groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
316b84bd223SGeert Uytterhoeven				 "avb0_txcrefclk";
317b84bd223SGeert Uytterhoeven			function = "avb0";
318b84bd223SGeert Uytterhoeven		};
319b84bd223SGeert Uytterhoeven
320b84bd223SGeert Uytterhoeven		pins_mdio {
321b84bd223SGeert Uytterhoeven			groups = "avb0_mdio";
322b84bd223SGeert Uytterhoeven			drive-strength = <21>;
323b84bd223SGeert Uytterhoeven		};
324b84bd223SGeert Uytterhoeven
325b84bd223SGeert Uytterhoeven		pins_mii {
326b84bd223SGeert Uytterhoeven			groups = "avb0_rgmii";
327b84bd223SGeert Uytterhoeven			drive-strength = <21>;
328b84bd223SGeert Uytterhoeven		};
329b84bd223SGeert Uytterhoeven
330b84bd223SGeert Uytterhoeven	};
331b84bd223SGeert Uytterhoeven
332b84bd223SGeert Uytterhoeven	hscif0_pins: hscif0 {
333b84bd223SGeert Uytterhoeven		groups = "hscif0_data";
334b84bd223SGeert Uytterhoeven		function = "hscif0";
335b84bd223SGeert Uytterhoeven	};
336b84bd223SGeert Uytterhoeven
337b84bd223SGeert Uytterhoeven	i2c0_pins: i2c0 {
338b84bd223SGeert Uytterhoeven		groups = "i2c0";
339b84bd223SGeert Uytterhoeven		function = "i2c0";
340b84bd223SGeert Uytterhoeven	};
341b84bd223SGeert Uytterhoeven
342b84bd223SGeert Uytterhoeven	i2c1_pins: i2c1 {
343b84bd223SGeert Uytterhoeven		groups = "i2c1";
344b84bd223SGeert Uytterhoeven		function = "i2c1";
345b84bd223SGeert Uytterhoeven	};
346b84bd223SGeert Uytterhoeven
347b84bd223SGeert Uytterhoeven	keys_pins: keys {
348b84bd223SGeert Uytterhoeven		pins = "GP_5_0", "GP_5_1", "GP_5_2";
349b84bd223SGeert Uytterhoeven		bias-pull-up;
350b84bd223SGeert Uytterhoeven	};
351b84bd223SGeert Uytterhoeven
352b84bd223SGeert Uytterhoeven	mmc_pins: mmc {
353b84bd223SGeert Uytterhoeven		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
354b84bd223SGeert Uytterhoeven		function = "mmc";
355b84bd223SGeert Uytterhoeven		power-source = <1800>;
356b84bd223SGeert Uytterhoeven	};
357b84bd223SGeert Uytterhoeven
358b84bd223SGeert Uytterhoeven	qspi0_pins: qspi0 {
359b84bd223SGeert Uytterhoeven		groups = "qspi0_ctrl", "qspi0_data4";
360b84bd223SGeert Uytterhoeven		function = "qspi0";
361b84bd223SGeert Uytterhoeven	};
362b84bd223SGeert Uytterhoeven
363b84bd223SGeert Uytterhoeven	scif_clk_pins: scif_clk {
364b84bd223SGeert Uytterhoeven		groups = "scif_clk";
365b84bd223SGeert Uytterhoeven		function = "scif_clk";
366b84bd223SGeert Uytterhoeven	};
367b84bd223SGeert Uytterhoeven};
368b84bd223SGeert Uytterhoeven
369b84bd223SGeert Uytterhoeven&rpc {
370b84bd223SGeert Uytterhoeven	pinctrl-0 = <&qspi0_pins>;
371b84bd223SGeert Uytterhoeven	pinctrl-names = "default";
372b84bd223SGeert Uytterhoeven
373b84bd223SGeert Uytterhoeven	status = "okay";
374b84bd223SGeert Uytterhoeven
375b84bd223SGeert Uytterhoeven	flash@0 {
376b84bd223SGeert Uytterhoeven		compatible = "spansion,s25fs512s", "jedec,spi-nor";
377b84bd223SGeert Uytterhoeven		reg = <0>;
378b84bd223SGeert Uytterhoeven		spi-max-frequency = <40000000>;
379b84bd223SGeert Uytterhoeven		spi-rx-bus-width = <4>;
380b84bd223SGeert Uytterhoeven
381b84bd223SGeert Uytterhoeven		partitions {
382b84bd223SGeert Uytterhoeven			compatible = "fixed-partitions";
383b84bd223SGeert Uytterhoeven			#address-cells = <1>;
384b84bd223SGeert Uytterhoeven			#size-cells = <1>;
385b84bd223SGeert Uytterhoeven
386b84bd223SGeert Uytterhoeven			boot@0 {
387b84bd223SGeert Uytterhoeven				reg = <0x0 0x1200000>;
388b84bd223SGeert Uytterhoeven				read-only;
389b84bd223SGeert Uytterhoeven			};
390b84bd223SGeert Uytterhoeven			user@1200000 {
391b84bd223SGeert Uytterhoeven				reg = <0x1200000 0x2e00000>;
392b84bd223SGeert Uytterhoeven			};
393b84bd223SGeert Uytterhoeven		};
394b84bd223SGeert Uytterhoeven	};
395b84bd223SGeert Uytterhoeven};
396b84bd223SGeert Uytterhoeven
397b84bd223SGeert Uytterhoeven&rwdt {
398b84bd223SGeert Uytterhoeven	timeout-sec = <60>;
399b84bd223SGeert Uytterhoeven	status = "okay";
400b84bd223SGeert Uytterhoeven};
401b84bd223SGeert Uytterhoeven
402b84bd223SGeert Uytterhoeven&scif_clk {
403b84bd223SGeert Uytterhoeven	clock-frequency = <24000000>;
404b84bd223SGeert Uytterhoeven};
405