| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | mediatek,mt7621-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/mediatek,mt7621-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek MT7621 SoC GPIO controller
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
15 We load one GPIO controller instance per bank. Also the GPIO controller can receive
21 pattern: "^gpio@[0-9a-f]+$"
24 const: mediatek,mt7621-gpio
29 "#gpio-cells":
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| /linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | mediatek,mt7530.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | mediatek,mt7621-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7621-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7621 Pin Controller
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
14 MediaTek MT7621 pin controller for MT7621 SoC.
20 const: ralink,mt7621-pinctrl
23 '-pins$':
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | mediatek,mt7621-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/mediatek,mt7621-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7621 PCIe controller
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
13 MediaTek MT7621 PCIe subsys supports a single Root Complex (RC)
14 with 3 Root Ports. Each Root Port supports a Gen1 1-lane Link
16 MT7621 PCIe HOST Topology
18 .-------.
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| /linux/arch/mips/boot/dts/ralink/ |
| H A D | mt7621-tplink-hc220-g5-v1.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /dts-v1/;
4 #include "mt7621.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
11 compatible = "tplink,hc220-g5-v1", "mediatek,mt7621-soc";
12 model = "TP-Link HC220 G5 v1";
23 gpio-keys {
24 compatible = "gpio-keys";
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| H A D | mt7621-gnubee-gb-pc1.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /dts-v1/;
4 #include "mt7621.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
10 compatible = "gnubee,gb-pc1", "mediatek,mt7621-soc";
11 model = "GnuBee GB-PC1";
23 gpio-keys {
24 compatible = "gpio-keys";
26 key-reset {
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| H A D | mt7621-gnubee-gb-pc2.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /dts-v1/;
4 #include "mt7621.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
10 compatible = "gnubee,gb-pc2", "mediatek,mt7621-soc";
11 model = "GnuBee GB-PC2";
23 gpio-keys {
24 compatible = "gpio-keys";
26 key-reset {
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| /linux/Documentation/devicetree/bindings/bus/ |
| H A D | palmbus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
19 pattern: "^palmbus(@[0-9a-f]+)?$"
21 "#address-cells":
24 "#size-cells":
36 # All other properties should be child nodes with unit-address and 'reg'
37 "@[0-9a-f]+$":
45 - reg
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| /linux/drivers/gpio/ |
| H A D | gpio-mt7621.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
8 #include <linux/gpio/driver.h>
43 * struct mtk - state container for
45 * separate gpio-chip each one with its
50 * @gc_map: array of the gpio chips
68 struct gpio_chip *gc = &rg->chip; in mtk_gpio_w32()
71 offset = (rg->bank * GPIO_BANK_STRIDE) + offset; in mtk_gpio_w32()
72 gc->write_reg(mtk->base + offset, val); in mtk_gpio_w32()
78 struct gpio_chip *gc = &rg->chip; in mtk_gpio_r32()
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| H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 # generic gpio support: platform drivers, dedicated expander chips, etc
4 ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
6 obj-$(CONFIG_GPIOLIB) += gpiolib.o
7 obj-$(CONFIG_GPIOLIB) += gpiolib-devres.o
8 obj-$(CONFIG_GPIOLIB_LEGACY) += gpiolib-legacy.o
9 obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
10 obj-$(CONFIG_GPIO_CDEV) += gpiolib-cdev.o
11 obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
12 obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # GPIO infrastructure and drivers
7 bool "GPIO Support"
9 This enables GPIO support through the generic GPIO library.
11 one or more of the GPIO drivers below.
50 this symbol, but new drivers should use the generic gpio-regmap
54 bool "Debug GPIO calls"
57 Say Y here to add some extra checks and diagnostics to GPIO calls.
60 non-sleeping contexts. They can make bitbanged serial protocols
65 bool "/sys/class/gpio/... (sysfs interface)" if EXPERT
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| /linux/Documentation/devicetree/bindings/net/bluetooth/ |
| H A D | mediatek,bluetooth.txt | 13 - compatible: Must be
14 "mediatek,mt7663u-bluetooth": for MT7663U device
15 "mediatek,mt7668u-bluetooth": for MT7668U device
16 - vcc-supply: Main voltage regulator
18 If the pin controller on the platform can support both pinmux and GPIO
21 - pinctrl-names: Should be "default", "runtime"
22 - pinctrl-0: Should contain UART RXD low when the device is powered up to
24 - pinctrl-1: Should contain UART mode pin ctrl
27 the GPIO control still has to rely on the dedicated GPIO controller such as
28 a legacy MediaTek SoC, MT7621. Please use the below properties.
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| /linux/drivers/pinctrl/mediatek/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
58 bool "MediaTek MT7621 pin control"
141 Say yes here to support pin controller and gpio driver
165 Say yes here to support pin controller and gpio driver
167 In MTK platform, we support virtual gpio and use it to
168 map specific eint which doesn't have real gpio pin.
191 Say yes here to support pin controller and gpio driver
257 Say yes here to support pin controller and gpio driver
259 In MTK platform, we support virtual gpio and use it to
260 map specific eint which doesn't have real gpio pin.
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| /linux/arch/arm64/boot/dts/airoha/ |
| H A D | en7581.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/en7523-clk.h>
6 #include <dt-bindings/reset/airoha,en7581-reset.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
13 reserved-memory {
14 #address-cells = <2>;
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| /linux/drivers/net/dsa/ |
| H A D | mt7530-mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/gpio/consumer.h>
6 #include <linux/pcs/pcs-mtk-lynxi.h>
22 struct mii_bus *bus = priv->bus; in mt7530_regmap_write()
31 ret = bus->write(bus, priv->mdiodev->addr, 0x1f, page); in mt7530_regmap_write()
35 ret = bus->write(bus, priv->mdiodev->addr, r, lo); in mt7530_regmap_write()
39 ret = bus->write(bus, priv->mdiodev->addr, 0x10, hi); in mt7530_regmap_write()
47 struct mii_bus *bus = priv->bus; in mt7530_regmap_read()
54 ret = bus->write(bus, priv->mdiodev->addr, 0x1f, page); in mt7530_regmap_read()
58 lo = bus->read(bus, priv->mdiodev->addr, r); in mt7530_regmap_read()
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| /linux/drivers/i2c/busses/ |
| H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
10 obj-$(CONFIG_I2C_CCGX_UCSI) += i2c-ccgx-ucsi.o
13 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o
14 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o
15 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
16 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
17 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
18 obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o
19 obj-$(CONFIG_I2C_I801) += i2c-i801.o
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 for Cypress CCGx Type-C controller. Individual bus drivers
25 controller is part of the 7101 device, which is an ACPI-compliant
29 will be called i2c-ali1535.
37 controller is part of the 7101 device, which is an ACPI-compliant
41 will be called i2c-ali1563.
51 will be called i2c-ali15x3.
63 will be called i2c-amd756.
73 will be called i2c-amd8111.
83 be called i2c-amd-mp2-pci and i2c-amd-mp2-plat.
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| /linux/drivers/spi/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
69 This enables support for SPI-NAND mode on the Airoha NAND
71 is implemented as a SPI-MEM controller.
107 This enables master mode support for the SPISG (SPI scatter-gather
119 to a single device like spi-nor (nvram), input device controller
178 supports spi-mem interface.
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| H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
6 ccflags-$(CONFIG_SPI_DEBUG) := -DDEBUG
8 # small core, mostly translating board-specific
10 obj-$(CONFIG_SPI_MASTER) += spi.o
11 obj-$(CONFIG_SPI_MEM) += spi-mem.o
12 obj-$(CONFIG_SPI_MUX) += spi-mux.o
13 obj-$(CONFIG_SPI_OFFLOAD) += spi-offload.o
14 obj-$(CONFIG_SPI_SPIDEV) += spidev.o
15 obj-$(CONFIG_SPI_LOOPBACK_TEST) += spi-loopback-test.o
18 obj-$(CONFIG_SPI_AIROHA_SNFI) += spi-airoha-snfi.o
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| /linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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| /linux/drivers/watchdog/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
51 bool "Update boot-enabled watchdog until userspace takes over"
77 bool "Enable watchdog hrtimer-based pretimeouts"
178 to toggle reset line if SoC fails to ping watchdog via GPIO.
198 tristate "ChromeOS EC-based watchdog"
252 tristate "Watchdog device controlled through GPIO-line"
257 controlled through GPIO-line.
280 will be called lenovo-se10-wdt.
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