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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
41 '#gpio-cells':
[all …]
H A Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
21 mpp3 3 gpio, i2c0(sda)
34 mpp16 16 gpio, dram(deccerr), spi0(miso), pcie0(clkreq), i2c1(sda)
37 mpp19 19 gpio, sata1(prsnt) [1], ua0(cts), ua1(rxd), i2c2(sda)
46 mpp27 27 gpio, spi0(cs3), i2c1(sda), sd0(d7), dev(cs2), ge(txclkout)
59 mpp40 40 gpio, i2c1(sda), ua0(rts), sd0(d2), dev(ad6), ge(rxd3)
74 mpp52 52 gpio, pcie0(rstout), tdm(int) [2], audio(sdi) [2], sd0(d6), i2c3(sck)
[all …]
/linux/arch/arc/boot/dts/
H A Dabilis_tb100_dvk.dts1 // SPDX-License-Identifier: GPL-2.0-only
10 /dts-v1/;
29 pinctrl-names = "default";
30 pinctrl-0 = <&pctl_uart0>;
33 phy-mode = "rgmii";
37 i2c-sda-hold-time-ns = <432>;
40 i2c-sda-hold-time-ns = <432>;
43 i2c-sda-hold-time-ns = <432>;
45 i2c3: i2c@ff123000 { label
46 i2c-sda-hold-time-ns = <432>;
[all …]
H A Dabilis_tb101_dvk.dts1 // SPDX-License-Identifier: GPL-2.0-only
10 /dts-v1/;
29 pinctrl-names = "default";
30 pinctrl-0 = <&pctl_uart0>;
33 phy-mode = "rgmii";
37 i2c-sda-hold-time-ns = <432>;
40 i2c-sda-hold-time-ns = <432>;
43 i2c-sda-hold-time-ns = <432>;
45 i2c3: i2c@ff123000 { label
46 i2c-sda-hold-time-ns = <432>;
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7790-lager.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2015-2016 Renesas Electronics Corporation
11 * SSI-AK4643
38 /dts-v1/;
40 #include <dt-bindings/gpio/gpio.h>
41 #include <dt-bindings/input/input.h>
63 stdout-path = "serial0:115200n8";
77 compatible = "gpio-keys";
79 pinctrl-0 = <&keyboard_pins>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
[all …]
H A Dimx8mp-nitrogen-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "boundary,imx8mp-nitrogen-som", "fsl,imx8mp";
13 rfkill-bt {
14 compatible = "rfkill-gpio";
15 label = "rfkill-bluetooth";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_rfkill_bt>;
18 radio-type = "bluetooth";
19 shutdown-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
22 rfkill-wlan {
[all …]
H A Dimx8mp-phycore-fpsc.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
6 #include <dt-bindings/net/ti-dp83867.h>
10 compatible = "phytec,imx8mp-phycore-fpsc", "fsl,imx8mp";
11 model = "PHYTEC phyCORE-i.MX8MP FPSC";
23 reg_usdhc2_vmmc: regulator-usdhc2 {
24 compatible = "regulator-fixed";
25 off-on-delay-us = <12000>;
26 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
27 pinctrl-names = "default";
28 regulator-max-microvolt = <3300000>;
[all …]
H A Dimx8mm-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
[all …]
H A Dimx8mp-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mp-data-modul-edm-sbc", "fsl,imx8mp";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
[all …]
H A Dimx8mp-tqma8mpql-mba8mp-ras314.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright (c) 2023-2024 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
9 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 #include <dt-bindings/pwm/pwm.h>
15 #include "imx8mp-tqma8mpql.dtsi"
18 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MP-RAS314";
[all …]
H A Dimx8mm-phygate-tauri-l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 #include "imx8mm-phycore-som.dtsi"
14 model = "PHYTEC phyGATE-Tauri-L-iMX8MM";
15 compatible = "phytec,imx8mm-phygate-tauri-l",
16 "phytec,imx8mm-phycore-som", "fsl,imx8mm";
19 stdout-path = &uart3;
[all …]
H A Dmba8mx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/net/ti-dp83867.h>
8 /* TQ-Systems GmbH MBa8Mx baseboard */
12 compatible = "pwm-backlight";
14 brightness-levels = <0 4 8 16 32 64 128 255>;
15 default-brightness-level = <7>;
16 power-supply = <&reg_12v>;
17 enable-gpios = <&expander2 2 GPIO_ACTIVE_HIGH>;
22 compatible = "pwm-beeper";
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g044l2-remi-pi.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
17 model = "MYIR Tech Limited Remi Pi MYB-YG2LX-REMI";
18 compatible = "myir,remi-pi", "renesas,r9a07g044l2", "renesas,r9a07g044";
27 i2c3 = &i2c3;
36 stdout-path = "serial0:115200n8";
39 hdmi-out {
40 compatible = "hdmi-connector";
[all …]
H A Drzg2l-smarc-pinfunction.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 pinctrl-0 = <&sound_clk_pins>;
13 pinctrl-names = "default";
20 /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
21 can0-stb-hog {
22 gpio-hog;
24 output-low;
25 line-name = "can0_stb";
[all …]
/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sun50i-h616.c1 // SPDX-License-Identifier: GPL-2.0
15 #include "pinctrl-sunxi.h"
29 SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */
41 SUNXI_FUNCTION(0x4, "i2c1"), /* SDA */
81 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
86 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
493 SUNXI_FUNCTION(0x2, "csi"), /* SDA */
494 SUNXI_FUNCTION(0x5, "i2c2"), /* SDA */
634 SUNXI_FUNCTION(0x5, "i2c4"), /* SDA */
640 SUNXI_FUNCTION(0x5, "i2c3"), /* SCK */
[all …]
H A Dpinctrl-sun9i-a80.c6 * Maxime Ripard <maxime.ripard@free-electrons.com>
18 #include "pinctrl-sunxi.h"
90 SUNXI_FUNCTION(0x2, "gmac"), /* MII-CRS */
102 SUNXI_FUNCTION(0x2, "gmac"), /* RGMII-TXCK / GMII-TXEN */
108 SUNXI_FUNCTION(0x2, "gmac"), /* MII-TXERR */
114 SUNXI_FUNCTION(0x2, "gmac"), /* RGMII-CLKIN / MII-COL */
157 SUNXI_FUNCTION(0x3, "mcsi"), /* SDA */
158 SUNXI_FUNCTION(0x4, "i2c4"), /* SDA */
503 SUNXI_FUNCTION(0x2, "csi"), /* SDA */
504 SUNXI_FUNCTION(0x3, "i2c4"), /* SDA */
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-tqma6b.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com>
7 #include <dt-bindings/gpio/gpio.h>
9 &i2c3 {
10 pinctrl-names = "default", "gpio";
11 pinctrl-0 = <&pinctrl_i2c3>;
12 pinctrl-1 = <&pinctrl_i2c3_recovery>;
13 scl-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
14 sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
15 clock-frequency = <100000>;
[all …]
H A Dimx6qdl-mba6b.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2021 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
10 pinctrl-names = "default";
11 pinctrl-0 = <&pinctrl_enet>;
15 clock-frequency = <100000>;
16 pinctrl-names = "default", "gpio";
17 pinctrl-0 = <&pinctrl_i2c1>;
18 pinctrl-1 = <&pinctrl_i2c1_recovery>;
19 scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
[all …]
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-39x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
40 MPP_VAR_FUNCTION(1, "i2c0", "sda", V_88F6920_PLUS)),
100 MPP_VAR_FUNCTION(7, "i2c1", "sda", V_88F6920_PLUS)),
118 MPP_VAR_FUNCTION(7, "i2c2", "sda", V_88F6920_PLUS)),
164 MPP_VAR_FUNCTION(3, "i2c1", "sda", V_88F6920_PLUS),
223 MPP_VAR_FUNCTION(1, "i2c1", "sda", V_88F6920_PLUS),
310 MPP_VAR_FUNCTION(7, "i2c3", "sck", V_88F6920_PLUS)),
318 MPP_VAR_FUNCTION(7, "i2c3", "sda", V_88F6920_PLUS)),
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h>
13 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstih407-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "st-pincfg.h"
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /* 0-5: PIO_SBC */
18 /* 10-19: PIO_FRONT0 */
31 /* 30-35: PIO_REAR */
38 /* 40-42: PIO_FLASH */
45 pin-controller-sbc@961f080 {
46 #address-cells = <1>;
47 #size-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d27_som1_ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27-SOM1-EK board
10 /dts-v1/;
11 #include "at91-sama5d27_som1.dtsi"
12 #include <dt-bindings/mfd/atmel-flexcom.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
18 …compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "…
25 i2c2 = &i2c3;
29 stdout-path = "serial0:115200n8";
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210-goni.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/input/input.h>
24 i2c3 = &i2c_pmic;
38 pmic_ap_clk: clock-0 {
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
[all …]

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