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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
15 interface external sigma delta modulators to STM32 micro controllers.
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
[all …]
H A Dti,ads1298.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Mike Looijmans <mike.looijmans@topic.nl>
19 - ti,ads1298
24 spi-cpha: true
26 reset-gpios:
29 avdd-supply:
32 symmetric +/- 2.5V, the regulator should report 5V.
34 vref-supply:
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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-tsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
10 - Herve Codina <herve.codina@bootlin.com>
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
14 Its purpose is to route some TDM time-slots to other internal serial
20 - enum:
21 - fsl,mpc885-tsa
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/linux/arch/riscv/boot/dts/starfive/
H A Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
25 stdout-path = "serial0:115200n8";
33 gpio-restart {
34 compatible = "gpio-restart";
39 pwmdac_codec: audio-codec {
40 compatible = "linux,spdif-dit";
41 #sound-dai-cells = <0>;
[all …]
H A Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
21 stdout-path = "serial0:115200n8";
25 timebase-frequency = <6250000>;
34 compatible = "gpio-leds";
36 led-ack {
40 linux,default-trigger = "heartbeat";
[all …]
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
19 the MDIO master is used for communication. Mixed external and internal
20 mdio-bus configurations are not supported by the hardware.
27 - enum:
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-adc-stm325 The STM32 ADC can be configured to use external trigger sources
7 conversions on external trigger by either:
9 - "rising-edge"
10 - "falling-edge"
11 - "both-edges".
H A Dsysfs-bus-counter3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
13 Selects the external clock pin for phase counting mode of
16 MTCLKA-MTCLKB:
17 MTCLKA and MTCLKB pins are selected for the external
20 MTCLKC-MTCLKD:
21 MTCLKC and MTCLKD pins are selected for the external
26 Contact: linux-iio@vger.kernel.org
33 Contact: linux-iio@vger.kernel.org
39 Contact: linux-iio@vger.kernel.org
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/linux/sound/soc/ti/
H A Ddavinci-i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * based on davinci-mcasp.c DT support
30 #include "edma-pcm.h"
31 #include "davinci-i2s.h"
33 #define DRV_NAME "davinci-i2s"
38 * - This driver supports the "Audio Serial Port" (ASP),
41 * - But it labels it a "Multi-channel Buffered Serial Port"
43 * backward-compatible, possibly explaining that confusion.
45 * - OMAP chips have a controller called McBSP, which is
48 * - Newer DaVinci chips have a controller called McASP,
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/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpc5200.txt2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
21 "fsl,mpc5200-<device>".
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
35 ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
39 "fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-st.txt3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
28 [irqN]----> [gpio-bank (n)]
33 - compatible : should be "st,stih407-<pio-block>-pinctrl"
[all …]
/linux/drivers/media/dvb-frontends/
H A Dlgs8gxx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator
7 * Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com>
48 /*Use External ADC*/
51 /*External ADC output two's complement*/
54 /*Sample IF data at falling edge of IF_CLK*/
/linux/drivers/gpu/drm/amd/include/ivsrcid/dcn/
H A Dirqsrcs_dcn_1_0.h192 #define DCN_1_0__SRCID__DC_DAC_A_AUTO_DET 0xA // DAC A auto - detection DACA_AUTODETECT_GEN…
309 #define DCN_1_0__SRCID__DC_DIGA_FAST_TRAINING_COMPLETE_INT 0xF // DIGA - Fast Training Complete…
312 #define DCN_1_0__SRCID__DC_DIGB_FAST_TRAINING_COMPLETE_INT 0xF // DIGB - Fast Training Complete…
315 #define DCN_1_0__SRCID__DC_DIGC_FAST_TRAINING_COMPLETE_INT 0xF // DIGC - Fast Training Complete…
318 #define DCN_1_0__SRCID__DC_DIGD_FAST_TRAINING_COMPLETE_INT 0xF // DIGD - Fast Training Complete…
321 #define DCN_1_0__SRCID__DC_DIGE_FAST_TRAINING_COMPLETE_INT 0xF // DIGE - Fast Training Complete…
324 #define DCN_1_0__SRCID__DC_DIGF_FAST_TRAINING_COMPLETE_INT 0xF // DIGF - Fast Training Complete…
468 …r of frames is counted.The counting starts / end at VSYNC rising edge or falling edge.DCCG_IHC_VSY…
471 …r of frames is counted.The counting starts / end at VSYNC rising edge or falling edge.DCCG_IHC_VSY…
474 …r of frames is counted.The counting starts / end at VSYNC rising edge or falling edge.DCCG_IHC_VSY…
[all …]
/linux/arch/arm/mach-pxa/
H A Dpxa27x-udc.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include "pxa-regs.h"
12 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */
13 #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation
15 #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol
17 #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol
19 #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */
44 #define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */
45 #define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */
46 #define UDCICR1_IERU (1 << 29) /* IntEn - Resume */
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs42l43.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
21 - $ref: dai-common.yaml#
26 - cirrus,cs42l43
31 vdd-p-supply:
35 vdd-a-supply:
39 vdd-d-supply:
43 vdd-io-supply:
[all …]
/linux/drivers/usb/gadget/udc/
H A Dpxa27x_udc.h1 // SPDX-License-Identifier: GPL-2.0+
4 * Intel PXA27x on-chip full speed USB device controller
28 #define UDCOTGICR 0x0018 /* UDC On-The-Go interrupt control */
36 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */
37 #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation
39 #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol
41 #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol
43 #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */
60 #define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */
61 #define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */
[all …]
/linux/drivers/extcon/
H A Dextcon-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * extcon_gpio.c - Single-state GPIO extcon driver based on extcon class
12 #include <linux/devm-helpers.h>
13 #include <linux/extcon-provider.h>
24 * struct gpio_extcon_data - A simple GPIO-controlled extcon device state container.
29 * @gpiod: GPIO descriptor for this external connector.
30 * @extcon_id: The unique id of specific external connector.
52 state = gpiod_get_value_cansleep(data->gpiod); in gpio_extcon_work()
53 extcon_set_state_sync(data->edev, data->extcon_id, state); in gpio_extcon_work()
60 queue_delayed_work(system_power_efficient_wq, &data->work, in gpio_irq_handler()
[all …]
/linux/drivers/video/fbdev/
H A Dbt431.h4 * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
5 * Copyright 2016 Maciej W. Rozycki <macro@linux-mips.org>
16 * Bt431 cursor generator registers, 32-bit aligned.
17 * Two twin Bt431 are used on the DECstation's PMAG-AA.
82 volatile u16 *lo = &(regs->addr_lo); in bt431_select_reg()
83 volatile u16 *hi = &(regs->addr_hi); in bt431_select_reg()
98 volatile u16 *r = &(regs->addr_reg); in bt431_read_reg_inc()
110 volatile u16 *r = &(regs->addr_reg); in bt431_write_reg_inc()
135 volatile u16 *r = &(regs->addr_cmap); in bt431_read_cmap_inc()
147 volatile u16 *r = &(regs->addr_cmap); in bt431_write_cmap_inc()
[all …]
/linux/Documentation/devicetree/bindings/timer/
H A Dfaraday,fttmr010.txt8 - compatible : Must be one of
10 "cortina,gemini-timer", "faraday,fttmr010"
11 "moxa,moxart-timer", "faraday,fttmr010"
12 "aspeed,ast2400-timer"
13 "aspeed,ast2500-timer"
14 "aspeed,ast2600-timer"
16 - reg : Should contain registers location and length
17 - interrupts : Should contain the three timer interrupts usually with
18 flags for falling edge
22 - clocks : a clock to provide the tick rate for "faraday,fttmr010"
[all …]
/linux/drivers/gpio/
H A Dgpio-sch.c1 // SPDX-License-Identifier: GPL-2.0
35 * Document Number: 328195-001
55 if (gpio >= sch->resume_base) { in sch_gpio_offset()
56 gpio -= sch->resume_base; in sch_gpio_offset()
65 if (gpio >= sch->resume_base) in sch_gpio_bit()
66 gpio -= sch->resume_base; in sch_gpio_bit()
78 reg_val = !!(ioread8(sch->regs + offset) & BIT(bit)); in sch_gpio_reg_get()
92 reg_val = ioread8(sch->regs + offset); in sch_gpio_reg_set()
99 iowrite8(reg_val, sch->regs + offset); in sch_gpio_reg_set()
107 spin_lock_irqsave(&sch->lock, flags); in sch_gpio_direction_in()
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
[all …]
/linux/Documentation/dev-tools/
H A Dgpio-sloppy-logic-analyzer.rst1 .. SPDX-License-Identifier: GPL-2.0
12 This document briefly describes how to run the GPIO based in-kernel sloppy
18 appeared on these lines. One way to use it is to analyze external traffic
22 Another feature is to snoop on on-chip peripherals if the I/O cells of these
26 control subsystem such pin controllers are called "non-strict": a certain pin
31 non-deterministic code paths and non-maskable interrupts. It is called 'sloppy'
47 i2c-analyzer {
48 compatible = "gpio-sloppy-logic-analyzer";
49 probe-gpios = <&gpio6 21 GPIO_OPEN_DRAIN>, <&gpio6 4 GPIO_OPEN_DRAIN>;
50 probe-names = "SCL", "SDA";
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-kevin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Kevin Rev 6+ board device tree source
5 * Copyright 2016-2017 Google, Inc
8 /dts-v1/;
9 #include "rk3399-gru-chromebook.dtsi"
10 #include <dt-bindings/input/linux-event-codes.h>
13 * Kevin-specific things
21 compatible = "google,kevin-rev15", "google,kevin-rev14",
22 "google,kevin-rev13", "google,kevin-rev12",
23 "google,kevin-rev11", "google,kevin-rev10",
[all …]
/linux/drivers/irqchip/
H A Dirq-owl-sirq.c1 // SPDX-License-Identifier: GPL-2.0+
6 * David Liu <liuwei@actions-semi.com>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
98 val = readl_relaxed(data->base + data->params->reg_offset[index]); in owl_sirq_read_extctl()
99 if (data->params->reg_shared) in owl_sirq_read_extctl()
110 if (data->params->reg_shared) { in owl_sirq_write_extctl()
111 val = readl_relaxed(data->base + data->params->reg_offset[index]); in owl_sirq_write_extctl()
116 writel_relaxed(extctl, data->base + data->params->reg_offset[index]); in owl_sirq_write_extctl()
125 raw_spin_lock_irqsave(&d->lock, flags); in owl_sirq_clear_set_extctl()
130 raw_spin_unlock_irqrestore(&d->lock, flags); in owl_sirq_clear_set_extctl()
[all …]
/linux/Documentation/devicetree/bindings/misc/
H A Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
23 compatible = "ifm,o2d-csi";
[all …]

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