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/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dspear_spics.txt1 === ST Microelectronics SPEAr SPI CS Driver ===
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
30 -------
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/freebsd/sys/arm/freescale/imx/
H A Dimx_spi.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * Driver for imx Enhanced Configurable SPI; master-mode only.
143 {"fsl,imx51-ecspi", true},
144 {"fsl,imx53-ecspi", true},
145 {"fsl,imx6dl-ecspi", true},
146 {"fsl,imx6q-ecspi", true},
147 {"fsl,imx6sx-ecspi", true},
148 {"fsl,imx6ul-ecspi", true},
156 return (bus_read_4(sc->memres, offset)); in RD4()
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dspear1340.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
16 compatible = "st,spear-spics-gpio";
18 st-spics,peripcfg-reg = <0x42c>;
19 st-spic
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H A Dspear1310.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
15 compatible = "st,spear-spics-gpio";
17 st-spics,peripcfg-reg = <0x3b0>;
18 st-spics,sw-enable-bit = <12>;
19 st-spics,cs-value-bit = <11>;
20 st-spics,cs-enable-mask = <3>;
21 st-spics,cs-enable-shift = <8>;
22 gpio-controller;
23 #gpio-cells = <2>;
27 compatible = "st,spear1310-miphy";
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/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Dac5-98dx25xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
36 compatible = "arm,cortex-a55";
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/
H A Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a72";
49 enable-method = "psci";
50 next-level-cache = <&CLUSTER0_L2>;
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/freebsd/sys/dev/qcom_qup/
H A Dqcom_spi_hw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
78 sc->config.input_block_size = 4; in qcom_spi_hw_read_controller_transfer_sizes()
80 sc->config.input_block_size = val * 16; in qcom_spi_hw_read_controller_transfer_sizes()
86 sc->config.output_block_size = 4; in qcom_spi_hw_read_controller_transfer_sizes()
88 sc->config.output_block_size = val * 16; in qcom_spi_hw_read_controller_transfer_sizes()
93 sc->config.input_fifo_size = in qcom_spi_hw_read_controller_transfer_sizes()
94 sc->config.input_block_size * (2 << val); in qcom_spi_hw_read_controller_transfer_sizes()
99 sc->config.output_fifo_size = in qcom_spi_hw_read_controller_transfer_sizes()
100 sc->config.output_block_size * (2 << val); in qcom_spi_hw_read_controller_transfer_sizes()
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/freebsd/sys/contrib/device-tree/src/arm64/intel/
H A Dsocfpga_agilex5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/intel,agilex5-clkmgr.h>
14 compatible = "intel,socfpga-agilex5";
15 #address-cells = <2>;
16 #size-cells = <2>;
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H A Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
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/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dnxp,sja1105.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/dev/igc/
H A Digc_nvm.c1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
13 * igc_init_nvm_ops_generic - Initialize NVM function pointers
16 * Setups up the function pointers to no-op functions
20 struct igc_nvm_info *nvm = &hw->nvm; in igc_init_nvm_ops_generic()
24 nvm->ops.init_params = igc_null_ops_generic; in igc_init_nvm_ops_generic()
25 nvm->ops.acquire = igc_null_ops_generic; in igc_init_nvm_ops_generic()
26 nvm->ops.read = igc_null_read_nvm; in igc_init_nvm_ops_generic()
27 nvm->ops.release = igc_null_nvm_generic; in igc_init_nvm_ops_generic()
28 nvm->ops.reload = igc_reload_nvm_generic; in igc_init_nvm_ops_generic()
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/freebsd/contrib/ncurses/include/
H A DCaps-ncurses2 # Copyright 2019-2022,2023 Thomas E. Dickey #
31 # $Id: Caps-ncurses,v 1.15 2023/10/28 21:55:47 tom Exp $
49 #memory_lock meml str ml - - ----K lock memory above cursor
50 #memory_unlock memu str mu - - ----K unlock memory
51 #plab_norm pln str pn - - ----- program label #1 to show string #2
52 #label_on smln str LO - - ----- turn on soft labels
53 #label_off rmln str LF - - ----- turn off soft labels
54 #key_f11 kf11 str F1 - - ----- F11 function key
55 #key_f12 kf12 str F2 - - ----- F12 function key
56 #key_f13 kf13 str F3 - - ----- F13 function key
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dmotorola-cpcap-mapphone.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
10 interrupt-parent = <&gpio1>;
12 interrupt-controller;
13 #interrupt-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 spi-max-frequency = <9600000>;
17 spi-cs-high;
18 spi-cpol;
19 spi-cpha;
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H A Domap3-gta04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on omap3-beagle-xm.dts
7 /dts-v1/;
10 #include <dt-bindings/input/input.h>
17 cpu0-supply = <&vcc>;
27 stdout-pat
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H A Domap3-pandora-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/input/input.h>
14 cpu0-supply = <&vcc>;
29 #clock-cells = <0>;
30 compatible = "fixed-clock";
31 clock-frequency = <26000000>;
35 compatible = "connector-analog-tv";
40 remote-endpoint = <&venc_out>;
45 gpio-leds {
47 compatible = "gpio-leds";
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/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipcreg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 2010-2015 Broadcom Corporation
10 * distributed with the Asus RT-N16 firmware source code release.
77 /* siba backplane configuration broadcast (siba-only) */
81 #define CHIPC_GPIOPU 0x58 /**< pull-up mask (rev >= 20) */
97 #define CHIPC_GPIOTIMERVAL 0x88 /**< gpio-based LED duty cycle (rev >= 16) */
100 /* clock control registers (non-PMU devices) */
114 #define CHIPC_PLL_SLOWCLK_CTL 0xB8 /* "slowclock" (rev 6-9) */
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/freebsd/sys/contrib/device-tree/src/arm64/altera/
H A Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
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/freebsd/sys/dev/e1000/
H A De1000_nvm.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
40 * e1000_init_nvm_ops_generic - Initialize NVM function pointers
43 * Setups up the function pointers to no-op functions
47 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_init_nvm_ops_generic()
51 nvm->ops.init_params = e1000_null_ops_generic; in e1000_init_nvm_ops_generic()
52 nvm->ops.acquire = e1000_null_ops_generic; in e1000_init_nvm_ops_generic()
53 nvm->ops.read = e1000_null_read_nvm; in e1000_init_nvm_ops_generic()
54 nvm->ops.release = e1000_null_nvm_generic; in e1000_init_nvm_ops_generic()
55 nvm->ops.reload = e1000_reload_nvm_generic; in e1000_init_nvm_ops_generic()
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/freebsd/cddl/usr.sbin/dwatch/
H A Ddwatch2 #-
3 # Copyright (c) 2014-2018 Devin Teske
40 " # END-QUOTE
49 VERSION='$Version: 1.4 $' # -V
54 # Command-line arguments
59 # Command-line defaults
61 _MAX_ARGS=64 # -B num
62 _MAX_DEPTH=64 # -K num
65 # Command-line options
67 CONSOLE= # -y
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-sabrelite.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
8 #include <dt-bindings/clock/imx6qdl-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
14 stdout-path = &uart2;
27 reg_2p5v: regulator-2p5v {
28 compatible = "regulator-fixed";
29 regulator-name = "2P5V";
30 regulator-min-microvolt = <2500000>;
31 regulator-max-microvolt = <2500000>;
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/freebsd/sys/contrib/device-tree/src/arm64/microchip/
H A Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
28 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/northstar2/
H A Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
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/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
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H A Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
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/freebsd/usr.bin/m4/
H A Dm4.147 .Op Fl d Oo Oo +- Oc Ns Ar flags Oc
65 .Pq Sq - ,
82 .Dq [a-zA-Z_][a-zA-Z0-9_]* .
91 built-in macro.
93 Most built-ins do not make any sense without arguments, and hence are not
97 .Bl -tag -width Ds
98 .It Fl D Ns Ar name Ns Oo = Ns Ar value Oc , Fl -define Ns = Ns Ar name Ns Oo = Ns Ar value Oc
103 .It Fl d Oo Oo +|- Oc Ns Ar flags Oc , Fl -debug Ns = Ns Oo Oo +|- Oc Ns Ar flags Oc
106 .Bl -tag -width Ds
130 .Qq -
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