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/linux/Documentation/devicetree/bindings/power/supply/
H A Ddlg,da9150-fuel-gauge.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/dlg,da9150-fuel-gauge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Dialog Semiconductor DA9150 Fuel-Gauge Power Supply
10 - Sebastian Reichel <sre@kernel.org>
13 - $ref: power-supply.yaml#
17 const: dlg,da9150-fuel-gauge
19 dlg,update-interval:
21 description: Interval time (milliseconds) between battery level checks.
[all …]
/linux/drivers/power/supply/
H A Dda9150-fg.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DA9150 Fuel-Gauge Driver
22 #include <linux/devm-helpers.h>
84 int soc; member
99 da9150_read_qif(fg->da9150, read_addr, size, buf); in da9150_fg_read_attr()
121 da9150_write_qif(fg->da9150, write_addr, size, buf); in da9150_fg_write_attr()
130 mutex_lock(&fg->io_lock); in da9150_fg_read_sync_start()
150 dev_err(fg->dev, "Failed to perform QIF read sync!\n"); in da9150_fg_read_sync_start()
159 mutex_unlock(&fg->io_lock); in da9150_fg_read_sync_end()
181 mutex_lock(&fg->io_lock); in da9150_fg_write_attr_sync()
[all …]
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpc5200.txt2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
18 chip? For the MPC5200; the answer is easy. Most of the SoC devices
21 "fsl,mpc5200-<device>".
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
35 ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dda9150.txt1 Dialog Semiconductor DA9150 Combined Charger/Fuel-Gauge MFD bindings
3 DA9150 consists of a group of sub-devices:
6 ------ -----------
7 da9150-gpadc : General Purpose ADC
8 da9150-charger : Battery Charger
9 da9150-fg : Battery Fuel-Gauge
14 - compatible : Should be "dlg,da9150"
15 - reg: Specifies the I2C slave address
16 - interrupts: IRQ line info for da9150 chip.
17 - interrupt-controller: da9150 has internal IRQs (own IRQ domain).
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
[all …]
H A Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
[all …]
H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8953.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
5 #include <dt-bindings/clock/qcom,rpmcc.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/soc/qcom,apr.h>
10 #include <dt-bindings/sound/qcom,q6afe.h>
11 #include <dt-bindings/sound/qcom,q6asm.h>
12 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dmsm8976.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno
9 #include <dt-bindings/clock/qcom,gcc-msm8976.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <2>;
[all …]
H A Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
10 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interconnect/qcom,qcm2290.h>
[all …]
H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
[all …]
H A Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 SoC device tree source
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
[all …]
/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pic.c23 * -----------------
29 * remaining irq sources from all of the on-chip peripherals (PSCs, Ethernet,
33 * -----
42 * assigns a number to each of the irq groups (called the level 1 or L1
45 * level 2 or L2 value. The virq number is determined by shifting up the
61 * -------------------
77 * reason there is no crit irq_chip is that of the 3 irqs in the critical
83 * --------------------
84 * The device tree bindings for this controller reflect the two level
85 * organization of irqs in the device. #interrupt-cells = <3> where the
[all …]
/linux/arch/powerpc/boot/dts/
H A Dturris1x.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
36 soc: soc@ffe00000 { label
41 gpio-controller@18 {
45 #gpio-cells = <2>;
[all …]
/linux/arch/arm/boot/dts/socionext/
H A Duniphier-pxs2.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs2 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-pxs2";
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/st/
H A Dste-snowball.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011 ST-Ericsson AB
6 /dts-v1/;
7 #include "ste-db9500.dtsi"
8 #include "ste-href-ab8500.dtsi"
9 #include "ste-href-family-pinctrl.dtsi"
13 compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
21 compatible = "simple-battery";
22 battery-type = "lithium-ion-polymer";
25 thermal-zones {
[all …]
H A Dste-ux500-samsung-golden.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include "ste-db8500.dtsi"
5 #include "ste-ab8505.dtsi"
6 #include "ste-dbx5x0-pinctrl.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 * You need an intermediate, device-tree compatible bootloader
[all …]
H A Dste-ux500-samsung-skomer.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8505.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Dste-ux500-samsung-kyle.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Amp SGH-I407 also known as Kyle.
10 /dts-v1/;
11 #include "ste-db8500.dtsi"
12 #include "ste-ab8505.dtsi"
13 #include "ste-dbx5x0-pinctrl.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/leds/common.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/power/rk3588-power.h>
10 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/ata/ahci.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "socionext,uniphier-ld20";
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
H A Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs3 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "socionext,uniphier-pxs3";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
[all …]
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
41 model = "Broadcom Northstar Plus SoC";
42 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 compatible = "arm,cortex-a9";
[all …]

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