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/linux/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dmpfs.c36 #include <linux/mlx5/mpfs.h>
39 #include "lib/mpfs.h"
41 /* HW L2 Table (MPFS) management */
100 struct mlx5_mpfs *mpfs; in mlx5_mpfs_init() local
105 mpfs = kzalloc(sizeof(*mpfs), GFP_KERNEL); in mlx5_mpfs_init()
106 if (!mpfs) in mlx5_mpfs_init()
109 mutex_init(&mpfs->lock); in mlx5_mpfs_init()
110 mpfs->size = l2table_size; in mlx5_mpfs_init()
111 mpfs->bitmap = bitmap_zalloc(l2table_size, GFP_KERNEL); in mlx5_mpfs_init()
112 if (!mpfs->bitmap) { in mlx5_mpfs_init()
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/linux/Documentation/devicetree/bindings/spi/
H A Dmicrochip,mpfs-spi.yaml4 $id: http://devicetree.org/schemas/spi/microchip,mpfs-spi.yaml#
21 - microchip,mpfs-qspi
27 - const: microchip,mpfs-spi
28 - const: microchip,mpfs-spi
55 const: microchip,mpfs-spi
65 const: microchip,mpfs-spi
78 #include "dt-bindings/clock/microchip,mpfs-clock.h"
80 compatible = "microchip,mpfs-spi";
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
11 compatible = "microchip,mpfs";
193 compatible = "microchip,mpfs-sys-controller";
210 compatible = "microchip,mpfs-ccache", "sifive,fu540-c000-ccache", "cache";
246 compatible = "microchip,mpfs-pdma", "sifive,pdma0";
255 compatible = "microchip,mpfs-clkcfg";
263 compatible = "microchip,mpfs-ccc";
271 compatible = "microchip,mpfs-ccc";
279 compatible = "microchip,mpfs-ccc";
287 compatible = "microchip,mpfs-ccc";
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H A Dmpfs-sev-kit.dts6 #include "mpfs.dtsi"
7 #include "mpfs-sev-kit-fabric.dtsi"
13 compatible = "microchip,mpfs-sev-kit", "microchip,mpfs";
H A Dmpfs-polarberry.dts6 #include "mpfs.dtsi"
7 #include "mpfs-polarberry-fabric.dtsi"
11 compatible = "sundance,polarberry", "microchip,mpfs";
H A Dmpfs-tysom-m.dts11 #include "mpfs.dtsi"
12 #include "mpfs-tysom-m-fabric.dtsi"
16 compatible = "aldec,tysom-m-mpfs250t-rev2", "microchip,mpfs";
H A Dmpfs-m100pfsevp.dts10 #include "mpfs.dtsi"
11 #include "mpfs-m100pfs-fabric.dtsi"
15 compatible = "aries,m100pfsevp", "microchip,mpfs";
/linux/Documentation/devicetree/bindings/rtc/
H A Dmicrochip,mpfs-rtc.yaml4 $id: http://devicetree.org/schemas/rtc/microchip,mpfs-rtc.yaml#
8 title: Microchip PolarFire Soc (MPFS) RTC
21 - const: microchip,mpfs-rtc
22 - const: microchip,mpfs-rtc
61 #include "dt-bindings/clock/microchip,mpfs-clock.h"
63 compatible = "microchip,mpfs-rtc";
/linux/Documentation/devicetree/bindings/clock/
H A Dmicrochip,mpfs-clkcfg.yaml4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml#
22 const: microchip,mpfs-clkcfg
44 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
55 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
70 #include <dt-bindings/clock/microchip,mpfs-clock.h>
75 compatible = "microchip,mpfs-clkcfg";
H A Dmicrochip,mpfs-ccc.yaml4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml#
20 const: microchip,mpfs-ccc
57 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
72 compatible = "microchip,mpfs-ccc";
/linux/drivers/char/hw_random/
H A Dmpfs-rng.c3 * Microchip PolarFire SoC (MPFS) hardware random driver
13 #include <soc/microchip/mpfs.h>
84 return dev_err_probe(&pdev->dev, ret, "Failed to register MPFS hwrng\n"); in mpfs_rng_probe()
86 dev_info(&pdev->dev, "Registered MPFS hwrng\n"); in mpfs_rng_probe()
93 .name = "mpfs-rng",
101 MODULE_DESCRIPTION("PolarFire SoC (MPFS) hardware random driver");
/linux/Documentation/devicetree/bindings/gpio/
H A Dmicrochip,mpfs-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/microchip,mpfs-gpio.yaml#
7 title: Microchip MPFS GPIO Controller
16 - microchip,mpfs-gpio
60 const: microchip,mpfs-gpio
79 compatible = "microchip,mpfs-gpio";
/linux/Documentation/devicetree/bindings/mailbox/
H A Dmicrochip,mpfs-mailbox.yaml4 $id: http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#
7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller
14 const: microchip,mpfs-mailbox
51 compatible = "microchip,mpfs-mailbox";
/linux/Documentation/devicetree/bindings/soc/microchip/
H A Dmicrochip,mpfs-sys-controller.yaml4 $id: http://devicetree.org/schemas/soc/microchip/microchip,mpfs-sys-controller.yaml#
7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller
27 const: microchip,mpfs-sys-controller
48 compatible = "microchip,mpfs-sys-controller";
/linux/drivers/reset/
H A Dreset-mpfs.c3 * PolarFire SoC (MPFS) Peripheral Clock Reset Controller
17 #include <dt-bindings/clock/microchip,mpfs-clock.h>
18 #include <soc/microchip/mpfs.h>
162 adev = devm_auxiliary_device_create(clk_dev, "reset-mpfs", in mpfs_reset_controller_register()
173 .name = "reset_mpfs.reset-mpfs",
/linux/drivers/soc/microchip/
H A DKconfig2 tristate "Microchip PolarFire SoC (MPFS) system controller support"
6 This driver adds support for the PolarFire SoC (MPFS) system controller.
H A DMakefile1 obj-$(CONFIG_POLARFIRE_SOC_SYS_CTRL) += mpfs-sys-controller.o
/linux/drivers/clk/microchip/
H A DMakefile4 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs.o
5 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs-ccc.o
H A Dclk-mpfs.c11 #include <dt-bindings/clock/microchip,mpfs-clock.h>
12 #include <soc/microchip/mpfs.h>
84 * mpfs clk block while a software locked register is being written.
417 { .compatible = "microchip,mpfs-clkcfg", },
425 .name = "microchip-mpfs-clkcfg",
H A Dclk-mpfs-ccc.c12 #include <dt-bindings/clock/microchip,mpfs-clock.h>
267 { .compatible = "microchip,mpfs-ccc", },
275 .name = "microchip-mpfs-ccc",
/linux/Documentation/devicetree/bindings/cache/
H A Dsifive,ccache0.yaml48 - const: microchip,mpfs-ccache
97 - microchip,mpfs-ccache
148 - microchip,mpfs-ccache
/linux/drivers/usb/musb/
H A Dmpfs.c3 * PolarFire SoC (MPFS) MUSB Glue Layer
342 dev_info(&pdev->dev, "Registered MPFS MUSB driver\n"); in mpfs_probe()
365 { .compatible = "microchip,mpfs-musb" },
375 .name = "mpfs-musb",
/linux/drivers/firmware/microchip/
H A DMakefile3 obj-$(CONFIG_POLARFIRE_SOC_AUTO_UPDATE) += mpfs-auto-update.o
H A DKconfig12 If built as a module, it will be called mpfs-auto-update.
/linux/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/
H A Dkconfig.rst109 | Ethernet Multi-Physical Function Switch (MPFS) support in ConnectX NIC.
110 | MPFs is required for when `Multi-Host <https://www.nvidia.com/en-us/networking/multi-host/>`_ …

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