| #
b82e98bf |
| 25-Feb-2026 |
Conor Dooley <conor.dooley@microchip.com> |
clk: microchip: rename clk-core to clk-pic32
clk-core is a confusingly generic name, since it is only used by a single platform and it uses very similar naming to the "soft" IP cores for use in FPGA
clk: microchip: rename clk-core to clk-pic32
clk-core is a confusingly generic name, since it is only used by a single platform and it uses very similar naming to the "soft" IP cores for use in FPGA fabric (CoreClock or similar is what that would be called, although nothing like that exists right now) that the FPGA business unit produces. Rename it to clk-pic32, matching the prefix used by most functions in the driver. As far as I can tell, impact on whatever users may (or may not...) exist for the platform is minimal as it's built-in only and the functions are called directly from clk-pic32mzda.c
Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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| #
d39fb172 |
| 08-Sep-2022 |
Conor Dooley <conor.dooley@microchip.com> |
clk: microchip: add PolarFire SoC fabric clock support
Add a driver to support the PLLs in PolarFire SoC's Clock Conditioning Circuitry, an instance of which is located in each ordinal corner of the
clk: microchip: add PolarFire SoC fabric clock support
Add a driver to support the PLLs in PolarFire SoC's Clock Conditioning Circuitry, an instance of which is located in each ordinal corner of the FPGA. Only get_rate() is supported as these clocks are intended to be statically configured by the FPGA design. Currently, the DLLs are not supported by this driver. For more information on the hardware, see "PolarFire SoC FPGA Clocking Resources" in the link below.
Link: https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220908143651.1252601-5-conor.dooley@microchip.com
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| #
635e5e73 |
| 22-Feb-2022 |
Daire McNamara <daire.mcnamara@microchip.com> |
clk: microchip: Add driver for Microchip PolarFire SoC
Add support for clock configuration on Microchip PolarFire SoC
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterh
clk: microchip: Add driver for Microchip PolarFire SoC
Add support for clock configuration on Microchip PolarFire SoC
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Co-developed-by: Padmarao Begari <padmarao.begari@microchip.com> Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> Co-developed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20220222121143.3316880-2-conor.dooley@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| #
ec8f24b7 |
| 19-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project
treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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| #
ce6e1188 |
| 13-May-2016 |
Purna Chandra Mandal <purna.mandal@microchip.com> |
CLK: microchip: Add Microchip PIC32 clock driver.
This clock driver implements PIC32 specific clock-tree. clock-tree entities can only be configured through device-tree file (OF).
Signed-off-by: Pu
CLK: microchip: Add Microchip PIC32 clock driver.
This clock driver implements PIC32 specific clock-tree. clock-tree entities can only be configured through device-tree file (OF).
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-clk@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13247/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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