1*f8560812SAlexandre Belloni# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*f8560812SAlexandre Belloni%YAML 1.2 3*f8560812SAlexandre Belloni--- 4*f8560812SAlexandre Belloni$id: http://devicetree.org/schemas/rtc/microchip,mpfs-rtc.yaml# 5*f8560812SAlexandre Belloni 6*f8560812SAlexandre Belloni$schema: http://devicetree.org/meta-schemas/core.yaml# 7*f8560812SAlexandre Belloni 8*f8560812SAlexandre Bellonititle: Microchip PolarFire Soc (MPFS) RTC 9*f8560812SAlexandre Belloni 10*f8560812SAlexandre BelloniallOf: 11*f8560812SAlexandre Belloni - $ref: rtc.yaml# 12*f8560812SAlexandre Belloni 13*f8560812SAlexandre Bellonimaintainers: 14*f8560812SAlexandre Belloni - Daire McNamara <daire.mcnamara@microchip.com> 15*f8560812SAlexandre Belloni 16*f8560812SAlexandre Belloniproperties: 17*f8560812SAlexandre Belloni compatible: 18*f8560812SAlexandre Belloni oneOf: 19*f8560812SAlexandre Belloni - items: 20*f8560812SAlexandre Belloni - const: microchip,pic64gx-rtc 21*f8560812SAlexandre Belloni - const: microchip,mpfs-rtc 22*f8560812SAlexandre Belloni - const: microchip,mpfs-rtc 23*f8560812SAlexandre Belloni 24*f8560812SAlexandre Belloni reg: 25*f8560812SAlexandre Belloni maxItems: 1 26*f8560812SAlexandre Belloni 27*f8560812SAlexandre Belloni interrupts: 28*f8560812SAlexandre Belloni items: 29*f8560812SAlexandre Belloni - description: | 30*f8560812SAlexandre Belloni RTC_WAKEUP interrupt 31*f8560812SAlexandre Belloni - description: | 32*f8560812SAlexandre Belloni RTC_MATCH, asserted when the content of the Alarm register is equal 33*f8560812SAlexandre Belloni to that of the RTC's count register. 34*f8560812SAlexandre Belloni 35*f8560812SAlexandre Belloni clocks: 36*f8560812SAlexandre Belloni items: 37*f8560812SAlexandre Belloni - description: | 38*f8560812SAlexandre Belloni AHB clock 39*f8560812SAlexandre Belloni - description: | 40*f8560812SAlexandre Belloni Reference clock: divided by the prescaler to create a time-based 41*f8560812SAlexandre Belloni strobe (typically 1 Hz) for the calendar counter. By default, the rtc 42*f8560812SAlexandre Belloni on the PolarFire SoC shares it's reference with MTIMER so this will 43*f8560812SAlexandre Belloni be a 1 MHz clock. 44*f8560812SAlexandre Belloni 45*f8560812SAlexandre Belloni clock-names: 46*f8560812SAlexandre Belloni items: 47*f8560812SAlexandre Belloni - const: rtc 48*f8560812SAlexandre Belloni - const: rtcref 49*f8560812SAlexandre Belloni 50*f8560812SAlexandre Bellonirequired: 51*f8560812SAlexandre Belloni - compatible 52*f8560812SAlexandre Belloni - reg 53*f8560812SAlexandre Belloni - interrupts 54*f8560812SAlexandre Belloni - clocks 55*f8560812SAlexandre Belloni - clock-names 56*f8560812SAlexandre Belloni 57*f8560812SAlexandre BelloniadditionalProperties: false 58*f8560812SAlexandre Belloni 59*f8560812SAlexandre Belloniexamples: 60*f8560812SAlexandre Belloni - | 61*f8560812SAlexandre Belloni #include "dt-bindings/clock/microchip,mpfs-clock.h" 62*f8560812SAlexandre Belloni rtc@20124000 { 63*f8560812SAlexandre Belloni compatible = "microchip,mpfs-rtc"; 64*f8560812SAlexandre Belloni reg = <0x20124000 0x1000>; 65*f8560812SAlexandre Belloni clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>; 66*f8560812SAlexandre Belloni clock-names = "rtc", "rtcref"; 67*f8560812SAlexandre Belloni interrupts = <80>, <81>; 68*f8560812SAlexandre Belloni }; 69*f8560812SAlexandre Belloni... 70