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/linux/Documentation/devicetree/bindings/watchdog/
H A Dqcom-wdt.yaml21 - qcom,apss-wdt-ipq5018
22 - qcom,apss-wdt-ipq5332
23 - qcom,apss-wdt-ipq5424
24 - qcom,apss-wdt-ipq9574
25 - qcom,apss-wdt-msm8226
26 - qcom,apss-wdt-msm8974
27 - qcom,apss-wdt-msm8994
28 - qcom,apss-wdt-qcm2290
29 - qcom,apss-wdt-qcs404
30 - qcom,apss-wdt-qcs615
[all …]
/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom,apcs-kpss-global.yaml49 - qcom,qcs615-apss-shared
50 - qcom,sc7180-apss-shared
51 - qcom,sc8180x-apss-shared
52 - qcom,sm7150-apss-shared
53 - qcom,sm8150-apss-shared
54 - const: qcom,sdm845-apss-shared
67 - qcom,sdm845-apss-shared
240 - qcom,sdm845-apss-shared
H A Dqcom-ipcc.yaml16 entity on the Application Processor Subsystem (APSS) that wants to listen to
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,ipq5424-apss-clk.yaml4 $id: http://devicetree.org/schemas/clock/qcom,ipq5424-apss-clk.yaml#
7 title: Qualcomm APSS IPQ5424 Clock Controller
19 - qcom,ipq5424-apss-clk
49 compatible = "qcom,ipq5424-apss-clk";
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dqcom,mpm.yaml16 monitors the interrupts when the system is asleep, wakes up the APSS when
37 Phandle to the APSS MPM slice of the RPM Message RAM
42 Specify the IRQ used by RPM to wakeup APSS.
/linux/drivers/clk/qcom/
H A Dapss-ipq5424.c17 #include <dt-bindings/clock/qcom,apss-ipq.h>
248 { .compatible = "qcom,ipq5424-apss-clk" },
256 .name = "apss-ipq5424-clk",
264 MODULE_DESCRIPTION("QCOM APSS IPQ5424 CLK Driver");
H A Dapss-ipq6018.c15 #include <dt-bindings/clock/qcom,apss-ipq.h>
157 .name = "qcom,apss-ipq6018-clk",
163 MODULE_DESCRIPTION("QCOM APSS IPQ 6018 CLK Driver");
H A DMakefile34 obj-$(CONFIG_IPQ_APSS_PLL) += apss-ipq-pll.o
35 obj-$(CONFIG_IPQ_APSS_5424) += apss-ipq5424.o
36 obj-$(CONFIG_IPQ_APSS_6018) += apss-ipq6018.o
H A DKconfig210 tristate "IPQ APSS PLL"
212 Support for APSS PLL on ipq devices. The APSS PLL is the main
218 tristate "IPQ APSS Clock Controller"
222 Support for APSS Clock controller on Qualcom IPQ5424 platform.
227 tristate "IPQ APSS Clock Controller"
232 Support for APSS clock controller on IPQ platforms. The
233 APSS clock controller manages the Mux and enable block that feeds the
H A Dapss-ipq-pll.c221 .name = "qcom-ipq-apss-pll",
227 MODULE_DESCRIPTION("Qualcomm technology Inc APSS ALPHA PLL Driver");
H A Dmmcc-sdm660.c94 /* APSS controlled PLLs */
H A Dclk-alpha-pll.c2818 /* Stromer APSS PLL does not enable LOCK_DET by default, so enable it */ in clk_stromer_pll_configure()
H A Dgcc-msm8976.c4122 /* Enable AUX2 clock for APSS */ in gcc_msm8976_probe()
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpm-master-stats.yaml15 spanning a single subsystem (e.g. APSS, ADSP, CDSP). All of the RPM decisions
65 qcom,master-names = "APSS",
/linux/drivers/watchdog/
H A Dqcom-wdt.c331 { .compatible = "qcom,apss-wdt-ipq5424", .data = &match_data_ipq5424 },
/linux/drivers/mailbox/
H A Dqcom-ipcc.c44 * @base: Base address of the IPCC frame associated to APSS
/linux/drivers/soc/qcom/
H A Dqcom_stats.c62 { "apss", 631, QCOM_SMEM_HOST_ANY },
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226.dtsi153 qcom,master-names = "APSS",
419 compatible = "qcom,apss-wdt-msm8226", "qcom,kpss-wdt";
H A Dqcom-sdx65.dtsi664 compatible = "qcom,apss-wdt-sdx65", "qcom,kpss-wdt";
H A Dqcom-msm8974.dtsi128 qcom,master-names = "APSS",
358 compatible = "qcom,apss-wdt-msm8974", "qcom,kpss-wdt";
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8917.dtsi1618 compatible = "qcom,apss-wdt-qcs404", "qcom,kpss-wdt";
H A Dsm6115.dtsi3018 compatible = "qcom,apss-wdt-sm6115", "qcom,kpss-wdt";
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu_state.c1453 * That register however is not directly accessible from APSS on A7xx. in a7xx_get_cp_roq_size()
/linux/drivers/infiniband/hw/hfi1/
H A Dmad.c4864 * @out_mad_pkey_index: used to apss back the packet key index