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/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp42x-ixdpg425.dts26 memory@0 {
29 reg = <0x00000000 0x02000000>;
43 flash@0,0 {
50 reg = <0 0x00000000 0x1000000>;
58 fis-index-block = <0x7f>;
72 interrupt-map-mask = <0xf800 0 0 7>;
75 <0x6000 0 0 1 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 12 is irq 7 */
76 <0x6000 0 0 2 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 12 is irq 7 */
77 <0x6000 0 0 3 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 12 is irq 7 */
78 <0x6000 0 0 4 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 12 is irq 7 */
[all …]
H A Dintel-ixp42x-freecom-fsg-3.dts19 memory@0 {
22 reg = <0x00000000 0x4000000>;
65 #size-cells = <0>;
76 reg = <0x28>;
80 reg = <0x6f>;
86 flash@0,0 {
92 reg = <0 0x0000000
[all...]
H A Dintel-ixp42x-goramo-multilink.dts25 memory@0 {
31 reg = <0x00000000 0x4000000>;
53 cp-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
68 flash@0,0 {
74 reg = <0 0x00000000 0x1000000>;
78 /* Eraseblock at 0x0fe000
[all...]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dstorcenter.dts30 #size-cells = <0>;
32 PowerPC,8241@0 {
34 reg = <0>;
37 bus-frequency = <0>; /* from bootwrapper */
47 reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */
55 store-gathering = <0>; /* 0 == off, !0 == on */
56 ranges = <0x0 0xfc000000 0x100000>;
57 reg = <0xfc000000 0x100000>; /* EUMB */
58 bus-frequency = <0>; /* fixed by loader */
62 #size-cells = <0>;
[all …]
H A Dmvme5100.dts26 #size-cells = <0>;
30 reg = <0x0>;
44 reg = <0x0 0x20000000>;
51 ranges = <0x0 0xfef80000 0x10000>;
52 reg = <0xfef80000 0x10000>;
57 reg = <0x8000 0x80>;
68 reg = <0x8200 0x80>;
78 #address-cells = <0>;
82 reg = <0xf3f80000 0x40000>;
92 reg = <0xfec00000 0x400000>;
[all …]
H A Dstx_gp3_8560.dts27 #size-cells = <0>;
29 PowerPC,8560@0 {
31 reg = <0>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
45 reg = <0x00000000 0x10000000>;
52 ranges = <0 0xfdf00000 0x100000>;
53 bus-frequency = <0>;
56 ecm-law@0 {
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dmpc8540ads.dts29 #size-cells = <0>;
31 PowerPC,8540@0 {
33 reg = <0x0>;
36 d-cache-size = <0x8000>; // L1, 32K
37 i-cache-size = <0x8000>; // L1, 32K
38 timebase-frequency = <0>; // 33 MHz, from uboot
39 bus-frequency = <0>; // 166 MHz
40 clock-frequency = <0>; // 825 MHz, from uboot
47 reg = <0x0 0x8000000>; // 128M at 0x0
55 ranges = <0x0 0xe0000000 0x100000>;
[all …]
H A Dmpc8560ads.dts30 #size-cells = <0>;
32 PowerPC,8560@0 {
34 reg = <0x0>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
47 reg = <0x0 0x10000000>;
55 ranges = <0x0 0xe0000000 0x100000>;
58 ecm-law@0 {
60 reg = <0x0 0x1000>;
66 reg = <0x1000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/src/mips/loongson/
H A Dloongson64-2k1000.dtsi15 #size-cells = <0>;
17 cpu0: cpu@0 {
20 reg = <0x0>;
29 reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
30 <0x00000000 0x20000000 0x0000000
[all...]
H A Dls7a-pch.dtsi8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x2000000
[all...]
/freebsd/sys/arm/mv/
H A Dmvreg.h40 #define IRQ_CAUSE_ERROR 0x0
41 #define IRQ_CAUSE 0x4
42 #define IRQ_CAUSE_HI 0x8
43 #define IRQ_MASK_ERROR 0xC
44 #define IRQ_MASK 0x10
45 #define IRQ_MASK_HI 0x14
46 #define IRQ_CAUSE_SELECT 0x18
47 #define FIQ_MASK_ERROR 0x1C
48 #define FIQ_MASK 0x20
49 #define FIQ_MASK_HI 0x24
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amazon/
H A Dalpine-v3.dtsi21 #size-cells = <0>;
23 cpu@0 {
26 reg = <0x0>;
28 d-cache-size = <0x8000>;
31 i-cache-size = <0xc000>;
40 reg = <0x1>;
42 d-cache-size = <0x8000>;
45 i-cache-size = <0xc000>;
54 reg = <0x2>;
56 d-cache-size = <0x800
[all...]
/freebsd/sys/dev/syscons/
H A Dscvgarndr.c54 #define SC_RENDER_DEBUG 0
108 RENDERER(mda, 0, txtrndrsw, vga_set);
109 RENDERER(cga, 0, txtrndrsw, vga_set);
110 RENDERER(ega, 0, txtrndrsw, vga_set);
111 RENDERER(vga, 0, txtrndrsw, vga_set);
161 0xC000, 0xA000, 0x9000, 0x8800, 0x8400, 0x8200, 0x8100, 0x8200,
162 0x8400, 0x8400, 0x8400, 0x9200, 0xB200, 0xA900, 0xC900, 0x8600, }, {
163 0x0000, 0x4000, 0x6000, 0x7000, 0x7800, 0x7C00, 0x7E00, 0x7C00,
164 0x7800, 0x7800, 0x7800, 0x6C00, 0x4C00, 0x4600, 0x0600, 0x0000, },
169 0xC000, 0xA000, 0x9000, 0x8800, 0x8400, 0x8200, 0x8100, 0x8700,
[all …]
/freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/vdev_disk/
H A Dpage_alignment.c65 * physical (order-0) page boundary, as the kernel expects to be able in vdev_disk_check_alignment_cb()
104 return (0); in vdev_disk_check_alignment_cb()
125 512, 0x1000, {
126 { 0x0, 0x1000 },
130 512, 0x400, {
131 { 0x0, 0x1000 },
135 512, 0x400, {
136 { 0x0c00, 0x0400 },
140 512, 0x400, {
141 { 0x0200, 0x0e00 },
[all …]
/freebsd/sys/dev/etherswitch/ar40xx/
H A Dar40xx_hw_psgmii.c88 0, sc->sc_psgmii_mem_size, BUS_SPACE_BARRIER_WRITE); in ar40xx_hw_psgmii_reg_write()
97 0, sc->sc_psgmii_mem_size, BUS_SPACE_BARRIER_READ); in ar40xx_hw_psgmii_reg_read()
109 0x2200); in ar40xx_hw_psgmii_set_mac_mode()
111 0x8380); in ar40xx_hw_psgmii_set_mac_mode()
117 return (0); in ar40xx_hw_psgmii_set_mac_mode()
130 MDIO_WRITEREG(sc->sc_mdio_dev, phy, 0x0, 0x9000); in ar40xx_hw_psgmii_single_phy_testing()
131 MDIO_WRITEREG(sc->sc_mdio_dev, phy, 0x0, 0x4140); in ar40xx_hw_psgmii_single_phy_testing()
133 for (j = 0; j < AR40XX_PSGMII_CALB_NUM; j++) { in ar40xx_hw_psgmii_single_phy_testing()
136 status = MDIO_READREG(sc->sc_mdio_dev, phy, 0x11); in ar40xx_hw_psgmii_single_phy_testing()
151 ar40xx_hw_phy_mmd_write(sc, phy, 7, 0x8029, 0x0000); in ar40xx_hw_psgmii_single_phy_testing()
[all …]
/freebsd/sys/dev/xl/
H A Dif_xlreg.h35 #define XL_EE_READ 0x0080 /* read, 5 bit address */
36 #define XL_EE_WRITE 0x0040 /* write, 5 bit address */
37 #define XL_EE_ERASE 0x00c0 /* erase, 5 bit address */
38 #define XL_EE_EWEN 0x0030 /* erase, no data needed */
39 #define XL_EE_8BIT_READ 0x0200 /* read, 8 bit address */
40 #define XL_EE_BUSY 0x8000
42 #define XL_EE_EADDR0 0x00 /* station address, first word */
43 #define XL_EE_EADDR1 0x01 /* station address, next word, */
44 #define XL_EE_EADDR2 0x02 /* station address, last word */
45 #define XL_EE_PRODID 0x03 /* product ID code */
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210reg.h28 #define PCI_VENDOR_ATHEROS 0x168c
30 #define PCI_PRODUCT_ATHEROS_AR5210 0x0007
31 #define PCI_PRODUCT_ATHEROS_AR5210_OLD 0x0004
34 #define AR_TXDP0 0x0000 /* TX queue pointer 0 register */
35 #define AR_TXDP1 0x0004 /* TX queue pointer 1 register */
36 #define AR_CR 0x0008 /* Command register */
37 #define AR_RXDP 0x000c /* RX queue descriptor ptr register */
38 #define AR_CFG 0x0014 /* Configuration and status register */
39 #define AR_ISR 0x001c /* Interrupt status register */
40 #define AR_IMR 0x0020 /* Interrupt mask register */
[all …]
/freebsd/sys/dev/superio/
H A Dsuperio.c110 bus_write_1(res, 0, reg); in sio_read()
129 bus_write_1(res, 0, reg); in sio_write()
170 printf("ignored attempt to write special register 0x%x\n", reg); in sio_ldn_write()
189 sc->current_ldn = 0xff; in sio_conf_exit()
196 bus_write_1(res, 0, 0x87); in ite_conf_enter()
197 bus_write_1(res, 0, 0x01); in ite_conf_enter()
198 bus_write_1(res, 0, 0x55); in ite_conf_enter()
199 bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa); in ite_conf_enter()
205 sio_write(res, 0x02, 0x02); in ite_conf_exit()
217 bus_write_1(res, 0, 0x87); in nvt_conf_enter()
[all …]
/freebsd/sys/dev/cxgbe/
H A Dt4_vf.c71 {0x4800, "Chelsio T440-dbg VF"},
72 {0x4801, "Chelsio T420-CR VF"},
73 {0x4802, "Chelsio T422-CR VF"},
74 {0x4803, "Chelsio T440-CR VF"},
75 {0x4804, "Chelsio T420-BCH VF"},
76 {0x4805, "Chelsio T440-BCH VF"},
77 {0x4806, "Chelsio T440-CH VF"},
78 {0x4807, "Chelsio T420-SO VF"},
79 {0x4808, "Chelsio T420-CX VF"},
80 {0x4809, "Chelsio T420-BT VF"},
[all …]
/freebsd/sys/dev/ral/
H A Drt2860reg.h23 #define RT2860_PCI_CFG 0x0000
24 #define RT2860_PCI_EECTRL 0x0004
25 #define RT2860_PCI_MCUCTRL 0x0008
26 #define RT2860_PCI_SYSCTRL 0x000c
27 #define RT2860_PCIE_JTAG 0x0010
29 #define RT3090_AUX_CTRL 0x010c
31 #define RT3070_OPT_14 0x0114
34 #define RT2860_INT_STATUS 0x0200
35 #define RT2860_INT_MASK 0x0204
36 #define RT2860_WPDMA_GLO_CFG 0x0208
[all …]
/freebsd/sys/dev/usb/wlan/
H A Dif_runreg.h24 #define RT2860_IFACE_INDEX 0
26 #define RT3070_OPT_14 0x0114
29 #define RT2860_INT_STATUS 0x0200
30 #define RT2860_INT_MASK 0x0204
31 #define RT2860_WPDMA_GLO_CFG 0x0208
32 #define RT2860_WPDMA_RST_IDX 0x020c
33 #define RT2860_DELAY_INT_CFG 0x0210
34 #define RT2860_WMM_AIFSN_CFG 0x0214
35 #define RT2860_WMM_CWMIN_CFG 0x0218
36 #define RT2860_WMM_CWMAX_CFG 0x021c
[all …]
/freebsd/sys/dev/sound/pci/
H A Dmaestro3.c74 enum {CHANGE=0, CALL=1, INTR=2, BORING=3, NONE=-1};
89 { 0x1988125d, ESS_ALLEGRO_1, 50, 800, "ESS Technology Allegro-1" },
90 { 0x1998125d, ESS_MAESTRO3, 20, 500, "ESS Technology Maestro3" },
91 { 0x199a125d, ESS_MAESTRO3, 20, 500, "ESS Technology Maestro3" },
92 { 0, 0, 0, 0, NULL }
98 #define M3_PCHANS 4 /* create /dev/dsp0.[0-N] to use more than one */
101 #define M3_DEFAULT_VOL 0x6800
224 SND_FORMAT(AFMT_U8, 1, 0),
225 SND_FORMAT(AFMT_U8, 2, 0),
226 SND_FORMAT(AFMT_S16_LE, 1, 0),
[all …]
/freebsd/sys/dev/bge/
H A Dif_bgereg.h54 * device register space at offset 0x8000 to read any 32K chunk
60 * accessed directly. NIC memory addresses are offset by 0x01000000.
64 #define BGE_PAGE_ZERO 0x00000000
65 #define BGE_PAGE_ZERO_END 0x000000FF
66 #define BGE_SEND_RING_RCB 0x00000100
67 #define BGE_SEND_RING_RCB_END 0x000001FF
68 #define BGE_RX_RETURN_RING_RCB 0x00000200
69 #define BGE_RX_RETURN_RING_RCB_END 0x000002FF
70 #define BGE_STATS_BLOCK 0x00000300
71 #define BGE_STATS_BLOCK_END 0x00000AFF
[all …]
/freebsd/share/i18n/csmapper/BIG5/
H A DHKSCS%UCS@BMP.src5 SRC_ZONE 0x87-0xFE / 0x40-0xFE / 8
7 DST_INVALID 0xFFFE
13 # Unicode version: 5.1.0
21 0x8740 = 0x43F0
22 0x8741 = 0x4C32
23 0x8742 = 0x4603
24 0x8743 = 0x45A6
25 0x8744 = 0x4578
26 0x8746 = 0x4D77
27 0x8747 = 0x45B3
[all …]
H A DUCS@BMP%HKSCS.src5 SRC_ZONE 0x00A8 - 0xFFED
7 DST_INVALID 0xFFFF
13 # Unicode version: 5.1.0
21 0x00A8 = 0xC6D8
22 0x00C0 = 0x8859
23 0x00C1 = 0x8857
24 0x00C8 = 0x885D
25 0x00C9 = 0x885B
26 #0x00CA + 0x0304 = 0x8862
27 #0x00CA + 0x030C = 0x8864
[all …]

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