arm/mv: Remove pre-armv7 support

Armv4, Armv5, and Armv6 support has been removed. Remove the Marvell
SoCs that used these cores.

Reviewed by: cognet, imp
Sponsored by: Arm Ltd
Differential Revisio

arm/mv: Remove pre-armv7 support

Armv4, Armv5, and Armv6 support has been removed. Remove the Marvell
SoCs that used these cores.

Reviewed by: cognet, imp
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D49497

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sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

make maximum interrupt number tunable on ARM, ARM64, MIPS, and RISC-V

Use a machdep.nirq tunable intead of compile-time constant NIRQ
as a value for maximum number of interrupts. It allows keep a sy

make maximum interrupt number tunable on ARM, ARM64, MIPS, and RISC-V

Use a machdep.nirq tunable intead of compile-time constant NIRQ
as a value for maximum number of interrupts. It allows keep a system
footprint small by default with an option to increase the limit
for large systems like server-grade ARM64

Reviewd by: mhorne
Differential Revision: https://reviews.freebsd.org/D27844
Submitted by: Klara, Inc.
Sponsored by: Ampere Computing

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Enable Marvell gpio driver to work with many controllers

This patch moves all global data structures into mv_gpio_softc,
and puts device_t parameter to functions calls everywhere where needed.
As a

Enable Marvell gpio driver to work with many controllers

This patch moves all global data structures into mv_gpio_softc,
and puts device_t parameter to functions calls everywhere where needed.
As a result, we can create multiple driver instances.

Removed names in function declaration to keep style.

Submitted by: Patryk Duda <pdk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14755

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Introduce port debouncing mechanism in mv_gpio driver

This patch introduces gpio debouncing mechanism
with fixed memory allocation in critical section.

When you press button, value at gpio pin conn

Introduce port debouncing mechanism in mv_gpio driver

This patch introduces gpio debouncing mechanism
with fixed memory allocation in critical section.

When you press button, value at gpio pin connected to button
is changing many times which will cause in unexpected behaviour.
Debouncing mechanism will prevent this phenomenon

Submitted by: Patryk Duda <pdk@semihalf.com>
Wojciech Macek <wma@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14753

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Make Marvell armv7 timer and wdt registers definitions common

Define timers registers for both SoCs and choose proper one during runtime
based on information from FDT.
In WDT driver there are differ

Make Marvell armv7 timer and wdt registers definitions common

Define timers registers for both SoCs and choose proper one during runtime
based on information from FDT.
In WDT driver there are different function for ArmadaXP and other ARMv5 SoCs.
In timer driver registers definitions are stored in resource_spec structure
and chosen during runtime.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14746

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Make Marvell Armada reset registers usage generic

Define reset registers for both Armada38X and ArmadaXP and
choose proper one during runtime based on information from FDT.

Submitted by: Rafal Kozi

Make Marvell Armada reset registers usage generic

Define reset registers for both Armada38X and ArmadaXP and
choose proper one during runtime based on information from FDT.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14745

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Make Marvell Armada watchdog driver more generic

Store platform dependent functions and constants in mv_wdt_config
structure and select proper configuration on runtime based on
compatible string pro

Make Marvell Armada watchdog driver more generic

Store platform dependent functions and constants in mv_wdt_config
structure and select proper configuration on runtime based on
compatible string provided in FDT.
Marvell Armada38X and ArmadaXP non-repetitive registers are moved to
generic part of code.
To support armv5 as well, use proper compatible string:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/watchdog/orion_wdt.c?h=v4.13-rc3#n456

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14740

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Make mv_common.c generic for Marvell Armada38X and ArmadaXP

Preparation for adding Armada38X and ArmadaXP SoC to GENERIC config.
Supported platform are listed in soc_family enum.
struct decode_win_s

Make mv_common.c generic for Marvell Armada38X and ArmadaXP

Preparation for adding Armada38X and ArmadaXP SoC to GENERIC config.
Supported platform are listed in soc_family enum.
struct decode_win_spec contains platform specific functions and constants.
Function mv_check_soc_family checks SoC type and chooses proper structure
in runtime, as well as platform-dependent functions.
Unnecessary dummy functions are removed.
Because of changing registers name to more generic new definition of
FDT_DEVMAP_MAX in mv_machdep is added.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14738

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Split get_sar_value function for Marvell ArmadaXP and Armada38X

get_sar_value is implemented only for ArmadaXP and Armada38X. Splitting it for
two different functions and change registers names resu

Split get_sar_value function for Marvell ArmadaXP and Armada38X

get_sar_value is implemented only for ArmadaXP and Armada38X. Splitting it for
two different functions and change registers names result in more generic code.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14736

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Enable ArmadaXP using INTRNG interrupt controller

Defining INTRNG remove some necessary registers and declarations of
pic_init_secondary, pic_ipi_send, pic_ipi_read and pic_ipi_clear.
Because Marvel

Enable ArmadaXP using INTRNG interrupt controller

Defining INTRNG remove some necessary registers and declarations of
pic_init_secondary, pic_ipi_send, pic_ipi_read and pic_ipi_clear.
Because Marvell ArmadaXP and Armada38X always use INTRNG, include all
INTRNG code and remove code that does not use it.
Separate pic registers declarations for Armada38X are unnecessary, it
works properly with ArmadaXP config.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14734

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Merge ^/head r325999 through r326131.

sys: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 3-Clause license.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for

sys: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 3-Clause license.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

Special thanks to Wind River for providing access to "The Duke of
Highlander" tool: an older (2014) run over FreeBSD tree was useful as a
starting point.

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Merge ^/head r319973 through 321382.

Merge ^/head r319801 through r320041.

Enhance Armada 38x SoC identification string

Add hw_clockrate and CPU frequency, basing on sample-at-reset
configuration.

Submitted by: Arnaud Ysmal <arnaud.ysmal@stormshield.eu>
Marcin Wojtas <m

Enhance Armada 38x SoC identification string

Add hw_clockrate and CPU frequency, basing on sample-at-reset
configuration.

Submitted by: Arnaud Ysmal <arnaud.ysmal@stormshield.eu>
Marcin Wojtas <mw@semihalf.com>
Obtained from: Stormshield, Semihalf
Sponsored by: Stormshield
Reviewed by: andrew
Differential revision: https://reviews.freebsd.org/D10899

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Merge ^/head r318658 through r318963.

Enable SCU Speculative linefills to L2 on Armada 38x

Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.or

Enable SCU Speculative linefills to L2 on Armada 38x

Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10709

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Merge ^/head r316992 through r317215.

Optimize Armada38x low-level MBUS settings

Add early init handler, which comprises various internal
bus optimisations for Armada 38x SoC's. Magic values used
due to undocumented registers.

Submitte

Optimize Armada38x low-level MBUS settings

Add early init handler, which comprises various internal
bus optimisations for Armada 38x SoC's. Magic values used
due to undocumented registers.

Submitted by: Marcin Wojtas <mw@semihalf.com>,
Arnaud Ysmal <arnaud.ysmal@stormshield.eu>
Obtained from: Semihalf, Stormshield
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10219

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Remove code for Marvell SoCs that lack a kernel config.

It seems to be old code from the armv6 project branch that never had a
kernel config.

Reviewed by: mmel
Sponsored by: ABT Systems Lrd
Differe

Remove code for Marvell SoCs that lack a kernel config.

It seems to be old code from the armv6 project branch that never had a
kernel config.

Reviewed by: mmel
Sponsored by: ABT Systems Lrd
Differential Revision: https://reviews.freebsd.org/D7166

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MFH

Sponsored by: The FreeBSD Foundation

Make MPIC compatible with ARM_INTRNG

After ARM_INTRNG introduction, MPIC code needed several modifications:
- IRQ resource and its handler added
- several DEVMETHODs of INTRNG interface implemented

Make MPIC compatible with ARM_INTRNG

After ARM_INTRNG introduction, MPIC code needed several modifications:
- IRQ resource and its handler added
- several DEVMETHODs of INTRNG interface implemented
- defines enhanced to ensure code compiles as well for AXP as for A38X
- added dummy MSI_IRQ, ERR_IRQ defines for Armada38x
- MPIC driver was added to files.armada38x, ARM_INTRNG option enabled in
kernconf file and regs of MPIC corrected in dts file.

Instead of modifying Armada38X DTS, offsets to CPU registers defined in
driver were changed. That required restoring 'reg' property of mpic node
in ArmadaXP to state compliant with Linux DTS.

Additionally, required ARM_INTRNG definitions were added to mv_common.c.

Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: adrian, andrew, ian, skra
Approved by: cognet (mentor)
Differential Revision: https://reviews.freebsd.org/D5030

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Merge ^/head r294169 through r294598.

MFH @r294567