Lines Matching +full:0 +full:x6800
23 #define RT2860_PCI_CFG 0x0000
24 #define RT2860_PCI_EECTRL 0x0004
25 #define RT2860_PCI_MCUCTRL 0x0008
26 #define RT2860_PCI_SYSCTRL 0x000c
27 #define RT2860_PCIE_JTAG 0x0010
29 #define RT3090_AUX_CTRL 0x010c
31 #define RT3070_OPT_14 0x0114
34 #define RT2860_INT_STATUS 0x0200
35 #define RT2860_INT_MASK 0x0204
36 #define RT2860_WPDMA_GLO_CFG 0x0208
37 #define RT2860_WPDMA_RST_IDX 0x020c
38 #define RT2860_DELAY_INT_CFG 0x0210
39 #define RT2860_WMM_AIFSN_CFG 0x0214
40 #define RT2860_WMM_CWMIN_CFG 0x0218
41 #define RT2860_WMM_CWMAX_CFG 0x021c
42 #define RT2860_WMM_TXOP0_CFG 0x0220
43 #define RT2860_WMM_TXOP1_CFG 0x0224
44 #define RT2860_GPIO_CTRL 0x0228
45 #define RT2860_MCU_CMD_REG 0x022c
46 #define RT2860_TX_BASE_PTR(qid) (0x0230 + (qid) * 16)
47 #define RT2860_TX_MAX_CNT(qid) (0x0234 + (qid) * 16)
48 #define RT2860_TX_CTX_IDX(qid) (0x0238 + (qid) * 16)
49 #define RT2860_TX_DTX_IDX(qid) (0x023c + (qid) * 16)
50 #define RT2860_RX_BASE_PTR 0x0290
51 #define RT2860_RX_MAX_CNT 0x0294
52 #define RT2860_RX_CALC_IDX 0x0298
53 #define RT2860_FS_DRX_IDX 0x029c
54 #define RT2860_USB_DMA_CFG 0x02a0 /* RT2870 only */
55 #define RT2860_US_CYC_CNT 0x02a4
58 #define RT2860_SYS_CTRL 0x0400
59 #define RT2860_HOST_CMD 0x0404
60 #define RT2860_PBF_CFG 0x0408
61 #define RT2860_MAX_PCNT 0x040c
62 #define RT2860_BUF_CTRL 0x0410
63 #define RT2860_MCU_INT_STA 0x0414
64 #define RT2860_MCU_INT_ENA 0x0418
65 #define RT2860_TXQ_IO(qid) (0x041c + (qid) * 4)
66 #define RT2860_RX0Q_IO 0x0424
67 #define RT2860_BCN_OFFSET0 0x042c
68 #define RT2860_BCN_OFFSET1 0x0430
69 #define RT2860_TXRXQ_STA 0x0434
70 #define RT2860_TXRXQ_PCNT 0x0438
71 #define RT2860_PBF_DBG 0x043c
72 #define RT2860_CAP_CTRL 0x0440
75 #define RT3070_RF_CSR_CFG 0x0500
76 #define RT3070_EFUSE_CTRL 0x0580
77 #define RT3070_EFUSE_DATA0 0x0590
78 #define RT3070_EFUSE_DATA1 0x0594
79 #define RT3070_EFUSE_DATA2 0x0598
80 #define RT3070_EFUSE_DATA3 0x059c
81 #define RT3090_OSC_CTRL 0x05a4
82 #define RT3070_LDO_CFG0 0x05d4
83 #define RT3070_GPIO_SWITCH 0x05dc
86 #define RT2860_ASIC_VER_ID 0x1000
87 #define RT2860_MAC_SYS_CTRL 0x1004
88 #define RT2860_MAC_ADDR_DW0 0x1008
89 #define RT2860_MAC_ADDR_DW1 0x100c
90 #define RT2860_MAC_BSSID_DW0 0x1010
91 #define RT2860_MAC_BSSID_DW1 0x1014
92 #define RT2860_MAX_LEN_CFG 0x1018
93 #define RT2860_BBP_CSR_CFG 0x101c
94 #define RT2860_RF_CSR_CFG0 0x1020
95 #define RT2860_RF_CSR_CFG1 0x1024
96 #define RT2860_RF_CSR_CFG2 0x1028
97 #define RT2860_LED_CFG 0x102c
100 #define RT2860_DEBUG 0x10f4
103 #define RT2860_XIFS_TIME_CFG 0x1100
104 #define RT2860_BKOFF_SLOT_CFG 0x1104
105 #define RT2860_NAV_TIME_CFG 0x1108
106 #define RT2860_CH_TIME_CFG 0x110c
107 #define RT2860_PBF_LIFE_TIMER 0x1110
108 #define RT2860_BCN_TIME_CFG 0x1114
109 #define RT2860_TBTT_SYNC_CFG 0x1118
110 #define RT2860_TSF_TIMER_DW0 0x111c
111 #define RT2860_TSF_TIMER_DW1 0x1120
112 #define RT2860_TBTT_TIMER 0x1124
113 #define RT2860_INT_TIMER_CFG 0x1128
114 #define RT2860_INT_TIMER_EN 0x112c
115 #define RT2860_CH_IDLE_TIME 0x1130
118 #define RT2860_MAC_STATUS_REG 0x1200
119 #define RT2860_PWR_PIN_CFG 0x1204
120 #define RT2860_AUTO_WAKEUP_CFG 0x1208
123 #define RT2860_EDCA_AC_CFG(aci) (0x1300 + (aci) * 4)
124 #define RT2860_EDCA_TID_AC_MAP 0x1310
125 #define RT2860_TX_PWR_CFG(ridx) (0x1314 + (ridx) * 4)
126 #define RT2860_TX_PIN_CFG 0x1328
127 #define RT2860_TX_BAND_CFG 0x132c
128 #define RT2860_TX_SW_CFG0 0x1330
129 #define RT2860_TX_SW_CFG1 0x1334
130 #define RT2860_TX_SW_CFG2 0x1338
131 #define RT2860_TXOP_THRES_CFG 0x133c
132 #define RT2860_TXOP_CTRL_CFG 0x1340
133 #define RT2860_TX_RTS_CFG 0x1344
134 #define RT2860_TX_TIMEOUT_CFG 0x1348
135 #define RT2860_TX_RTY_CFG 0x134c
136 #define RT2860_TX_LINK_CFG 0x1350
137 #define RT2860_HT_FBK_CFG0 0x1354
138 #define RT2860_HT_FBK_CFG1 0x1358
139 #define RT2860_LG_FBK_CFG0 0x135c
140 #define RT2860_LG_FBK_CFG1 0x1360
141 #define RT2860_CCK_PROT_CFG 0x1364
142 #define RT2860_OFDM_PROT_CFG 0x1368
143 #define RT2860_MM20_PROT_CFG 0x136c
144 #define RT2860_MM40_PROT_CFG 0x1370
145 #define RT2860_GF20_PROT_CFG 0x1374
146 #define RT2860_GF40_PROT_CFG 0x1378
147 #define RT2860_EXP_CTS_TIME 0x137c
148 #define RT2860_EXP_ACK_TIME 0x1380
151 #define RT2860_RX_FILTR_CFG 0x1400
152 #define RT2860_AUTO_RSP_CFG 0x1404
153 #define RT2860_LEGACY_BASIC_RATE 0x1408
154 #define RT2860_HT_BASIC_RATE 0x140c
155 #define RT2860_HT_CTRL_CFG 0x1410
156 #define RT2860_SIFS_COST_CFG 0x1414
157 #define RT2860_RX_PARSER_CFG 0x1418
160 #define RT2860_TX_SEC_CNT0 0x1500
161 #define RT2860_RX_SEC_CNT0 0x1504
162 #define RT2860_CCMP_FC_MUTE 0x1508
165 #define RT2860_TXOP_HLDR_ADDR0 0x1600
166 #define RT2860_TXOP_HLDR_ADDR1 0x1604
167 #define RT2860_TXOP_HLDR_ET 0x1608
168 #define RT2860_QOS_CFPOLL_RA_DW0 0x160c
169 #define RT2860_QOS_CFPOLL_A1_DW1 0x1610
170 #define RT2860_QOS_CFPOLL_QC 0x1614
173 #define RT2860_RX_STA_CNT0 0x1700
174 #define RT2860_RX_STA_CNT1 0x1704
175 #define RT2860_RX_STA_CNT2 0x1708
176 #define RT2860_TX_STA_CNT0 0x170c
177 #define RT2860_TX_STA_CNT1 0x1710
178 #define RT2860_TX_STA_CNT2 0x1714
179 #define RT2860_TX_STAT_FIFO 0x1718
182 #define RT2860_WCID_ENTRY(wcid) (0x1800 + (wcid) * 8)
184 #define RT2860_FW_BASE 0x2000
185 #define RT2870_FW_BASE 0x3000
188 #define RT2860_PKEY(wcid) (0x4000 + (wcid) * 32)
191 #define RT2860_IVEIV(wcid) (0x6000 + (wcid) * 8)
194 #define RT2860_WCID_ATTR(wcid) (0x6800 + (wcid) * 4)
197 #define RT2860_SKEY(vap, kidx) (0x6c00 + (vap) * 128 + (kidx) * 32)
200 #define RT2860_SKEY_MODE_0_7 0x7000
201 #define RT2860_SKEY_MODE_8_15 0x7004
202 #define RT2860_SKEY_MODE_16_23 0x7008
203 #define RT2860_SKEY_MODE_24_31 0x700c
206 #define RT2860_H2M_MAILBOX 0x7010
207 #define RT2860_H2M_MAILBOX_CID 0x7014
208 #define RT2860_H2M_MAILBOX_STATUS 0x701c
209 #define RT2860_H2M_BBPAGENT 0x7028
210 #define RT2860_BCN_BASE(vap) (0x7800 + (vap) * 512)
217 #define RT2860_C (1 << 0)
242 #define RT2860_RX_DLY_INT (1 << 0)
249 #define RT2860_WPDMA_BT_SIZE16 0
256 #define RT2860_TX_DMA_EN (1 << 0)
265 #define RT2860_RST_DTX_IDX0 (1 << 0)
273 #define RT2860_RXMAX_PTIME_SHIFT 0
277 #define RT2860_GPIO_O_SHIFT 0
291 #define RT2860_USB_RX_AGG_TO(x) ((x) & 0xff) /* in unit of 33ns */
297 #define RT2860_US_CYC_CNT_SHIFT 0
312 #define RT2860_MCU_RESET (1 << 0)
315 #define RT2860_MCU_CMD_SLEEP 0x30
316 #define RT2860_MCU_CMD_WAKEUP 0x31
317 #define RT2860_MCU_CMD_LEDS 0x50
318 #define RT2860_MCU_CMD_LED_RSSI 0x51
319 #define RT2860_MCU_CMD_LED1 0x52
320 #define RT2860_MCU_CMD_LED2 0x53
321 #define RT2860_MCU_CMD_LED3 0x54
322 #define RT2860_MCU_CMD_RFRESET 0x72
323 #define RT2860_MCU_CMD_ANTSEL 0x73
324 #define RT2860_MCU_CMD_BBP 0x80
325 #define RT2860_MCU_CMD_PSLEVEL 0x83
349 #define RT2860_READ_RX0Q (1 << 0)
371 #define RT2860_MRX0_INT (1 << 0)
374 #define RT2860_RX0Q_PCNT_MASK 0xff000000
375 #define RT2860_TX2Q_PCNT_MASK 0x00ff0000
376 #define RT2860_TX1Q_PCNT_MASK 0x0000ff00
377 #define RT2860_TX0Q_PCNT_MASK 0x000000ff
384 #define RT2860_START_ADDR_SHIFT 0
393 #define RT3070_EFSROM_AIN_MASK 0x03ff0000
395 #define RT3070_EFSROM_MODE_MASK 0x000000c0
396 #define RT3070_EFUSE_AOUT_MASK 0x0000003f
406 #define RT2860_MAC_SRST (1 << 0)
415 #define RT2860_MAX_PSDU_LEN8K 0
419 #define RT2860_MAX_MPDU_LEN_SHIFT 0
427 #define RT2860_BBP_DATA_SHIFT 0
434 #define RT2860_RF_REG_0_SHIFT 0
438 #define RT2860_RF_REG_1_SHIFT 0
445 #define RT2860_LED_MODE_OFF 0
451 #define RT2860_LED_ON_TIME_SHIFT 0
458 #define RT2860_CCK_SIFS_TIME_SHIFT 0
462 #define RT2860_SLOT_TIME 0
468 #define RT2860_NAV_TIMER_SHIFT 0
475 #define RT2860_CH_STA_TIMER_EN (1 << 0)
482 #define RT2860_TSF_SYNC_MODE_DIS 0
487 #define RT2860_BCN_INTVAL_SHIFT 0
493 #define RT2860_TBTT_ADJUST_SHIFT 0
497 #define RT2860_PRE_TBTT_TIMER_SHIFT 0
501 #define RT2860_PRE_TBTT_INT_EN (1 << 0)
505 #define RT2860_TX_STATUS_BUSY (1 << 0)
511 #define RT2860_IO_RF_PE (1 << 0)
516 #define RT2860_WAKEUP_LEAD_TIME_SHIFT 0
549 #define RT2860_PA_PE_A0_EN (1 << 0)
554 #define RT2860_TX_BAND_SEL (1 << 0)
560 #define RT2860_DLY_TXPE_EN_SHIFT 0
565 #define RT2860_DLY_PAPE_DIS SHIFT 0
571 #define RT2860_DLY_DAC_DIS_SHIFT 0
577 #define RT2860_RDG_OUT_THRES 0
588 #define RT2860_TXOP_TRUN_EN_TIMEOUT (1 << 0)
593 #define RT2860_RTS_RTY_LIMIT_SHIFT 0
606 #define RT2860_SHORT_RTY_LIMIT_SHIFT 0
616 #define RT2860_REMOTE_MFB_LT_SHIFT 0
626 #define RT2860_TXOP_ALLOW_ALL (0x3f << 20)
634 #define RT2860_EXP_CCK_TIME_SHIFT 0
653 #define RT2860_DROP_CRC_ERR (1 << 0)
662 #define RT2860_AUTO_RSP_EN (1 << 0)
666 #define RT2860_CCK_SIFS_COST_SHIFT 0
674 #define RT2860_PER_RX_RST_EN (1 << 0)
683 #define RT2860_TXQ_VLD (1 << 0)
686 #define RT2860_MODE_NOSEC 0
694 #define RT2860_RX_PKEY_EN (1 << 0)
698 #define RT2860_TOKEN_NO_INTR 0xff
706 #define RT3070_RF_BLOCK (1 << 0)
716 #define RT3070_TUNE (1 << 0)
732 #define RT3070_BB_LOOPBACK (1 << 0)
735 #define RT3593_VCO (1 << 0)
747 #define RT3593_LDO_PLL_VC_MASK 0x0e
748 #define RT3593_LDO_RF_VC_MASK 0xe0
751 #define RT3593_CP_IC_MASK 0xe0
777 uint32_t sdp0; /* Segment Data Pointer 0 */
782 uint16_t sdl0; /* Segment Data Length 0 */
790 #define RT2860_TX_QSEL_MGMT (0 << 1)
793 #define RT2860_TX_WIV (1 << 0)
811 #define RT2860_TX_FRAG (1 << 0)
814 #define RT2860_TX_TXOP_HT 0
820 #define RT2860_PHY_MODE 0xc000
821 #define RT2860_PHY_CCK (0 << 14)
827 #define RT2860_PHY_MCS 0x7f
833 #define RT2860_TX_ACK (1 << 0)
869 #define RT2860_RX_BA (1 << 0)
902 #define RT2860_RF1 0
907 #define RT2860_RF_2820 0x0001 /* 2T3R */
908 #define RT2860_RF_2850 0x0002 /* dual-band 2T3R */
909 #define RT2860_RF_2720 0x0003 /* 1T2R */
910 #define RT2860_RF_2750 0x0004 /* dual-band 1T2R */
911 #define RT3070_RF_3020 0x0005 /* 1T1R */
912 #define RT3070_RF_2020 0x0006 /* b/g */
913 #define RT3070_RF_3021 0x0007 /* 1T2R */
914 #define RT3070_RF_3022 0x0008 /* 2T2R */
915 #define RT3070_RF_3052 0x0009 /* dual-band 2T2R */
916 #define RT3070_RF_3320 0x000b /* 1T1R */
917 #define RT3070_RF_3053 0x000d /* dual-band 3T3R */
918 #define RT5390_RF_5360 0x5360 /* 1T1R */
919 #define RT5390_RF_5390 0x5390 /* 1T1R */
930 #define RT2860_EEPROM_CHIPID 0x00
931 #define RT2860_EEPROM_VERSION 0x01
932 #define RT2860_EEPROM_MAC01 0x02
933 #define RT2860_EEPROM_MAC23 0x03
934 #define RT2860_EEPROM_MAC45 0x04
935 #define RT2860_EEPROM_PCIE_PSLEVEL 0x11
936 #define RT2860_EEPROM_REV 0x12
937 #define RT2860_EEPROM_ANTENNA 0x1a
938 #define RT2860_EEPROM_CONFIG 0x1b
939 #define RT2860_EEPROM_COUNTRY 0x1c
940 #define RT2860_EEPROM_FREQ_LEDS 0x1d
941 #define RT2860_EEPROM_LED1 0x1e
942 #define RT2860_EEPROM_LED2 0x1f
943 #define RT2860_EEPROM_LED3 0x20
944 #define RT2860_EEPROM_LNA 0x22
945 #define RT2860_EEPROM_RSSI1_2GHZ 0x23
946 #define RT2860_EEPROM_RSSI2_2GHZ 0x24
947 #define RT2860_EEPROM_RSSI1_5GHZ 0x25
948 #define RT2860_EEPROM_RSSI2_5GHZ 0x26
949 #define RT2860_EEPROM_DELTAPWR 0x28
950 #define RT2860_EEPROM_PWR2GHZ_BASE1 0x29
951 #define RT2860_EEPROM_PWR2GHZ_BASE2 0x30
952 #define RT2860_EEPROM_TSSI1_2GHZ 0x37
953 #define RT2860_EEPROM_TSSI2_2GHZ 0x38
954 #define RT2860_EEPROM_TSSI3_2GHZ 0x39
955 #define RT2860_EEPROM_TSSI4_2GHZ 0x3a
956 #define RT2860_EEPROM_TSSI5_2GHZ 0x3b
957 #define RT2860_EEPROM_PWR5GHZ_BASE1 0x3c
958 #define RT2860_EEPROM_PWR5GHZ_BASE2 0x53
959 #define RT2860_EEPROM_TSSI1_5GHZ 0x6a
960 #define RT2860_EEPROM_TSSI2_5GHZ 0x6b
961 #define RT2860_EEPROM_TSSI3_5GHZ 0x6c
962 #define RT2860_EEPROM_TSSI4_5GHZ 0x6d
963 #define RT2860_EEPROM_TSSI5_5GHZ 0x6e
964 #define RT2860_EEPROM_RPWR 0x6f
965 #define RT2860_EEPROM_BBP_BASE 0x78
966 #define RT3071_EEPROM_RF_BASE 0x82
968 #define RT2860_RIDX_CCK1 0
980 { 2, 0, IEEE80211_T_DS, 0, 314, 314 },
984 { 12, 0, IEEE80211_T_OFDM, 4, 60, 60 },
1004 bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \
1008 bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \
1026 } while (/* CONSTCOND */0)
1032 { RT2860_BCN_OFFSET0, 0xf8f0e8e0 }, \
1033 { RT2860_BCN_OFFSET1, 0x6f77d0c8 }, \
1034 { RT2860_LEGACY_BASIC_RATE, 0x0000013f }, \
1035 { RT2860_HT_BASIC_RATE, 0x00008003 }, \
1036 { RT2860_MAC_SYS_CTRL, 0x00000000 }, \
1037 { RT2860_RX_FILTR_CFG, 0x00017f97 }, \
1038 { RT2860_BKOFF_SLOT_CFG, 0x00000209 }, \
1039 { RT2860_TX_SW_CFG0, 0x00000000 }, \
1040 { RT2860_TX_SW_CFG1, 0x00080606 }, \
1041 { RT2860_TX_LINK_CFG, 0x00001020 }, \
1042 { RT2860_TX_TIMEOUT_CFG, 0x000a2090 }, \
1043 { RT2860_MAX_LEN_CFG, 0x00001f00 }, \
1044 { RT2860_LED_CFG, 0x7f031e46 }, \
1045 { RT2860_WMM_AIFSN_CFG, 0x00002273 }, \
1046 { RT2860_WMM_CWMIN_CFG, 0x00002344 }, \
1047 { RT2860_WMM_CWMAX_CFG, 0x000034aa }, \
1048 { RT2860_MAX_PCNT, 0x1f3fbf9f }, \
1049 { RT2860_TX_RTY_CFG, 0x47d01f0f }, \
1050 { RT2860_AUTO_RSP_CFG, 0x00000013 }, \
1051 { RT2860_CCK_PROT_CFG, 0x05740003 }, \
1052 { RT2860_OFDM_PROT_CFG, 0x05740003 }, \
1053 { RT2860_GF20_PROT_CFG, 0x01744004 }, \
1054 { RT2860_GF40_PROT_CFG, 0x03f44084 }, \
1055 { RT2860_MM20_PROT_CFG, 0x01744004 }, \
1056 { RT2860_MM40_PROT_CFG, 0x03f54084 }, \
1057 { RT2860_TXOP_CTRL_CFG, 0x0000583f }, \
1058 { RT2860_TX_RTS_CFG, 0x00092b20 }, \
1059 { RT2860_EXP_ACK_TIME, 0x002400ca }, \
1060 { RT2860_TXOP_HLDR_ET, 0x00000002 }, \
1061 { RT2860_XIFS_TIME_CFG, 0x33a41010 }, \
1062 { RT2860_PWR_PIN_CFG, 0x00000003 }
1068 { 65, 0x2c }, \
1069 { 66, 0x38 }, \
1070 { 68, 0x0b }, \
1071 { 69, 0x12 }, \
1072 { 70, 0x0a }, \
1073 { 73, 0x10 }, \
1074 { 81, 0x37 }, \
1075 { 82, 0x62 }, \
1076 { 83, 0x6a }, \
1077 { 84, 0x99 }, \
1078 { 86, 0x00 }, \
1079 { 91, 0x04 }, \
1080 { 92, 0x00 }, \
1081 { 103, 0x00 }, \
1082 { 105, 0x05 }, \
1083 { 106, 0x35 }
1086 { 31, 0x08 }, \
1087 { 65, 0x2c }, \
1088 { 66, 0x38 }, \
1089 { 68, 0x0b }, \
1090 { 69, 0x12 }, \
1091 { 70, 0x0a }, \
1092 { 73, 0x13 }, \
1093 { 75, 0x46 }, \
1094 { 76, 0x28 }, \
1095 { 77, 0x59 }, \
1096 { 81, 0x37 }, \
1097 { 82, 0x62 }, \
1098 { 83, 0x7a }, \
1099 { 84, 0x19 }, \
1100 { 86, 0x38 }, \
1101 { 91, 0x04 }, \
1102 { 92, 0x02 }, \
1103 { 103, 0xc0 }, \
1104 { 104, 0x92 }, \
1105 { 105, 0x3c }, \
1106 { 106, 0x03 }, \
1107 { 128, 0x12 }, \
1113 { 1, 0x100bb3, 0x1301e1, 0x05a014, 0x001402 }, \
1114 { 2, 0x100bb3, 0x1301e1, 0x05a014, 0x001407 }, \
1115 { 3, 0x100bb3, 0x1301e2, 0x05a014, 0x001402 }, \
1116 { 4, 0x100bb3, 0x1301e2, 0x05a014, 0x001407 }, \
1117 { 5, 0x100bb3, 0x1301e3, 0x05a014, 0x001402 }, \
1118 { 6, 0x100bb3, 0x1301e3, 0x05a014, 0x001407 }, \
1119 { 7, 0x100bb3, 0x1301e4, 0x05a014, 0x001402 }, \
1120 { 8, 0x100bb3, 0x1301e4, 0x05a014, 0x001407 }, \
1121 { 9, 0x100bb3, 0x1301e5, 0x05a014, 0x001402 }, \
1122 { 10, 0x100bb3, 0x1301e5, 0x05a014, 0x001407 }, \
1123 { 11, 0x100bb3, 0x1301e6, 0x05a014, 0x001402 }, \
1124 { 12, 0x100bb3, 0x1301e6, 0x05a014, 0x001407 }, \
1125 { 13, 0x100bb3, 0x1301e7, 0x05a014, 0x001402 }, \
1126 { 14, 0x100bb3, 0x1301e8, 0x05a014, 0x001404 }, \
1127 { 36, 0x100bb3, 0x130266, 0x056014, 0x001408 }, \
1128 { 38, 0x100bb3, 0x130267, 0x056014, 0x001404 }, \
1129 { 40, 0x100bb2, 0x1301a0, 0x056014, 0x001400 }, \
1130 { 44, 0x100bb2, 0x1301a0, 0x056014, 0x001408 }, \
1131 { 46, 0x100bb2, 0x1301a1, 0x056014, 0x001402 }, \
1132 { 48, 0x100bb2, 0x1301a1, 0x056014, 0x001406 }, \
1133 { 52, 0x100bb2, 0x1301a2, 0x056014, 0x001404 }, \
1134 { 54, 0x100bb2, 0x1301a2, 0x056014, 0x001408 }, \
1135 { 56, 0x100bb2, 0x1301a3, 0x056014, 0x001402 }, \
1136 { 60, 0x100bb2, 0x1301a4, 0x056014, 0x001400 }, \
1137 { 62, 0x100bb2, 0x1301a4, 0x056014, 0x001404 }, \
1138 { 64, 0x100bb2, 0x1301a4, 0x056014, 0x001408 }, \
1139 { 100, 0x100bb2, 0x1301ac, 0x05e014, 0x001400 }, \
1140 { 102, 0x100bb2, 0x1701ac, 0x15e014, 0x001404 }, \
1141 { 104, 0x100bb2, 0x1701ac, 0x15e014, 0x001408 }, \
1142 { 108, 0x100bb3, 0x17028c, 0x15e014, 0x001404 }, \
1143 { 110, 0x100bb3, 0x13028d, 0x05e014, 0x001400 }, \
1144 { 112, 0x100bb3, 0x13028d, 0x05e014, 0x001406 }, \
1145 { 116, 0x100bb3, 0x13028e, 0x05e014, 0x001408 }, \
1146 { 118, 0x100bb3, 0x13028f, 0x05e014, 0x001404 }, \
1147 { 120, 0x100bb1, 0x1300e0, 0x05e014, 0x001400 }, \
1148 { 124, 0x100bb1, 0x1300e0, 0x05e014, 0x001404 }, \
1149 { 126, 0x100bb1, 0x1300e0, 0x05e014, 0x001406 }, \
1150 { 128, 0x100bb1, 0x1300e0, 0x05e014, 0x001408 }, \
1151 { 132, 0x100bb1, 0x1300e1, 0x05e014, 0x001402 }, \
1152 { 134, 0x100bb1, 0x1300e1, 0x05e014, 0x001404 }, \
1153 { 136, 0x100bb1, 0x1300e1, 0x05e014, 0x001406 }, \
1154 { 140, 0x100bb1, 0x1300e2, 0x05e014, 0x001400 }, \
1155 { 149, 0x100bb1, 0x1300e2, 0x05e014, 0x001409 }, \
1156 { 151, 0x100bb1, 0x1300e3, 0x05e014, 0x001401 }, \
1157 { 153, 0x100bb1, 0x1300e3, 0x05e014, 0x001403 }, \
1158 { 157, 0x100bb1, 0x1300e3, 0x05e014, 0x001407 }, \
1159 { 159, 0x100bb1, 0x1300e3, 0x05e014, 0x001409 }, \
1160 { 161, 0x100bb1, 0x1300e4, 0x05e014, 0x001401 }, \
1161 { 165, 0x100bb1, 0x1300e4, 0x05e014, 0x001405 }, \
1162 { 167, 0x100bb1, 0x1300f4, 0x05e014, 0x001407 }, \
1163 { 169, 0x100bb1, 0x1300f4, 0x05e014, 0x001409 }, \
1164 { 171, 0x100bb1, 0x1300f5, 0x05e014, 0x001401 }, \
1165 { 173, 0x100bb1, 0x1300f5, 0x05e014, 0x001403 }
1168 { 0xf1, 2, 2 }, \
1169 { 0xf1, 2, 7 }, \
1170 { 0xf2, 2, 2 }, \
1171 { 0xf2, 2, 7 }, \
1172 { 0xf3, 2, 2 }, \
1173 { 0xf3, 2, 7 }, \
1174 { 0xf4, 2, 2 }, \
1175 { 0xf4, 2, 7 }, \
1176 { 0xf5, 2, 2 }, \
1177 { 0xf5, 2, 7 }, \
1178 { 0xf6, 2, 2 }, \
1179 { 0xf6, 2, 7 }, \
1180 { 0xf7, 2, 2 }, \
1181 { 0xf8, 2, 4 }, \
1182 { 0x56, 0, 4 }, \
1183 { 0x56, 0, 6 }, \
1184 { 0x56, 0, 8 }, \
1185 { 0x57, 0, 0 }, \
1186 { 0x57, 0, 2 }, \
1187 { 0x57, 0, 4 }, \
1188 { 0x57, 0, 8 }, \
1189 { 0x57, 0, 10 }, \
1190 { 0x58, 0, 0 }, \
1191 { 0x58, 0, 4 }, \
1192 { 0x58, 0, 6 }, \
1193 { 0x58, 0, 8 }, \
1194 { 0x5b, 0, 8 }, \
1195 { 0x5b, 0, 10 }, \
1196 { 0x5c, 0, 0 }, \
1197 { 0x5c, 0, 4 }, \
1198 { 0x5c, 0, 6 }, \
1199 { 0x5c, 0, 8 }, \
1200 { 0x5d, 0, 0 }, \
1201 { 0x5d, 0, 2 }, \
1202 { 0x5d, 0, 4 }, \
1203 { 0x5d, 0, 8 }, \
1204 { 0x5d, 0, 10 }, \
1205 { 0x5e, 0, 0 }, \
1206 { 0x5e, 0, 4 }, \
1207 { 0x5e, 0, 6 }, \
1208 { 0x5e, 0, 8 }, \
1209 { 0x5f, 0, 0 }, \
1210 { 0x5f, 0, 9 }, \
1211 { 0x5f, 0, 11 }, \
1212 { 0x60, 0, 1 }, \
1213 { 0x60, 0, 5 }, \
1214 { 0x60, 0, 7 }, \
1215 { 0x60, 0, 9 }, \
1216 { 0x61, 0, 1 }, \
1217 { 0x61, 0, 3 }, \
1218 { 0x61, 0, 5 }, \
1219 { 0x61, 0, 7 }, \
1220 { 0x61, 0, 9 }
1223 { 4, 0x40 }, \
1224 { 5, 0x03 }, \
1225 { 6, 0x02 }, \
1226 { 7, 0x60 }, \
1227 { 9, 0x0f }, \
1228 { 10, 0x41 }, \
1229 { 11, 0x21 }, \
1230 { 12, 0x7b }, \
1231 { 14, 0x90 }, \
1232 { 15, 0x58 }, \
1233 { 16, 0xb3 }, \
1234 { 17, 0x92 }, \
1235 { 18, 0x2c }, \
1236 { 19, 0x02 }, \
1237 { 20, 0xba }, \
1238 { 21, 0xdb }, \
1239 { 24, 0x16 }, \
1240 { 25, 0x03 }, \
1241 { 29, 0x1f }
1244 { 1, 0x0f }, \
1245 { 2, 0x80 }, \
1246 { 3, 0x88 }, \
1247 { 5, 0x10 }, \
1248 { 6, 0xe0 }, \
1249 { 7, 0x00 }, \
1250 { 10, 0x53 }, \
1251 { 11, 0x4a }, \
1252 { 12, 0x46 }, \
1253 { 13, 0x9f }, \
1254 { 14, 0x00 }, \
1255 { 15, 0x00 }, \
1256 { 16, 0x00 }, \
1257 { 18, 0x03 }, \
1258 { 19, 0x00 }, \
1259 { 20, 0x00 }, \
1260 { 21, 0x00 }, \
1261 { 22, 0x20 }, \
1262 { 23, 0x00 }, \
1263 { 24, 0x00 }, \
1264 { 25, 0x80 }, \
1265 { 26, 0x00 }, \
1266 { 27, 0x09 }, \
1267 { 28, 0x00 }, \
1268 { 29, 0x10 }, \
1269 { 30, 0x10 }, \
1270 { 31, 0x80 }, \
1271 { 32, 0x80 }, \
1272 { 33, 0x00 }, \
1273 { 34, 0x07 }, \
1274 { 35, 0x12 }, \
1275 { 36, 0x00 }, \
1276 { 37, 0x08 }, \
1277 { 38, 0x85 }, \
1278 { 39, 0x1b }, \
1279 { 40, 0x0b }, \
1280 { 41, 0xbb }, \
1281 { 42, 0xd2 }, \
1282 { 43, 0x9a }, \
1283 { 44, 0x0e }, \
1284 { 45, 0xa2 }, \
1285 { 46, 0x73 }, \
1286 { 47, 0x00 }, \
1287 { 48, 0x10 }, \
1288 { 49, 0x94 }, \
1289 { 52, 0x38 }, \
1290 { 53, 0x00 }, \
1291 { 54, 0x78 }, \
1292 { 55, 0x23 }, \
1293 { 56, 0x22 }, \
1294 { 57, 0x80 }, \
1295 { 58, 0x7f }, \
1296 { 59, 0x07 }, \
1297 { 60, 0x45 }, \
1298 { 61, 0xd1 }, \
1299 { 62, 0x00 }, \
1300 { 63, 0x00 }
1303 { 1, 0x17 }, \
1304 { 2, 0x80 }, \
1305 { 3, 0x88 }, \
1306 { 5, 0x10 }, \
1307 { 6, 0xe0 }, \
1308 { 7, 0x00 }, \
1309 { 10, 0x53 }, \
1310 { 11, 0x4a }, \
1311 { 12, 0x46 }, \
1312 { 13, 0x9f }, \
1313 { 14, 0x00 }, \
1314 { 15, 0x00 }, \
1315 { 16, 0x00 }, \
1316 { 18, 0x03 }, \
1317 { 19, 0x4d }, \
1318 { 20, 0x00 }, \
1319 { 21, 0x8d }, \
1320 { 22, 0x20 }, \
1321 { 23, 0x0b }, \
1322 { 24, 0x44 }, \
1323 { 25, 0x80 }, \
1324 { 26, 0x82 }, \
1325 { 27, 0x09 }, \
1326 { 28, 0x00 }, \
1327 { 29, 0x10 }, \
1328 { 30, 0x10 }, \
1329 { 31, 0x80 }, \
1330 { 32, 0x80 }, \
1331 { 33, 0xc0 }, \
1332 { 34, 0x07 }, \
1333 { 35, 0x12 }, \
1334 { 36, 0x00 }, \
1335 { 37, 0x08 }, \
1336 { 38, 0x89 }, \
1337 { 39, 0x1b }, \
1338 { 40, 0x0f }, \
1339 { 41, 0xbb }, \
1340 { 42, 0xd5 }, \
1341 { 43, 0x9b }, \
1342 { 44, 0x0e }, \
1343 { 45, 0xa2 }, \
1344 { 46, 0x73 }, \
1345 { 47, 0x0c }, \
1346 { 48, 0x10 }, \
1347 { 49, 0x94 }, \
1348 { 50, 0x94 }, \
1349 { 51, 0x3a }, \
1350 { 52, 0x48 }, \
1351 { 53, 0x44 }, \
1352 { 54, 0x38 }, \
1353 { 55, 0x43 }, \
1354 { 56, 0xa1 }, \
1355 { 57, 0x00 }, \
1356 { 58, 0x39 }, \
1357 { 59, 0x07 }, \
1358 { 60, 0x45 }, \
1359 { 61, 0x91 }, \
1360 { 62, 0x39 }, \
1361 { 63, 0x00 }