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/linux/arch/arm64/boot/dts/renesas/
H A Dwhite-hawk-cpu-common.dtsi32 #clock-cells = <0>;
39 pinctrl-0 = <&keys_pins>;
43 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
71 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
95 reg = <0x0 0x48000000 0x0 0x78000000>;
100 reg = <0x4 0x80000000 0x0 0x80000000>;
105 reg = <0x6 0x00000000 0x1 0x00000000>;
123 #clock-cells = <0>;
155 pinctrl-0 = <&avb0_pins>;
163 #size-cells = <0>;
[all …]
H A Dr8a779h0-gray-hawk-single.dts52 #phy-cells = <0>;
65 pinctrl-0 = <&keys_pins>;
69 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
97 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
121 reg = <0x0 0x48000000 0x0 0x78000000>;
126 reg = <0x4 0x80000000 0x1 0x80000000>;
132 #clock-cells = <0>;
173 pinctrl-0 = <&avb0_pins>;
179 phy0: ethernet-phy@0 {
183 reg = <0>;
[all …]
/linux/arch/arm64/boot/dts/amd/
H A Delba-flash-parts.dtsi11 partition@0 {
13 reg = <0x0 0x10000>;
19 reg = <0x10000 0xfff0000>;
24 reg = <0xf0000 0x10000>;
29 reg = <0x100000 0x80000>;
34 reg = <0x180000 0x200000>;
39 reg = <0x380000 0x10000>;
44 reg = <0x390000 0x10000>;
49 reg = <0x400000 0x3c00000>;
54 reg = <0x4010000 0x20000>;
[all …]
/linux/Documentation/devicetree/bindings/mtd/partitions/
H A Dnvmem-cells.yaml45 reg = <0x1200000 0x0140000>;
51 macaddr_gmac1: macaddr_gmac1@0 {
52 reg = <0x0 0x6>;
56 reg = <0x6 0x6>;
60 reg = <0x1000 0x2f20>;
64 reg = <0x5000 0x2f20>;
73 partition@0 {
75 reg = <0x000000 0x100000>;
82 reg = <0x100000 0xe00000>;
88 reg = <0xf00000 0x100000>;
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dmscc,vsc7514-switch.yaml132 reg = <0x1010000 0x10000>,
133 <0x1030000 0x10000>,
134 <0x1080000 0x100>,
135 <0x10e0000 0x10000>,
136 <0x11e0000 0x100>,
137 <0x11f0000 0x100>,
138 <0x1200000 0x100>,
139 <0x1210000 0x100>,
140 <0x1220000 0x100>,
141 <0x1230000 0x100>,
[all …]
/linux/arch/mips/boot/dts/mscc/
H A Docelot.dtsi11 #size-cells = <0>;
13 cpu@0 {
17 reg = <0>;
26 #address-cells = <0>;
34 #clock-cells = <0>;
40 #clock-cells = <0>;
50 ranges = <0 0x70000000 0x2000000>;
54 cpu_ctrl: syscon@0 {
56 reg = <0x0 0x2c>;
61 reg = <0x70 0x70>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8953-xiaomi-tissot.dts21 qcom,msm-id = <293 0>;
22 qcom,board-id = <0x1000b 0x00>;
28 pinctrl-0 = <&gpio_key_default>, <&gpio_hall_sensor_default>;
47 reg = <0x0 0x84a00000 0x0 0x1900000>;
52 reg = <0x0 0x8d600000 0x0 0x1200000>;
57 reg = <0x0 0x8e800000 0x0 0x700000>;
63 reg = <0x0 0x9ff00000 0x0 0x00100000>;
64 record-size = <0x1000>;
65 console-size = <0x80000>;
66 ftrace-size = <0x1000>;
[all …]
H A Dmsm8953-xiaomi-daisy.dts19 qcom,msm-id = <293 0>;
20 qcom,board-id = <0x1000b 0x9>;
29 reg = <0 0x90001000 0 (1920 * 2280 * 3)>;
52 pinctrl-0 = <&gpio_key_default>;
63 reg = <0x0 0x84a00000 0x0 0x1900000>;
68 reg = <0x0 0x8d600000 0x0 0x1200000>;
73 reg = <0x0 0x8e800000 0x0 0x700000>;
88 #size-cells = <0>;
92 reg = <0x6a>;
95 mount-matrix = "-1", "0", "0",
[all …]
H A Dmsm8953-xiaomi-vince.dts22 qcom,msm-id = <293 0>;
23 qcom,board-id = <0x1000b 0x08>;
29 pinctrl-0 = <&gpio_key_default>;
40 reg = <0x0 0x84a00000 0x0 0x1900000>;
45 reg = <0x0 0x90001000 0x0 (1080 * 2160 * 3)>;
50 reg = <0x0 0x8d600000 0x0 0x1200000>;
55 reg = <0x0 0x8e800000 0x0 0x700000>;
61 reg = <0x0 0x9ff00000 0x0 0x100000>;
62 record-size = <0x1000>;
63 console-size = <0x80000>;
[all …]
H A Dsdm850-samsung-w737.dts50 reg = <0 0x80400000 0 (1920 * 1280 * 4)>;
66 reg = <0x0 0x80400000 0x0 0x960000>;
71 reg = <0 0x8b500000 0 0xa00000>;
76 reg = <0 0x8c400000 0 0x100000>;
81 reg = <0 0x8c500000 0 0x1200000>;
86 reg = <0 0x8d700000 0 0x100000>;
91 reg = <0 0x8d800000 0 0x5000>;
96 reg = <0 0x8e000000 0 0x8000000>;
101 reg = <0 0x96000000 0 0x2000000>;
106 reg = <0 0x98000000 0 0x800000>;
[all …]
H A Dqcm6490-idp.dts44 pinctrl-0 = <&pmic_lcd_bl_en>;
59 pinctrl-0 = <&lcd_disp_bias_en>;
66 pinctrl-0 = <&key_vol_up_default>;
81 reg = <0x0 0x80700000 0x0 0x100000>;
86 reg = <0x0 0x81800000 0x0 0x1e00000>;
91 reg = <0x0 0x84300000 0x0 0x500000>;
96 reg = <0x0 0x84800000 0x0 0x1900000>;
101 reg = <0x0 0x86100000 0x0 0x2800000>;
106 reg = <0x0 0x88900000 0x0 0x1e00000>;
111 reg = <0x0 0x8a700000 0x0 0x700000>;
[all …]
H A Dsa8775p.dtsi29 #clock-cells = <0>;
34 #clock-cells = <0>;
40 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0x0 0x0>;
47 qcom,freq-domain = <&cpufreq_hw 0>;
67 reg = <0x0 0x100>;
69 qcom,freq-domain = <&cpufreq_hw 0>;
84 reg = <0x0 0x200>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
/linux/sound/soc/amd/raven/
H A Dchip_offset_byte.h12 #define mmACP_DMA_CNTL_0 0x1240000
13 #define mmACP_DMA_CNTL_1 0x1240004
14 #define mmACP_DMA_CNTL_2 0x1240008
15 #define mmACP_DMA_CNTL_3 0x124000C
16 #define mmACP_DMA_CNTL_4 0x1240010
17 #define mmACP_DMA_CNTL_5 0x1240014
18 #define mmACP_DMA_CNTL_6 0x1240018
19 #define mmACP_DMA_CNTL_7 0x124001C
20 #define mmACP_DMA_DSCR_STRT_IDX_0 0x1240020
21 #define mmACP_DMA_DSCR_STRT_IDX_1 0x1240024
[all …]
/linux/drivers/mfd/
H A Dtimberdale.c64 I2C_BOARD_INFO("tsc2007", 0x48),
179 .gpio_base = 0,
243 I2C_BOARD_INFO("adv7180", 0x42 >> 1),
250 .i2c_adapter = 0,
271 I2C_BOARD_INFO("tef6862", 0x60)
275 I2C_BOARD_INFO("saa7706h", 0x1C)
280 .i2c_adapter = 0,
293 starting at 0x1200000
662 mapbase = pci_resource_start(dev, 0); in timb_probe()
706 for (i = 0; i < TIMBERDALE_NR_IRQS; i++) in timb_probe()
[all …]
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dtvnv17.c54 uint32_t sample = 0; in nv42_tv_sample_load()
57 #define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20) in nv42_tv_sample_load()
58 testval = RGB_TEST_DATA(0x82, 0xeb, 0x82); in nv42_tv_sample_load()
62 dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); in nv42_tv_sample_load()
63 head = (dacclk & 0x100) >> 8; in nv42_tv_sample_load()
66 gpio1 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC1, 0xff); in nv42_tv_sample_load()
67 gpio0 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC0, 0xff); in nv42_tv_sample_load()
72 test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv42_tv_sample_load()
73 ctv_1c = NVReadRAMDAC(dev, head, 0x680c1c); in nv42_tv_sample_load()
74 ctv_14 = NVReadRAMDAC(dev, head, 0x680c14); in nv42_tv_sample_load()
[all …]
/linux/drivers/crypto/cavium/nitrox/
H A Dnitrox_csr.h21 #define EMU_BIST_STATUSX(_i) (0x1402700 + ((_i) * 0x40000))
22 #define UCD_BIST_STATUS 0x12C0070
23 #define NPS_CORE_BIST_REG 0x10000E8
24 #define NPS_CORE_NPC_BIST_REG 0x1000128
25 #define NPS_PKT_SLC_BIST_REG 0x1040088
26 #define NPS_PKT_IN_BIST_REG 0x1040100
27 #define POM_BIST_REG 0x11C0100
28 #define BMI_BIST_REG 0x1140080
29 #define EFL_CORE_BIST_REGX(_i) (0x1240100 + ((_i) * 0x400))
30 #define EFL_TOP_BIST_STAT 0x1241090
[all …]
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hw.c15 #define OCM_WIN_P3P(addr) (addr & 0xffc0000)
19 #define CRB_BLK(off) ((off >> 20) & 0x3f)
20 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
21 #define CRB_WINDOW_2M (0x130060)
22 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
23 #define CRB_INDIRECT_2M (0x1e0000UL)
52 {{{0, 0, 0, 0} } }, /* 0: PCI */
53 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
54 {1, 0x0110000, 0x0120000, 0x130000},
55 {1, 0x0120000, 0x0122000, 0x124000},
[all …]
/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic_hw.c16 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
18 #define MS_WIN(addr) (addr & 0x0ffc0000)
22 #define CRB_BLK(off) ((off >> 20) & 0x3f)
23 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
24 #define CRB_WINDOW_2M (0x130060)
25 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
26 #define CRB_INDIRECT_2M (0x1e0000UL)
57 {{{0, 0, 0, 0} } }, /* 0: PCI */
58 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_1_d.h27 #define mmMM_INDEX 0x0
28 #define mmMM_INDEX_HI 0x6
29 #define mmMM_DATA 0x1
30 #define mmBIF_MM_INDACCESS_CNTL 0x1500
31 #define mmBUS_CNTL 0x1508
32 #define mmCONFIG_CNTL 0x1509
33 #define mmCONFIG_MEMSIZE 0x150a
34 #define mmCONFIG_F0_BASE 0x150b
35 #define mmCONFIG_APER_SIZE 0x150c
36 #define mmCONFIG_REG_APER_SIZE 0x150d
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_nx.c15 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | \
16 ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | \
18 ((addr >> 25) & 0x3ff))
19 #define MS_WIN(addr) (addr & 0x0ffc0000)
20 #define QLA82XX_PCI_MN_2M (0)
21 #define QLA82XX_PCI_MS_2M (0x80000)
22 #define QLA82XX_PCI_OCM0_2M (0xc0000)
23 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
25 #define BLOCK_PROTECT_BITS 0x0F
[all …]
/linux/drivers/scsi/qla4xxx/
H A Dql4_nx.c18 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
19 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
20 #define MS_WIN(addr) (addr & 0x0ffc0000)
21 #define QLA82XX_PCI_MN_2M (0)
22 #define QLA82XX_PCI_MS_2M (0x80000)
23 #define QLA82XX_PCI_OCM0_2M (0xc0000)
24 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
28 #define CRB_BLK(off) ((off >> 20) & 0x3f)
29 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
30 #define CRB_WINDOW_2M (0x130060)
[all …]