Lines Matching +full:0 +full:x1200000
52 #phy-cells = <0>;
65 pinctrl-0 = <&keys_pins>;
69 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
97 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
121 reg = <0x0 0x48000000 0x0 0x78000000>;
126 reg = <0x4 0x80000000 0x1 0x80000000>;
132 #clock-cells = <0>;
173 pinctrl-0 = <&avb0_pins>;
179 phy0: ethernet-phy@0 {
183 reg = <0>;
194 pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>;
226 pinctrl-0 = <&hscif0_pins>;
234 pinctrl-0 = <&hscif2_pins>;
242 pinctrl-0 = <&i2c0_pins>;
250 reg = <0x20>;
251 interrupts-extended = <&gpio0 0 IRQ_TYPE_LEVEL_LOW>;
261 reg = <0x50>;
268 reg = <0x51>;
275 reg = <0x52>;
282 reg = <0x53>;
288 pinctrl-0 = <&i2c3_pins>;
296 reg = <0x10>;
301 #sound-dai-cells = <0>;
311 pinctrl-0 = <&mmc_pins>;
335 reset-gpios = <&io_expander_a 0 GPIO_ACTIVE_LOW>;
340 pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>;
434 pinctrl-0 = <&sound_clk_pins>, <&sound_pins>;
458 pinctrl-0 = <&qspi0_pins>;
463 flash@0 {
465 reg = <0>;
474 boot@0 {
475 reg = <0x0 0x1200000>;
479 reg = <0x1200000 0x2e00000>;