| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 1222 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 1287 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 1216 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 1230 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 1229 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 1229 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 1149 generic_reg_get(ctx, ctx->dcn_reg_offsets[regDC_PINSTRAPS_BASE_IDX] + regDC_PINSTRAPS, in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 1209 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn60/ |
| H A D | dcn60_resource.c | 1325 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 1160 generic_reg_get(ctx, ctx->dcn_reg_offsets[regDC_PINSTRAPS_BASE_IDX] + regDC_PINSTRAPS, in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn42/ |
| H A D | dcn42_resource.c | 1179 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn42b/ |
| H A D | dcn42b_resource.c | 1248 generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 1174 generic_reg_get(ctx, ctx->dcn_reg_offsets[regDC_PINSTRAPS_BASE_IDX] + regDC_PINSTRAPS, in read_dce_straps()
|
| /linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/ |
| H A D | dpcs_3_1_4_offset.h | 6256 #define regDC_PINSTRAPS … macro
|
| H A D | dpcs_4_2_3_offset.h | 629 #define regDC_PINSTRAPS … macro
|
| H A D | dpcs_4_2_2_offset.h | 593 #define regDC_PINSTRAPS … macro
|
| H A D | dpcs_4_2_0_offset.h | 596 #define regDC_PINSTRAPS … macro
|
| /linux/drivers/gpu/drm/amd/include/asic_reg/dcn/ |
| H A D | dcn_3_5_1_offset.h | 9776 #define regDC_PINSTRAPS … macro
|
| H A D | dcn_3_5_0_offset.h | 9797 #define regDC_PINSTRAPS … macro
|
| H A D | dcn_4_1_0_offset.h | 11235 #define regDC_PINSTRAPS … macro
|