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Searched refs:clk_pll (Results 1 – 25 of 45) sorted by relevance

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/linux/drivers/clk/mxs/
H A Dclk-pll.c23 struct clk_pll { struct
30 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
34 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare()
45 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare()
52 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable()
61 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable()
69 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
85 struct clk_pll *pll; in mxs_clk_pll()
/linux/arch/m68k/coldfire/
H A Dm523x.c32 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
34 CLKDEV_INIT("mcfpit.0", NULL, &clk_pll),
35 CLKDEV_INIT("mcfpit.1", NULL, &clk_pll),
36 CLKDEV_INIT("mcfpit.2", NULL, &clk_pll),
37 CLKDEV_INIT("mcfpit.3", NULL, &clk_pll),
H A Dm528x.c34 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
36 CLKDEV_INIT("mcfpit.0", NULL, &clk_pll),
37 CLKDEV_INIT("mcfpit.1", NULL, &clk_pll),
38 CLKDEV_INIT("mcfpit.2", NULL, &clk_pll),
39 CLKDEV_INIT("mcfpit.3", NULL, &clk_pll),
H A Dm527x.c33 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
35 CLKDEV_INIT("mcfpit.0", NULL, &clk_pll),
36 CLKDEV_INIT("mcfpit.1", NULL, &clk_pll),
37 CLKDEV_INIT("mcfpit.2", NULL, &clk_pll),
38 CLKDEV_INIT("mcfpit.3", NULL, &clk_pll),
H A Dm5407.c29 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
H A Dm5206.c29 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
H A Dm5307.c38 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
H A Dm525x.c29 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
H A Dm54xx.c38 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
H A Dm5272.c40 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
H A Dm5249.c29 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
/linux/drivers/clk/at91/
H A Dclk-pll.c32 #define to_clk_pll(hw) container_of(hw, struct clk_pll, hw)
34 struct clk_pll { struct
57 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare() argument
100 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_is_prepared()
107 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare()
116 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
124 static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, in clk_pll_get_best_div_mul()
237 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate()
246 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
266 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_save_context()
[all …]
/linux/drivers/clk/qcom/
H A Dclk-pll.c26 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable()
67 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable()
82 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
128 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_determine_rate()
143 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
179 static int wait_for_pll(struct clk_pll *pll) in wait_for_pll()
203 struct clk_pll *p = to_clk_pll(clk_hw_get_parent(hw)); in clk_pll_vote_enable()
218 static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure()
245 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure_sr()
254 void clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure_sr_hpm_lp()
[all …]
H A Dclk-pll.h39 struct clk_pll { struct
59 #define to_clk_pll(_hw) container_of(to_clk_regmap(_hw), struct clk_pll, clkr) argument
76 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap,
78 void clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap,
/linux/Documentation/devicetree/bindings/clock/
H A Dmoxa,moxart-clock.txt37 clk_pll: clk_pll@98100000 {
47 clocks = <&clk_pll>;
/linux/sound/soc/amd/acp/
H A Dacp63.c164 union clk_pll_req_no clk_pll; in acp63_i2s_master_clock_generate() local
172 clk_pll.bits.fb_mult_int = 0x31; in acp63_i2s_master_clock_generate()
173 clk_pll.bits.pll_spine_div = 0; in acp63_i2s_master_clock_generate()
174 clk_pll.bits.gb_mult_frac = 0x26E9; in acp63_i2s_master_clock_generate()
183 smn_write(smn_dev, CLK_PLL_REQ_N0, clk_pll.clk_pll_req_no_reg); in acp63_i2s_master_clock_generate()
/linux/drivers/clk/spear/
H A Dclk-vco-pll.c63 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)
84 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate_index()
124 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
144 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
280 struct clk_pll *pll; in clk_register_vco_pll()
/linux/drivers/clk/keystone/
H A Dpll.c68 struct clk_pll { struct
73 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
78 struct clk_pll *pll = to_clk_pll(hw); in clk_pllclk_recalc()
126 struct clk_pll *pll; in clk_register_pll()
/linux/arch/arm/boot/dts/moxa/
H A Dmoxart.dtsi47 clk_pll: clk_pll@98100000 { label
57 clocks = <&clk_pll>;
/linux/drivers/gpu/drm/imx/ipuv3/
H A Dimx-ldb.c89 struct clk *clk_pll[2]; /* upstream clock we can adjust */ member
126 clk_get_rate(ldb->clk_pll[chno]), serial_clk); in imx_ldb_set_clock()
127 clk_set_rate(ldb->clk_pll[chno], serial_clk); in imx_ldb_set_clock()
130 clk_get_rate(ldb->clk_pll[chno])); in imx_ldb_set_clock()
363 ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname); in imx_ldb_get_clk()
365 return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]); in imx_ldb_get_clk()
/linux/drivers/clk/
H A Dclk-vt8500.c41 struct clk_pll { struct
308 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)
549 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_set_rate()
600 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_round_rate()
639 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_recalc_rate()
677 struct clk_pll *pll_clk; in vtwm_pll_clk_init()
H A Dclk-versaclock5.c196 struct vc5_hw_data clk_pll; member
1101 vc5->clk_pll.num = 0; in vc5_probe()
1102 vc5->clk_pll.vc5 = vc5; in vc5_probe()
1103 vc5->clk_pll.hw.init = &init; in vc5_probe()
1104 ret = devm_clk_hw_register(&client->dev, &vc5->clk_pll.hw); in vc5_probe()
1122 parent_names[0] = clk_hw_get_name(&vc5->clk_pll.hw); in vc5_probe()
/linux/drivers/clk/mediatek/
H A Dclk-pllfh.c24 return container_of(pll, struct mtk_fh, clk_pll); in to_mtk_fh()
169 hw = mtk_clk_register_pll_ops(&fh->clk_pll, pll_data, base, in mtk_clk_register_pllfh()
H A Dclk-pllfh.h58 struct mtk_clk_pll clk_pll; member
H A Dclk-fhctl.c187 struct mtk_clk_pll *pll = &fh->clk_pll; in fhctl_hopping()
217 struct mtk_clk_pll *pll = &fh->clk_pll; in fhctl_ssc_enable()

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