1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
2f86b9e03SGreg Ungerer /***************************************************************************/
3f86b9e03SGreg Ungerer
4f86b9e03SGreg Ungerer /*
5ece9ae65SGreg Ungerer * m523x.c -- platform support for ColdFire 523x based boards
6f86b9e03SGreg Ungerer *
7f86b9e03SGreg Ungerer * Sub-architcture dependent initialization code for the Freescale
8f86b9e03SGreg Ungerer * 523x CPUs.
9f86b9e03SGreg Ungerer *
10f86b9e03SGreg Ungerer * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
11f86b9e03SGreg Ungerer * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
12f86b9e03SGreg Ungerer */
13f86b9e03SGreg Ungerer
14f86b9e03SGreg Ungerer /***************************************************************************/
15f86b9e03SGreg Ungerer
1663aadb77SArnd Bergmann #include <linux/clkdev.h>
17f86b9e03SGreg Ungerer #include <linux/kernel.h>
18f86b9e03SGreg Ungerer #include <linux/param.h>
19f86b9e03SGreg Ungerer #include <linux/init.h>
20f86b9e03SGreg Ungerer #include <linux/io.h>
21f86b9e03SGreg Ungerer #include <asm/machdep.h>
22f86b9e03SGreg Ungerer #include <asm/coldfire.h>
23f86b9e03SGreg Ungerer #include <asm/mcfsim.h>
24f86b9e03SGreg Ungerer #include <asm/mcfclk.h>
25f86b9e03SGreg Ungerer
26f86b9e03SGreg Ungerer /***************************************************************************/
27f86b9e03SGreg Ungerer
28f86b9e03SGreg Ungerer DEFINE_CLK(pll, "pll.0", MCF_CLK);
29f86b9e03SGreg Ungerer DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
30f86b9e03SGreg Ungerer
31*90ebf501SWang Jingjin static struct clk_lookup m523x_clk_lookup[] = {
3263aadb77SArnd Bergmann CLKDEV_INIT(NULL, "pll.0", &clk_pll),
3363aadb77SArnd Bergmann CLKDEV_INIT(NULL, "sys.0", &clk_sys),
3463aadb77SArnd Bergmann CLKDEV_INIT("mcfpit.0", NULL, &clk_pll),
3563aadb77SArnd Bergmann CLKDEV_INIT("mcfpit.1", NULL, &clk_pll),
3663aadb77SArnd Bergmann CLKDEV_INIT("mcfpit.2", NULL, &clk_pll),
3763aadb77SArnd Bergmann CLKDEV_INIT("mcfpit.3", NULL, &clk_pll),
3863aadb77SArnd Bergmann CLKDEV_INIT("mcfuart.0", NULL, &clk_sys),
3963aadb77SArnd Bergmann CLKDEV_INIT("mcfuart.1", NULL, &clk_sys),
4063aadb77SArnd Bergmann CLKDEV_INIT("mcfuart.2", NULL, &clk_sys),
4163aadb77SArnd Bergmann CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys),
4263aadb77SArnd Bergmann CLKDEV_INIT("fec.0", NULL, &clk_sys),
4363aadb77SArnd Bergmann CLKDEV_INIT("imx1-i2c.0", NULL, &clk_sys),
44f86b9e03SGreg Ungerer };
45f86b9e03SGreg Ungerer
46f86b9e03SGreg Ungerer /***************************************************************************/
47f86b9e03SGreg Ungerer
m523x_qspi_init(void)48f86b9e03SGreg Ungerer static void __init m523x_qspi_init(void)
49f86b9e03SGreg Ungerer {
50f86b9e03SGreg Ungerer #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
51f86b9e03SGreg Ungerer u16 par;
52f86b9e03SGreg Ungerer
53f86b9e03SGreg Ungerer /* setup QSPS pins for QSPI with gpio CS control */
54f86b9e03SGreg Ungerer writeb(0x1f, MCFGPIO_PAR_QSPI);
55f86b9e03SGreg Ungerer /* and CS2 & CS3 as gpio */
56f86b9e03SGreg Ungerer par = readw(MCFGPIO_PAR_TIMER);
57f86b9e03SGreg Ungerer par &= 0x3f3f;
58f86b9e03SGreg Ungerer writew(par, MCFGPIO_PAR_TIMER);
59f86b9e03SGreg Ungerer #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
60f86b9e03SGreg Ungerer }
61f86b9e03SGreg Ungerer
62f86b9e03SGreg Ungerer /***************************************************************************/
63f86b9e03SGreg Ungerer
m523x_i2c_init(void)642d24b532SSteven King static void __init m523x_i2c_init(void)
652d24b532SSteven King {
662d24b532SSteven King #if IS_ENABLED(CONFIG_I2C_IMX)
672d24b532SSteven King u8 par;
682d24b532SSteven King
692d24b532SSteven King /* setup Port AS Pin Assignment Register for I2C */
702d24b532SSteven King /* set PASPA0 to SCL and PASPA1 to SDA */
712d24b532SSteven King par = readb(MCFGPIO_PAR_FECI2C);
722d24b532SSteven King par |= 0x0f;
732d24b532SSteven King writeb(par, MCFGPIO_PAR_FECI2C);
742d24b532SSteven King #endif /* IS_ENABLED(CONFIG_I2C_IMX) */
752d24b532SSteven King }
762d24b532SSteven King
772d24b532SSteven King /***************************************************************************/
782d24b532SSteven King
m523x_fec_init(void)79f86b9e03SGreg Ungerer static void __init m523x_fec_init(void)
80f86b9e03SGreg Ungerer {
81f86b9e03SGreg Ungerer /* Set multi-function pins to ethernet use */
82f86b9e03SGreg Ungerer writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
83f86b9e03SGreg Ungerer }
84f86b9e03SGreg Ungerer
85f86b9e03SGreg Ungerer /***************************************************************************/
86f86b9e03SGreg Ungerer
config_BSP(char * commandp,int size)87f86b9e03SGreg Ungerer void __init config_BSP(char *commandp, int size)
88f86b9e03SGreg Ungerer {
89f86b9e03SGreg Ungerer mach_sched_init = hw_timer_init;
90f86b9e03SGreg Ungerer m523x_fec_init();
91f86b9e03SGreg Ungerer m523x_qspi_init();
922d24b532SSteven King m523x_i2c_init();
9363aadb77SArnd Bergmann
9463aadb77SArnd Bergmann clkdev_add_table(m523x_clk_lookup, ARRAY_SIZE(m523x_clk_lookup));
95f86b9e03SGreg Ungerer }
96f86b9e03SGreg Ungerer
97f86b9e03SGreg Ungerer /***************************************************************************/
98