| /linux/include/dt-bindings/clock/ |
| H A D | qcom,sar2130p-gcc.h | 166 #define GCC_VIDEO_AXI0_CLK_ARES 29 macro
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| H A D | qcom,sm8550-gcc.h | 217 #define GCC_VIDEO_AXI0_CLK_ARES 33 macro
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| H A D | qcom,gcc-sm8450.h | 236 #define GCC_VIDEO_AXI0_CLK_ARES 34 macro
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| H A D | qcom,qcs8300-gcc.h | 231 #define GCC_VIDEO_AXI0_CLK_ARES 27 macro
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| H A D | qcom,kaanapali-gcc.h | 236 #define GCC_VIDEO_AXI0_CLK_ARES 33 macro
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| H A D | qcom,sm8650-gcc.h | 240 #define GCC_VIDEO_AXI0_CLK_ARES 33 macro
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| H A D | qcom,hawi-gcc.h | 248 #define GCC_VIDEO_AXI0_CLK_ARES 38 macro
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| H A D | qcom,gcc-sm8350.h | 249 #define GCC_VIDEO_AXI0_CLK_ARES 35 macro
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| H A D | qcom,gcc-sm8250.h | 255 #define GCC_VIDEO_AXI0_CLK_ARES 43 macro
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| H A D | qcom,sa8775p-gcc.h | 306 #define GCC_VIDEO_AXI0_CLK_ARES 44 macro
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| H A D | qcom,gcc-sc8280xp.h | 479 #define GCC_VIDEO_AXI0_CLK_ARES 77 macro
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| /linux/drivers/clk/qcom/ |
| H A D | gcc-sar2130p.c | 2259 [GCC_VIDEO_AXI0_CLK_ARES] = { .reg = 0x42018, .bit = 2, .udelay = 1000 },
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| H A D | gcc-sm8750.c | 3159 [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 },
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| H A D | gcc-eliza.c | 3002 [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 },
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| H A D | gcc-milos.c | 3122 [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 },
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| H A D | gcc-sm8250.c | 3579 [GCC_VIDEO_AXI0_CLK_ARES] = { 0xb024, .bit = 2, .udelay = 150 },
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| H A D | gcc-kaanapali.c | 3426 [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 },
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| H A D | gcc-qcs8300.c | 3540 [GCC_VIDEO_AXI0_CLK_ARES] = { 0x34014, 2 },
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| H A D | gcc-sm8350.c | 3746 [GCC_VIDEO_AXI0_CLK_ARES] = { .reg = 0x28010, .bit = 2, .udelay = 400 },
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| H A D | gcc-sm8650.c | 3736 [GCC_VIDEO_AXI0_CLK_ARES] = { .reg = 0x32018, .bit = 2, .udelay = 1000 },
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| H A D | gcc-hawi.c | 3677 [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 },
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| H A D | gcc-sa8775p.c | 4597 [GCC_VIDEO_AXI0_CLK_ARES] = { .reg = 0x34014, .bit = 2, .udelay = 400 },
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| H A D | gcc-sc8280xp.c | 7446 [GCC_VIDEO_AXI0_CLK_ARES] = { .reg = 0x28010, .bit = 2, .udelay = 400 },
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| H A D | gcc-x1e80100.c | 7405 [GCC_VIDEO_AXI0_CLK_ARES] = { .reg = 0x32018, .bit = 2, .udelay = 1000 },
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| H A D | gcc-glymur.c | 8475 [GCC_VIDEO_AXI0_CLK_ARES] = { 0x3201c, 2 },
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