/freebsd/sys/dev/agp/ |
H A D | agp_intel.c | 139 pci_write_config(dev, AGP_INTEL_ATTBASE, sc->gatt->ag_physical, 4); in agp_intel_commit_gatt() 144 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2080, 4); in agp_intel_commit_gatt() 151 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4); in agp_intel_commit_gatt() 155 pci_write_config(dev, AGP_INTEL_AGPCTRL, value | 0x80, 4); in agp_intel_commit_gatt() 162 pci_write_config(dev, AGP_INTEL_I820_RDCR, in agp_intel_commit_gatt() 172 pci_write_config(dev, AGP_INTEL_I845_AGPM, in agp_intel_commit_gatt() 181 pci_write_config(dev, AGP_INTEL_MCHCFG, in agp_intel_commit_gatt() 186 pci_write_config(dev, AGP_INTEL_NBXCFG, in agp_intel_commit_gatt() 194 pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0xc000, 2); in agp_intel_commit_gatt() 207 pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0x00ff, 2); in agp_intel_commit_gatt() [all …]
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H A D | agp_via.c | 201 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4); in agp_via_attach() 204 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4); in agp_via_attach() 209 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4); in agp_via_attach() 213 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4); in agp_via_attach() 229 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4); in agp_via_detach() 230 pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4); in agp_via_detach() 304 pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1); in agp_via_set_aperture() 343 pci_write_config(dev, sc->regs[REG_APSIZE], in agp_via_set_aperture() 380 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4); in agp_via_flush_tlb() 381 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4); in agp_via_flush_tlb() [all …]
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H A D | agp_apple.c | 131 pci_write_config(dev, UNIN_AGP_BASE_ADDR, 0, 4); in agp_apple_attach() 170 pci_write_config(dev, UNIN_AGP_GART_CONTROL, UNIN_AGP_GART_INVAL, 4); in agp_apple_detach() 171 pci_write_config(dev, UNIN_AGP_GART_CONTROL, 0, 4); in agp_apple_detach() 174 pci_write_config(dev, UNIN_AGP_GART_CONTROL, in agp_apple_detach() 176 pci_write_config(dev, UNIN_AGP_GART_CONTROL, 0, 4); in agp_apple_detach() 211 pci_write_config(dev, UNIN_AGP_GART_BASE, in agp_apple_set_aperture() 250 pci_write_config(dev, UNIN_AGP_GART_CONTROL, in agp_apple_flush_tlb() 252 pci_write_config(dev, UNIN_AGP_GART_CONTROL, cntrl, 4); in agp_apple_flush_tlb() 255 pci_write_config(dev, UNIN_AGP_GART_CONTROL, in agp_apple_flush_tlb() 257 pci_write_config(dev, UNIN_AGP_GART_CONTROL, cntrl, 4); in agp_apple_flush_tlb()
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H A D | agp_sis.c | 154 pci_write_config(dev, AGP_SIS_ATTBASE, gatt->ag_physical, 4); in agp_sis_attach() 157 pci_write_config(dev, AGP_SIS_WINCTRL, in agp_sis_attach() 164 pci_write_config(dev, AGP_SIS_TLBCTRL, 0x05, 1); in agp_sis_attach() 177 pci_write_config(dev, AGP_SIS_WINCTRL, in agp_sis_detach() 181 pci_write_config(dev, AGP_SIS_TLBCTRL, 0, 1); in agp_sis_detach() 219 pci_write_config(dev, AGP_SIS_WINCTRL, in agp_sis_set_aperture() 253 pci_write_config(dev, AGP_SIS_TLBFLUSH, 0x02, 1); in agp_sis_flush_tlb()
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H A D | agp_ali.c | 128 pci_write_config(dev, AGP_ALI_ATTBASE, gatt->ag_physical | in agp_ali_attach() 132 pci_write_config(dev, AGP_ALI_TLBCTRL, 0x10, 1); in agp_ali_attach() 146 pci_write_config(dev, AGP_ALI_TLBCTRL, 0x90, 1); in agp_ali_detach() 151 pci_write_config(dev, AGP_ALI_ATTBASE, attbase & 0xfff, 4); in agp_ali_detach() 201 pci_write_config(dev, AGP_ALI_ATTBASE, (attbase & ~0xf) | i, 4); in agp_ali_set_aperture() 232 pci_write_config(dev, AGP_ALI_TLBCTRL, 0x90, 1); in agp_ali_flush_tlb() 233 pci_write_config(dev, AGP_ALI_TLBCTRL, 0x10, 1); in agp_ali_flush_tlb()
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H A D | agp_nvidia.c | 193 pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_APBASE, apbase, 4); in agp_nvidia_attach() 194 pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_APLIMIT, aplimit, 4); in agp_nvidia_attach() 195 pci_write_config(sc->bdev, AGP_NVIDIA_3_APBASE, apbase, 4); in agp_nvidia_attach() 196 pci_write_config(sc->bdev, AGP_NVIDIA_3_APLIMIT, aplimit, 4); in agp_nvidia_attach() 218 pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_ATTBASE(i), in agp_nvidia_attach() 225 pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_GARTCTRL, temp | 0x11, 4); in agp_nvidia_attach() 229 pci_write_config(sc->dev, AGP_NVIDIA_0_APSIZE, temp | 0x100, 4); in agp_nvidia_attach() 247 pci_write_config(sc->dev, AGP_NVIDIA_0_APSIZE, temp & ~(0x100), 4); in agp_nvidia_detach() 251 pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_GARTCTRL, temp & ~(0x11), 4); in agp_nvidia_detach() 300 pci_write_config(dev, AGP_NVIDIA_0_APSIZE, ((val & ~0x0f) | key), 1); in agp_nvidia_set_aperture() [all …]
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/freebsd/sys/dev/ata/chipsets/ |
H A D | ata-ite.c | 98 pci_write_config(dev, 0x50, pci_read_config(dev, 0x50, 1) & ~0x83, 1); in ata_ite_chipinit() 101 pci_write_config(dev, 0x54, 0x31, 1); in ata_ite_chipinit() 102 pci_write_config(dev, 0x56, 0x31, 1); in ata_ite_chipinit() 148 pci_write_config(parent, 0x50, in ata_ite_821x_setmode() 152 pci_write_config(parent, in ata_ite_821x_setmode() 158 pci_write_config(parent, 0x50, in ata_ite_821x_setmode() 165 pci_write_config(parent, 0x54 + (ch->unit << 2), in ata_ite_821x_setmode() 197 pci_write_config(parent, 0x48, reg48 | (0x0001 << target), 2); in ata_ite_8213_setmode() 198 pci_write_config(parent, 0x4a, in ata_ite_8213_setmode() 203 pci_write_config(parent, 0x48, reg48 & ~(0x0001 << target), 2); in ata_ite_8213_setmode() [all …]
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H A D | ata-siliconimage.c | 123 pci_write_config(dev, 0x8a, in ata_sii_chipinit() 137 pci_write_config(dev, 0x48, in ata_sii_chipinit() 141 pci_write_config(dev, 0x8a, (pci_read_config(dev, 0x8a, 1) & 0x3f), 1); in ata_sii_chipinit() 164 pci_write_config(dev, 0x71, 0x01, 1); in ata_sii_chipinit() 200 pci_write_config(device_get_parent(dev), 0x71, in ata_cmd_status() 229 pci_write_config(parent, ureg, umode, 1); in ata_cmd_setmode() 232 pci_write_config(parent, ureg, in ata_cmd_setmode() 237 pci_write_config(parent, treg, piotimings[ata_mode2idx(piomode)], 1); in ata_cmd_setmode() 373 pci_write_config(parent, mreg, in ata_sii_setmode() 375 pci_write_config(parent, ureg, in ata_sii_setmode() [all …]
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H A D | ata-ati.c | 219 pci_write_config(parent, 0x56, in ata_ati_setmode() 223 pci_write_config(parent, 0x54, in ata_ati_setmode() 226 pci_write_config(parent, 0x44, in ata_ati_setmode() 233 pci_write_config(parent, 0x54, in ata_ati_setmode() 236 pci_write_config(parent, 0x44, in ata_ati_setmode() 244 pci_write_config(parent, 0x54, in ata_ati_setmode() 250 pci_write_config(parent, 0x4a, in ata_ati_setmode() 254 pci_write_config(parent, 0x40, in ata_ati_setmode()
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H A D | ata-via.c | 181 pci_write_config(dev, 0x50, 0x030b030b, 4); in ata_via_chipinit() 188 pci_write_config(dev, 0x43, in ata_via_chipinit() 192 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); in ata_via_chipinit() 195 pci_write_config(dev, 0x46, in ata_via_chipinit() 199 pci_write_config(dev, 0x60, DEV_BSIZE, 2); in ata_via_chipinit() 200 pci_write_config(dev, 0x68, DEV_BSIZE, 2); in ata_via_chipinit() 330 pci_write_config(parent, 0xb3, in ata_via_new_setmode() 335 pci_write_config(parent, 0xab, pio_timings[ata_mode2idx(piomode)], 1); in ata_via_new_setmode() 361 pci_write_config(parent, reg, in ata_via_old_setmode() 365 pci_write_config(parent, reg, 0x8b, 1); in ata_via_old_setmode() [all …]
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H A D | ata-acard.c | 164 pci_write_config(parent, 0x54, reg54, 1); in ata_acard_850_setmode() 165 pci_write_config(parent, 0x4a, 0xa6, 1); in ata_acard_850_setmode() 166 pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2); in ata_acard_850_setmode() 188 pci_write_config(parent, 0x44, reg44, 2); in ata_acard_86X_setmode() 189 pci_write_config(parent, 0x4a, 0xa6, 1); in ata_acard_86X_setmode() 190 pci_write_config(parent, 0x40 + devno, 0x31, 1); in ata_acard_86X_setmode()
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H A D | ata-amd.c | 97 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) & 0x0f, 1); in ata_amd_chipinit() 99 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); in ata_amd_chipinit() 130 pci_write_config(parent, reg, modes[mode & ATA_MODE_MASK], 1); in ata_amd_setmode() 133 pci_write_config(parent, reg, 0x8b, 1); in ata_amd_setmode() 137 pci_write_config(parent, reg - 0x08, timings[ata_mode2idx(piomode)], 1); in ata_amd_setmode()
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H A D | ata-serverworks.c | 153 pci_write_config(children[i], 0x64, in ata_serverworks_chipinit() 163 pci_write_config(dev, 0x5a, (pci_read_config(dev, 0x5a, 1) & ~0x40) | in ata_serverworks_chipinit() 326 pci_write_config(parent, 0x56, in ata_serverworks_setmode() 330 pci_write_config(parent, 0x54, in ata_serverworks_setmode() 333 pci_write_config(parent, 0x44, in ata_serverworks_setmode() 340 pci_write_config(parent, 0x54, in ata_serverworks_setmode() 343 pci_write_config(parent, 0x44, in ata_serverworks_setmode() 351 pci_write_config(parent, 0x54, in ata_serverworks_setmode() 358 pci_write_config(parent, 0x4a, in ata_serverworks_setmode() 363 pci_write_config(parent, 0x40, in ata_serverworks_setmode()
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H A D | ata-national.c | 115 pci_write_config(parent, 0x44 + (devno << 3), in ata_national_setmode() 119 pci_write_config(parent, 0x44 + (devno << 3), in ata_national_setmode() 123 pci_write_config(parent, 0x44 + (devno << 3), in ata_national_setmode() 128 pci_write_config(parent, 0x40 + (devno << 3), in ata_national_setmode()
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H A D | ata-acerlabs.c | 139 pci_write_config(dev, 0x4a, pci_read_config(dev, 0x4a, 1) | 0x20, 1); in ata_ali_chipinit() 143 pci_write_config(dev, 0x4b, pci_read_config(dev, 0x4b, 1) | in ata_ali_chipinit() 147 pci_write_config(dev, 0x53, pci_read_config(dev, 0x53, 1) | in ata_ali_chipinit() 163 pci_write_config(dev, 0x53, pci_read_config(dev, 0x53, 1) | 0x03, 1); in ata_ali_chipinit() 276 pci_write_config(children[i], 0x58, in ata_ali_reset() 279 pci_write_config(children[i], 0x58, in ata_ali_reset() 336 pci_write_config(parent, 0x54, word54, 4); in ata_ali_setmode() 338 pci_write_config(parent, 0x58 + (ch->unit << 2), in ata_ali_setmode()
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H A D | ata-intel.c | 260 pci_write_config(dev, 0x92, pci_read_config(dev, 0x92, 2) | 0x0f, 2); in ata_intel_chipinit() 274 pci_write_config(dev, 0x94, in ata_intel_chipinit() 424 pci_write_config(parent, 0x92, in ata_intel_reset() 427 pci_write_config(parent, 0x92, in ata_intel_reset() 506 pci_write_config(parent, 0x48, reg48 | (0x0001 << devno), 2); in ata_intel_new_setmode() 507 pci_write_config(parent, 0x4a, in ata_intel_new_setmode() 512 pci_write_config(parent, 0x48, reg48 & ~(0x0001 << devno), 2); in ata_intel_new_setmode() 513 pci_write_config(parent, 0x4a, (reg4a & ~(0x3 << (devno << 2))),2); in ata_intel_new_setmode() 523 pci_write_config(parent, 0x54, reg54, 2); in ata_intel_new_setmode() 542 pci_write_config(parent, 0x40, (reg40 & ~mask40) | new40, 4); in ata_intel_new_setmode() [all …]
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/freebsd/sys/dev/pccbb/ |
H A D | pccbb_pci.c | 113 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 115 pci_write_config(DEV, REG, ( \ 292 pci_write_config(brdev, PCIR_PRIBUS_2, sc->pribus, 1); in cbb_pci_attach() 413 pci_write_config(sc->dev, PCIR_SECLAT_2, 0x20, 1); in cbb_chipinit() 417 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1); in cbb_chipinit() 432 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4); in cbb_chipinit() 498 pci_write_config(sc->dev, CBBR_MFUNC, mux, 4); in cbb_chipinit() 508 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4); in cbb_chipinit() 543 pci_write_config(sc->dev, TOPIC97_ZV_CONTROL, 0, 1); in cbb_chipinit() 576 pci_write_config(s in cbb_chipinit() [all...] |
/freebsd/sys/dev/sdhci/ |
H A D | sdhci_pci.c | 265 pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1); in sdhci_lower_frequency() 267 pci_write_config(dev, SDHC_PCI_MODE, SDHC_PCI_MODE_SD20, 1); in sdhci_lower_frequency() 268 pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1); in sdhci_lower_frequency() 274 pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1); in sdhci_lower_frequency() 276 pci_write_config(dev, SDHC_PCI_BASE_FREQ, 50, 1); in sdhci_lower_frequency() 277 pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1); in sdhci_lower_frequency() 286 pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1); in sdhci_restore_frequency() 287 pci_write_config(dev, SDHC_PCI_MODE, sc->cfg_mode, 1); in sdhci_restore_frequency() 288 pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1); in sdhci_restore_frequency() 291 pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1); in sdhci_restore_frequency() [all …]
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/freebsd/sys/dev/e1000/ |
H A D | e1000_osdep.c | 56 pci_write_config(((struct e1000_osdep *)hw->back)->dev, reg, *value, 2); in e1000_write_pci_cfg() 68 pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND, in e1000_pci_set_mwi() 75 pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND, in e1000_pci_clear_mwi() 103 pci_write_config(dev, offset + reg, *value, 2); in e1000_write_pcie_cap_reg()
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/freebsd/sys/dev/mlx5/mlx5_core/ |
H A D | mlx5_vsc.c | 61 pci_write_config(dev, vsc_addr + MLX5_VSC_SEMA_OFFSET, counter, 4); in mlx5_vsc_lock() 83 pci_write_config(dev, vsc_addr + MLX5_VSC_SEMA_OFFSET, 0, 4); in mlx5_vsc_unlock() 121 pci_write_config(dev, vsc_addr + MLX5_VSC_SPACE_OFFSET, vsc_space, 4); in mlx5_vsc_set_space() 146 pci_write_config(dev, vsc_addr + MLX5_VSC_DATA_OFFSET, *data, 4); in mlx5_vsc_write() 147 pci_write_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, in, 4); in mlx5_vsc_write() 169 pci_write_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, in, 4); in mlx5_vsc_read()
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/freebsd/sys/dev/mpt/ |
H A D | mpt_pci.c | 385 pci_write_config(dev, PCIR_COMMAND, val, 2); in mpt_pci_attach() 392 pci_write_config(dev, PCIR_BIOS, val, 4); in mpt_pci_attach() 772 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 773 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 775 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 776 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 777 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 778 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 779 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 780 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); [all …]
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/freebsd/sys/dev/pci/ |
H A D | fixup_pci.c | 93 pci_write_config(dev, 0x50, pmccfg, 2); in fixwsc_natoma() 99 pci_write_config(dev, 0x50, pmccfg, 2); in fixwsc_natoma() 134 pci_write_config(dev, 0x6c, val, 4); in fixc1_nforce2()
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H A D | pci.c | 186 DEVMETHOD(pci_write_config, pci_write_config_method), 1710 pci_write_config(child, in pci_enable_msix_method() 1804 pci_write_config(dev, msix->msix_location + PCIR_MSIX_CTRL, in pci_resume_msix() 1943 pci_write_config(child, cfg->msix.msix_location + PCIR_MSIX_CTRL, in pci_alloc_msix_method() 2142 pci_write_config(child, msix->msix_location + PCIR_MSIX_CTRL, in pci_release_msix() 2222 pci_write_config(dev, ht->ht_msimap + PCIR_HT_COMMAND, in pci_ht_map_msi() 2229 pci_write_config(dev, ht->ht_msimap + PCIR_HT_COMMAND, in pci_ht_map_msi() 2299 pci_write_config(dev, cap + PCIER_DEVICE_CTL, val, 2); in pci_set_max_read_req() 2328 pci_write_config(dev, cap + reg, value, width); in pcie_write_config() 2356 pci_write_config(dev, cap + reg, new, width); in pcie_adjust_config() [all …]
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/freebsd/sys/dev/cardbus/ |
H A D | cardbus.c | 152 pci_write_config(dev, PCIR_BAR(i), 0, 4); in cardbus_device_setup_regs() 156 pci_write_config(dev, PCIR_INTLINE, cfg->intline, 1); in cardbus_device_setup_regs() 157 pci_write_config(dev, PCIR_CACHELNSZ, 0x08, 1); in cardbus_device_setup_regs() 158 pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1); in cardbus_device_setup_regs() 159 pci_write_config(dev, PCIR_MINGNT, 0x14, 1); in cardbus_device_setup_regs() 160 pci_write_config(dev, PCIR_MAXLAT, 0x14, 1); in cardbus_device_setup_regs()
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/freebsd/sys/dev/ath/ |
H A D | if_ath_pci.c | 121 pci_write_config(dev, PCIR_CACHELNSZ, in ath_pci_setup() 126 pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1); in ath_pci_setup() 135 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); in ath_pci_setup() 137 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); in ath_pci_setup() 145 pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1); in ath_pci_setup()
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