xref: /freebsd/sys/dev/ath/if_ath_pci.c (revision 3fdf587ab02f33018bd042094e3d0bd4169352ed)
15591b213SSam Leffler /*-
2*4d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
3718cf2ccSPedro F. Giffuni  *
4b032f27cSSam Leffler  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
55591b213SSam Leffler  * All rights reserved.
65591b213SSam Leffler  *
75591b213SSam Leffler  * Redistribution and use in source and binary forms, with or without
85591b213SSam Leffler  * modification, are permitted provided that the following conditions
95591b213SSam Leffler  * are met:
105591b213SSam Leffler  * 1. Redistributions of source code must retain the above copyright
115591b213SSam Leffler  *    notice, this list of conditions and the following disclaimer,
125591b213SSam Leffler  *    without modification.
135591b213SSam Leffler  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
145591b213SSam Leffler  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
155591b213SSam Leffler  *    redistribution must be conditioned upon including a substantially
165591b213SSam Leffler  *    similar Disclaimer requirement for further binary redistribution.
175591b213SSam Leffler  *
185591b213SSam Leffler  * NO WARRANTY
195591b213SSam Leffler  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
205591b213SSam Leffler  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
215591b213SSam Leffler  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
225591b213SSam Leffler  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
235591b213SSam Leffler  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
245591b213SSam Leffler  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
255591b213SSam Leffler  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
265591b213SSam Leffler  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
275591b213SSam Leffler  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
285591b213SSam Leffler  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
295591b213SSam Leffler  * THE POSSIBILITY OF SUCH DAMAGES.
305591b213SSam Leffler  */
315591b213SSam Leffler 
325591b213SSam Leffler #include <sys/cdefs.h>
335591b213SSam Leffler /*
345591b213SSam Leffler  * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
355591b213SSam Leffler  */
3679f57b35SAdrian Chadd #include "opt_ath.h"
375591b213SSam Leffler 
385591b213SSam Leffler #include <sys/param.h>
395591b213SSam Leffler #include <sys/systm.h>
40c3322cb9SGleb Smirnoff #include <sys/malloc.h>
415591b213SSam Leffler #include <sys/module.h>
425591b213SSam Leffler #include <sys/kernel.h>
435591b213SSam Leffler #include <sys/lock.h>
445591b213SSam Leffler #include <sys/mutex.h>
455591b213SSam Leffler #include <sys/errno.h>
465591b213SSam Leffler 
475591b213SSam Leffler #include <machine/bus.h>
485591b213SSam Leffler #include <machine/resource.h>
495591b213SSam Leffler #include <sys/bus.h>
505591b213SSam Leffler #include <sys/rman.h>
515591b213SSam Leffler 
52c42a7b7eSSam Leffler #include <sys/socket.h>
53c42a7b7eSSam Leffler 
545591b213SSam Leffler #include <net/if.h>
555591b213SSam Leffler #include <net/if_media.h>
565591b213SSam Leffler #include <net/if_arp.h>
57c3322cb9SGleb Smirnoff #include <net/ethernet.h>
585591b213SSam Leffler 
595591b213SSam Leffler #include <net80211/ieee80211_var.h>
605591b213SSam Leffler 
615591b213SSam Leffler #include <dev/ath/if_athvar.h>
625591b213SSam Leffler 
635591b213SSam Leffler #include <dev/pci/pcivar.h>
645591b213SSam Leffler #include <dev/pci/pcireg.h>
655591b213SSam Leffler 
660f60da6fSAdrian Chadd /* For EEPROM firmware */
670f60da6fSAdrian Chadd #ifdef	ATH_EEPROM_FIRMWARE
680f60da6fSAdrian Chadd #include <sys/linker.h>
690f60da6fSAdrian Chadd #include <sys/firmware.h>
700f60da6fSAdrian Chadd #endif	/* ATH_EEPROM_FIRMWARE */
710f60da6fSAdrian Chadd 
725591b213SSam Leffler /*
735591b213SSam Leffler  * PCI glue.
745591b213SSam Leffler  */
755591b213SSam Leffler 
765591b213SSam Leffler struct ath_pci_softc {
775591b213SSam Leffler 	struct ath_softc	sc_sc;
785591b213SSam Leffler 	struct resource		*sc_sr;		/* memory resource */
795591b213SSam Leffler 	struct resource		*sc_irq;	/* irq resource */
80c42a7b7eSSam Leffler 	void			*sc_ih;		/* interrupt handler */
815591b213SSam Leffler };
825591b213SSam Leffler 
834d711ae2SWarner Losh #define	PCI_VDEVICE(v, d)			\
844d711ae2SWarner Losh 	PCI_DEV(v,d)
859389d5a9SAdrian Chadd 
864d711ae2SWarner Losh #define	PCI_DEVICE_SUB(v, d, sv, sd)		\
8762ba9c86SWarner Losh 	PCI_DEV(v, d), PCI_SUBDEV(sv, sd)
889389d5a9SAdrian Chadd 
899389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_ATHEROS		0x168c
909389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_SAMSUNG		0x144d
919389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_AZWAVE		0x1a3b
929389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_FOXCONN		0x105b
939389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_ATTANSIC		0x1969
949389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_ASUSTEK		0x1043
959389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_DELL		0x1028
969389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_QMI		0x1a32
979389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_LENOVO		0x17aa
989389d5a9SAdrian Chadd #define	PCI_VENDOR_ID_HP		0x103c
999389d5a9SAdrian Chadd 
1009389d5a9SAdrian Chadd #include "if_ath_pci_devlist.h"
1019389d5a9SAdrian Chadd 
1025591b213SSam Leffler #define	BS_BAR	0x10
1030b19ce1eSSam Leffler #define	PCIR_RETRY_TIMEOUT	0x41
1042c0dd4bbSAdrian Chadd #define	PCIR_CFG_PMCSR		0x48
1055591b213SSam Leffler 
106b890549dSAdrian Chadd #define	DEFAULT_CACHESIZE	32
107b890549dSAdrian Chadd 
108cdd36f96SAdrian Chadd static void
ath_pci_setup(device_t dev)109cdd36f96SAdrian Chadd ath_pci_setup(device_t dev)
110cdd36f96SAdrian Chadd {
111b890549dSAdrian Chadd 	uint8_t cz;
112b890549dSAdrian Chadd 
113b890549dSAdrian Chadd 	/* XXX TODO: need to override the _system_ saved copies of this */
114b890549dSAdrian Chadd 
115b890549dSAdrian Chadd 	/*
116b890549dSAdrian Chadd 	 * If the cache line size is 0, force it to a reasonable
117b890549dSAdrian Chadd 	 * value.
118b890549dSAdrian Chadd 	 */
119b890549dSAdrian Chadd 	cz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
120b890549dSAdrian Chadd 	if (cz == 0) {
121b890549dSAdrian Chadd 		pci_write_config(dev, PCIR_CACHELNSZ,
122b890549dSAdrian Chadd 		    DEFAULT_CACHESIZE / 4, 1);
123b890549dSAdrian Chadd 	}
124b890549dSAdrian Chadd 
1252c0dd4bbSAdrian Chadd 	/* Override the system latency timer */
126b890549dSAdrian Chadd 	pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1);
1272c0dd4bbSAdrian Chadd 
1282c0dd4bbSAdrian Chadd 	/* If a PCI NIC, force wakeup */
1292c0dd4bbSAdrian Chadd #ifdef	ATH_PCI_WAKEUP_WAR
1302c0dd4bbSAdrian Chadd 	/* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */
1312c0dd4bbSAdrian Chadd 	if (1) {
1322c0dd4bbSAdrian Chadd 		uint16_t pmcsr;
1332c0dd4bbSAdrian Chadd 		pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2);
1342c0dd4bbSAdrian Chadd 		pmcsr |= 3;
1352c0dd4bbSAdrian Chadd 		pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
1362c0dd4bbSAdrian Chadd 		pmcsr &= ~3;
1372c0dd4bbSAdrian Chadd 		pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
1382c0dd4bbSAdrian Chadd 	}
1392c0dd4bbSAdrian Chadd #endif
1402c0dd4bbSAdrian Chadd 
141cdd36f96SAdrian Chadd 	/*
142cdd36f96SAdrian Chadd 	 * Disable retry timeout to keep PCI Tx retries from
143cdd36f96SAdrian Chadd 	 * interfering with C3 CPU state.
144cdd36f96SAdrian Chadd 	 */
145cdd36f96SAdrian Chadd 	pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
146cdd36f96SAdrian Chadd }
147cdd36f96SAdrian Chadd 
1485591b213SSam Leffler static int
ath_pci_probe(device_t dev)1495591b213SSam Leffler ath_pci_probe(device_t dev)
1505591b213SSam Leffler {
1515591b213SSam Leffler 	const char* devname;
1525591b213SSam Leffler 
1535591b213SSam Leffler 	devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev));
154c42a7b7eSSam Leffler 	if (devname != NULL) {
1555591b213SSam Leffler 		device_set_desc(dev, devname);
15653ee7173SWarner Losh 		return BUS_PROBE_DEFAULT;
1575591b213SSam Leffler 	}
1585591b213SSam Leffler 	return ENXIO;
1595591b213SSam Leffler }
1605591b213SSam Leffler 
1615591b213SSam Leffler static int
ath_pci_attach(device_t dev)1625591b213SSam Leffler ath_pci_attach(device_t dev)
1635591b213SSam Leffler {
1645591b213SSam Leffler 	struct ath_pci_softc *psc = device_get_softc(dev);
1655591b213SSam Leffler 	struct ath_softc *sc = &psc->sc_sc;
1665591b213SSam Leffler 	int error = ENXIO;
1675591b213SSam Leffler 	int rid;
1680f60da6fSAdrian Chadd #ifdef	ATH_EEPROM_FIRMWARE
1690f60da6fSAdrian Chadd 	const struct firmware *fw = NULL;
1700f60da6fSAdrian Chadd 	const char *buf;
1710f60da6fSAdrian Chadd #endif
1724d711ae2SWarner Losh 	const struct pci_device_table *pd;
1735591b213SSam Leffler 
1745591b213SSam Leffler 	sc->sc_dev = dev;
1755591b213SSam Leffler 
1769389d5a9SAdrian Chadd 	/* Do this lookup anyway; figure out what to do with it later */
1774d711ae2SWarner Losh 	pd = PCI_MATCH(dev, ath_pci_id_table);
1789389d5a9SAdrian Chadd 	if (pd)
1799389d5a9SAdrian Chadd 		sc->sc_pci_devinfo = pd->driver_data;
1809389d5a9SAdrian Chadd 
181e3e2d9bfSKevin Lo 	/*
182e3e2d9bfSKevin Lo 	 * Enable bus mastering.
183e3e2d9bfSKevin Lo 	 */
184e3e2d9bfSKevin Lo 	pci_enable_busmaster(dev);
185e3e2d9bfSKevin Lo 
186e3e2d9bfSKevin Lo 	/*
187cdd36f96SAdrian Chadd 	 * Setup other PCI bus configuration parameters.
188e3e2d9bfSKevin Lo 	 */
189cdd36f96SAdrian Chadd 	ath_pci_setup(dev);
1905591b213SSam Leffler 
1915591b213SSam Leffler 	/*
1925591b213SSam Leffler 	 * Setup memory-mapping of PCI registers.
1935591b213SSam Leffler 	 */
1945591b213SSam Leffler 	rid = BS_BAR;
1955f96beb9SNate Lawson 	psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
1965f96beb9SNate Lawson 					    RF_ACTIVE);
1975591b213SSam Leffler 	if (psc->sc_sr == NULL) {
1985591b213SSam Leffler 		device_printf(dev, "cannot map register space\n");
1995591b213SSam Leffler 		goto bad;
2005591b213SSam Leffler 	}
201e7d939bdSMarcel Moolenaar 	sc->sc_st = (HAL_BUS_TAG) rman_get_bustag(psc->sc_sr);
202f9fc583fSSam Leffler 	sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr);
203b58b3803SSam Leffler 	/*
204b58b3803SSam Leffler 	 * Mark device invalid so any interrupts (shared or otherwise)
205b58b3803SSam Leffler 	 * that arrive before the HAL is setup are discarded.
206b58b3803SSam Leffler 	 */
207b58b3803SSam Leffler 	sc->sc_invalid = 1;
2085591b213SSam Leffler 
20935a32b04SAdrian Chadd 	ATH_LOCK_INIT(sc);
21035a32b04SAdrian Chadd 	ATH_PCU_LOCK_INIT(sc);
21135a32b04SAdrian Chadd 	ATH_RX_LOCK_INIT(sc);
21235a32b04SAdrian Chadd 	ATH_TX_LOCK_INIT(sc);
21335a32b04SAdrian Chadd 	ATH_TXSTATUS_LOCK_INIT(sc);
21435a32b04SAdrian Chadd 
2155591b213SSam Leffler 	/*
2165591b213SSam Leffler 	 * Arrange interrupt line.
2175591b213SSam Leffler 	 */
2185591b213SSam Leffler 	rid = 0;
2195f96beb9SNate Lawson 	psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
2205f96beb9SNate Lawson 					     RF_SHAREABLE|RF_ACTIVE);
2215591b213SSam Leffler 	if (psc->sc_irq == NULL) {
2225591b213SSam Leffler 		device_printf(dev, "could not map interrupt\n");
2235591b213SSam Leffler 		goto bad1;
2245591b213SSam Leffler 	}
2255591b213SSam Leffler 	if (bus_setup_intr(dev, psc->sc_irq,
2265591b213SSam Leffler 			   INTR_TYPE_NET | INTR_MPSAFE,
227ef544f63SPaolo Pisati 			   NULL, ath_intr, sc, &psc->sc_ih)) {
2285591b213SSam Leffler 		device_printf(dev, "could not establish interrupt\n");
2295591b213SSam Leffler 		goto bad2;
2305591b213SSam Leffler 	}
2315591b213SSam Leffler 
2325591b213SSam Leffler 	/*
2335591b213SSam Leffler 	 * Setup DMA descriptor area.
2345591b213SSam Leffler 	 */
235c2175ff5SMarius Strobl 	if (bus_dma_tag_create(bus_get_dma_tag(dev),	/* parent */
2365591b213SSam Leffler 			       1, 0,			/* alignment, bounds */
2375591b213SSam Leffler 			       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
2385591b213SSam Leffler 			       BUS_SPACE_MAXADDR,	/* highaddr */
2395591b213SSam Leffler 			       NULL, NULL,		/* filter, filterarg */
2405591b213SSam Leffler 			       0x3ffff,			/* maxsize XXX */
2415591b213SSam Leffler 			       ATH_MAX_SCATTER,		/* nsegments */
2426ccb8ea7SSam Leffler 			       0x3ffff,			/* maxsegsize XXX */
2435591b213SSam Leffler 			       BUS_DMA_ALLOCNOW,	/* flags */
244f6b1c44dSScott Long 			       NULL,			/* lockfunc */
245f6b1c44dSScott Long 			       NULL,			/* lockarg */
2465591b213SSam Leffler 			       &sc->sc_dmat)) {
2475591b213SSam Leffler 		device_printf(dev, "cannot allocate DMA tag\n");
2485591b213SSam Leffler 		goto bad3;
2495591b213SSam Leffler 	}
2505591b213SSam Leffler 
2510f60da6fSAdrian Chadd #ifdef	ATH_EEPROM_FIRMWARE
2520f60da6fSAdrian Chadd 	/*
2530f60da6fSAdrian Chadd 	 * If there's an EEPROM firmware image, load that in.
2540f60da6fSAdrian Chadd 	 */
2550f60da6fSAdrian Chadd 	if (resource_string_value(device_get_name(dev), device_get_unit(dev),
2560f60da6fSAdrian Chadd 	    "eeprom_firmware", &buf) == 0) {
2570f60da6fSAdrian Chadd 		if (bootverbose)
2580f60da6fSAdrian Chadd 			device_printf(dev, "%s: looking up firmware @ '%s'\n",
2590f60da6fSAdrian Chadd 			    __func__, buf);
2600f60da6fSAdrian Chadd 
2610f60da6fSAdrian Chadd 		fw = firmware_get(buf);
2620f60da6fSAdrian Chadd 		if (fw == NULL) {
2630f60da6fSAdrian Chadd 			device_printf(dev, "%s: couldn't find firmware\n",
2640f60da6fSAdrian Chadd 			    __func__);
26535a32b04SAdrian Chadd 			goto bad4;
2660f60da6fSAdrian Chadd 		}
2670f60da6fSAdrian Chadd 
2680f60da6fSAdrian Chadd 		device_printf(dev, "%s: EEPROM firmware @ %p\n",
2690f60da6fSAdrian Chadd 		    __func__, fw->data);
2700f60da6fSAdrian Chadd 		sc->sc_eepromdata =
2710f60da6fSAdrian Chadd 		    malloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO);
2720f60da6fSAdrian Chadd 		memcpy(sc->sc_eepromdata, fw->data, fw->datasize);
2730f60da6fSAdrian Chadd 		firmware_put(fw, 0);
2740f60da6fSAdrian Chadd 	}
2750f60da6fSAdrian Chadd #endif /* ATH_EEPROM_FIRMWARE */
2760f60da6fSAdrian Chadd 
2775591b213SSam Leffler 	error = ath_attach(pci_get_device(dev), sc);
27830e218c0SSam Leffler 	if (error == 0)					/* success */
27930e218c0SSam Leffler 		return 0;
2805591b213SSam Leffler 
28135a32b04SAdrian Chadd #ifdef	ATH_EEPROM_FIRMWARE
28235a32b04SAdrian Chadd bad4:
28335a32b04SAdrian Chadd #endif
2845591b213SSam Leffler 	bus_dma_tag_destroy(sc->sc_dmat);
2855591b213SSam Leffler bad3:
2865591b213SSam Leffler 	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
2875591b213SSam Leffler bad2:
2885591b213SSam Leffler 	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
2895591b213SSam Leffler bad1:
2905591b213SSam Leffler 	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
29135a32b04SAdrian Chadd 
29235a32b04SAdrian Chadd 	ATH_TXSTATUS_LOCK_DESTROY(sc);
29335a32b04SAdrian Chadd 	ATH_PCU_LOCK_DESTROY(sc);
29435a32b04SAdrian Chadd 	ATH_RX_LOCK_DESTROY(sc);
29535a32b04SAdrian Chadd 	ATH_TX_LOCK_DESTROY(sc);
29635a32b04SAdrian Chadd 	ATH_LOCK_DESTROY(sc);
29735a32b04SAdrian Chadd 
2985591b213SSam Leffler bad:
2995591b213SSam Leffler 	return (error);
3005591b213SSam Leffler }
3015591b213SSam Leffler 
3025591b213SSam Leffler static int
ath_pci_detach(device_t dev)3035591b213SSam Leffler ath_pci_detach(device_t dev)
3045591b213SSam Leffler {
3055591b213SSam Leffler 	struct ath_pci_softc *psc = device_get_softc(dev);
3065591b213SSam Leffler 	struct ath_softc *sc = &psc->sc_sc;
3075591b213SSam Leffler 
3085591b213SSam Leffler 	/* check if device was removed */
3095591b213SSam Leffler 	sc->sc_invalid = !bus_child_present(dev);
3105591b213SSam Leffler 
31165d1eb94SAdrian Chadd 	/*
31265d1eb94SAdrian Chadd 	 * Do a config read to clear pre-existing pci error status.
31365d1eb94SAdrian Chadd 	 */
31465d1eb94SAdrian Chadd 	(void) pci_read_config(dev, PCIR_COMMAND, 4);
31565d1eb94SAdrian Chadd 
3165591b213SSam Leffler 	ath_detach(sc);
3175591b213SSam Leffler 
3185591b213SSam Leffler 	bus_generic_detach(dev);
3195591b213SSam Leffler 	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
3205591b213SSam Leffler 	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
3215591b213SSam Leffler 
3225591b213SSam Leffler 	bus_dma_tag_destroy(sc->sc_dmat);
3235591b213SSam Leffler 	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
3245591b213SSam Leffler 
3250f60da6fSAdrian Chadd 	if (sc->sc_eepromdata)
3260f60da6fSAdrian Chadd 		free(sc->sc_eepromdata, M_TEMP);
3270f60da6fSAdrian Chadd 
32854c99795SAdrian Chadd 	ATH_TXSTATUS_LOCK_DESTROY(sc);
3293dd85b26SAdrian Chadd 	ATH_PCU_LOCK_DESTROY(sc);
3302fe91baaSAdrian Chadd 	ATH_RX_LOCK_DESTROY(sc);
3311b5c5f5aSAdrian Chadd 	ATH_TX_LOCK_DESTROY(sc);
332f0b2a0beSSam Leffler 	ATH_LOCK_DESTROY(sc);
3335591b213SSam Leffler 
3345591b213SSam Leffler 	return (0);
3355591b213SSam Leffler }
3365591b213SSam Leffler 
3375591b213SSam Leffler static int
ath_pci_shutdown(device_t dev)3385591b213SSam Leffler ath_pci_shutdown(device_t dev)
3395591b213SSam Leffler {
3405591b213SSam Leffler 	struct ath_pci_softc *psc = device_get_softc(dev);
3415591b213SSam Leffler 
3425591b213SSam Leffler 	ath_shutdown(&psc->sc_sc);
3435591b213SSam Leffler 	return (0);
3445591b213SSam Leffler }
3455591b213SSam Leffler 
3465591b213SSam Leffler static int
ath_pci_suspend(device_t dev)3475591b213SSam Leffler ath_pci_suspend(device_t dev)
3485591b213SSam Leffler {
3495591b213SSam Leffler 	struct ath_pci_softc *psc = device_get_softc(dev);
3505591b213SSam Leffler 
3515591b213SSam Leffler 	ath_suspend(&psc->sc_sc);
3525591b213SSam Leffler 
3535591b213SSam Leffler 	return (0);
3545591b213SSam Leffler }
3555591b213SSam Leffler 
3565591b213SSam Leffler static int
ath_pci_resume(device_t dev)3575591b213SSam Leffler ath_pci_resume(device_t dev)
3585591b213SSam Leffler {
3595591b213SSam Leffler 	struct ath_pci_softc *psc = device_get_softc(dev);
3605591b213SSam Leffler 
361cdd36f96SAdrian Chadd 	/*
362cdd36f96SAdrian Chadd 	 * Suspend/resume resets the PCI configuration space.
363cdd36f96SAdrian Chadd 	 */
364cdd36f96SAdrian Chadd 	ath_pci_setup(dev);
365cdd36f96SAdrian Chadd 
3665591b213SSam Leffler 	ath_resume(&psc->sc_sc);
3675591b213SSam Leffler 
3685591b213SSam Leffler 	return (0);
3695591b213SSam Leffler }
3705591b213SSam Leffler 
3715591b213SSam Leffler static device_method_t ath_pci_methods[] = {
3725591b213SSam Leffler 	/* Device interface */
3735591b213SSam Leffler 	DEVMETHOD(device_probe,		ath_pci_probe),
3745591b213SSam Leffler 	DEVMETHOD(device_attach,	ath_pci_attach),
3755591b213SSam Leffler 	DEVMETHOD(device_detach,	ath_pci_detach),
3765591b213SSam Leffler 	DEVMETHOD(device_shutdown,	ath_pci_shutdown),
3775591b213SSam Leffler 	DEVMETHOD(device_suspend,	ath_pci_suspend),
3785591b213SSam Leffler 	DEVMETHOD(device_resume,	ath_pci_resume),
3795591b213SSam Leffler 	{ 0,0 }
3805591b213SSam Leffler };
381f859852fSJohn Baldwin 
3825591b213SSam Leffler static driver_t ath_pci_driver = {
3835591b213SSam Leffler 	"ath",
3845591b213SSam Leffler 	ath_pci_methods,
3855591b213SSam Leffler 	sizeof (struct ath_pci_softc)
3865591b213SSam Leffler };
387f859852fSJohn Baldwin 
388f859852fSJohn Baldwin DRIVER_MODULE(if_ath_pci, pci, ath_pci_driver, 0, 0);
38941059135SAdrian Chadd MODULE_VERSION(if_ath_pci, 1);
39041059135SAdrian Chadd MODULE_DEPEND(if_ath_pci, wlan, 1, 1, 1);		/* 802.11 media layer */
39141059135SAdrian Chadd MODULE_DEPEND(if_ath_pci, ath_main, 1, 1, 1);	/* if_ath driver */
39241059135SAdrian Chadd MODULE_DEPEND(if_ath_pci, ath_hal, 1, 1, 1);	/* ath HAL */
393