| /freebsd/sys/contrib/dev/athk/ath12k/wifi7/ |
| H A D | dp.c | 31 if (dp->hw_params->ring_mask->tx[grp_id]) { in ath12k_wifi7_dp_service_srng() 32 i = fls(dp->hw_params->ring_mask->tx[grp_id]) - 1; in ath12k_wifi7_dp_service_srng() 36 if (dp->hw_params->ring_mask->rx_err[grp_id]) { in ath12k_wifi7_dp_service_srng() 44 if (dp->hw_params->ring_mask->rx_wbm_rel[grp_id]) { in ath12k_wifi7_dp_service_srng() 53 if (dp->hw_params->ring_mask->rx[grp_id]) { in ath12k_wifi7_dp_service_srng() 54 i = fls(dp->hw_params->ring_mask->rx[grp_id]) - 1; in ath12k_wifi7_dp_service_srng() 62 if (dp->hw_params->ring_mask->rx_mon_status[grp_id]) { in ath12k_wifi7_dp_service_srng() 63 ring_mask = dp->hw_params->ring_mask->rx_mon_status[grp_id]; in ath12k_wifi7_dp_service_srng() 65 for (j = 0; j < dp->hw_params->num_rxdma_per_pdev; j++) { in ath12k_wifi7_dp_service_srng() 66 int id = i * dp->hw_params->num_rxdma_per_pdev + j; in ath12k_wifi7_dp_service_srng() [all …]
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| H A D | hw.c | 1025 const struct ath12k_hw_params *hw_params = NULL; in ath12k_wifi7_hw_init() local 1029 hw_params = &ath12k_wifi7_hw_params[i]; in ath12k_wifi7_hw_init() 1031 if (hw_params->hw_rev == ab->hw_rev) in ath12k_wifi7_hw_init() 1041 ab->hw_params = hw_params; in ath12k_wifi7_hw_init() 1046 ath12k_info(ab, "Wi-Fi 7 Hardware name: %s\n", ab->hw_params->name); in ath12k_wifi7_hw_init()
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| H A D | dp_tx.c | 88 u32 iova_mask = dp->hw_params->iova_mask; in ath12k_wifi7_dp_tx() 108 ring_selector = dp->hw_params->hw_ops->get_ring_selector(skb); in ath12k_wifi7_dp_tx() 112 ti.ring_id = ring_selector % dp->hw_params->max_tx_ring; in ath12k_wifi7_dp_tx() 325 if (ring_map != (BIT(dp->hw_params->max_tx_ring) - 1) && in ath12k_wifi7_dp_tx() 326 dp->hw_params->tcl_ring_retry) { in ath12k_wifi7_dp_tx() 407 pdev_id = ath12k_hw_mac_id_to_pdev_id(dp->hw_params, desc_params->mac_id); in ath12k_dp_tx_htt_tx_complete_buf() 912 pdev_idx = ath12k_hw_mac_id_to_pdev_id(dp->hw_params, desc_params.mac_id); in ath12k_wifi7_dp_tx_completion_handler()
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| /freebsd/sys/contrib/dev/athk/ath11k/ |
| H A D | hal.h | 35 #define HAL_SHADOW_BASE_ADDR(ab) ab->hw_params.regs->hal_shadow_base_addr 47 ((ab)->hw_params.regs->hal_seq_wcss_umac_ce0_src_reg) 49 ((ab)->hw_params.regs->hal_seq_wcss_umac_ce0_dst_reg) 51 ((ab)->hw_params.regs->hal_seq_wcss_umac_ce1_src_reg) 53 ((ab)->hw_params.regs->hal_seq_wcss_umac_ce1_dst_reg) 62 #define HAL_TCL1_RING_BASE_LSB(ab) ab->hw_params.regs->hal_tcl1_ring_base_lsb 63 #define HAL_TCL1_RING_BASE_MSB(ab) ab->hw_params.regs->hal_tcl1_ring_base_msb 64 #define HAL_TCL1_RING_ID(ab) ab->hw_params.regs->hal_tcl1_ring_id 65 #define HAL_TCL1_RING_MISC(ab) ab->hw_params.regs->hal_tcl1_ring_misc 67 ab->hw_params.regs->hal_tcl1_ring_tp_addr_lsb [all …]
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| H A D | dp.c | 144 grp_mask = &ab->hw_params.ring_mask->rx_wbm_rel[0]; in ath11k_dp_srng_calculate_msi_group() 147 grp_mask = &ab->hw_params.ring_mask->tx[0]; in ath11k_dp_srng_calculate_msi_group() 151 grp_mask = &ab->hw_params.ring_mask->rx_err[0]; in ath11k_dp_srng_calculate_msi_group() 154 grp_mask = &ab->hw_params.ring_mask->rx[0]; in ath11k_dp_srng_calculate_msi_group() 157 grp_mask = &ab->hw_params.ring_mask->reo_status[0]; in ath11k_dp_srng_calculate_msi_group() 161 grp_mask = &ab->hw_params.ring_mask->rx_mon_status[0]; in ath11k_dp_srng_calculate_msi_group() 164 grp_mask = &ab->hw_params.ring_mask->rxdma2host[0]; in ath11k_dp_srng_calculate_msi_group() 167 grp_mask = &ab->hw_params.ring_mask->host2rxdma[0]; in ath11k_dp_srng_calculate_msi_group() 245 if (ab->hw_params.alloc_cacheable_memory) { in ath11k_dp_srng_setup() 347 if (!ab->hw_params.supports_shadow_regs) in ath11k_dp_stop_shadow_timers() [all …]
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| H A D | ahb.c | 213 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_ahb_kill_tasklets() 275 const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr; in ath11k_ahb_ce_irq_enable() 282 ce_attr = &ab->hw_params.host_ce_config[ce_id]; in ath11k_ahb_ce_irq_enable() 296 const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr; in ath11k_ahb_ce_irq_disable() 303 ce_attr = &ab->hw_params.host_ce_config[ce_id]; in ath11k_ahb_ce_irq_disable() 319 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_ahb_sync_ce_irqs() 347 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_ahb_ce_irqs_enable() 358 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_ahb_ce_irqs_disable() 427 cfg->tgt_ce_len = ab->hw_params.target_ce_count; in ath11k_ahb_init_qmi_ce_config() 428 cfg->tgt_ce = ab->hw_params.target_ce_config; in ath11k_ahb_init_qmi_ce_config() [all …]
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| H A D | ce.c | 265 if (!ab->hw_params.supports_shadow_regs) in ath11k_ce_stop_shadow_timers() 268 for (i = 0; i < ab->hw_params.ce_count; i++) in ath11k_ce_stop_shadow_timers() 513 if ((!pipe->send_cb) || ab->hw_params.credit_flow) { in ath11k_ce_tx_process_cb() 565 if (!(CE_ATTR_DIS_INTR & ab->hw_params.host_ce_config[ce_id].flags)) in ath11k_ce_init_ring() 570 if (!(CE_ATTR_DIS_INTR & ab->hw_params.host_ce_config[ce_id].flags)) in ath11k_ce_init_ring() 574 params.max_buffer_len = ab->hw_params.host_ce_config[ce_id].src_sz_max; in ath11k_ce_init_ring() 575 if (!(ab->hw_params.host_ce_config[ce_id].flags & CE_ATTR_DIS_INTR)) { in ath11k_ce_init_ring() 582 if (!(ab->hw_params.host_ce_config[ce_id].flags & CE_ATTR_DIS_INTR)) { in ath11k_ce_init_ring() 603 if (ab->hw_params.supports_shadow_regs && in ath11k_ce_init_ring() 652 const struct ce_attr *attr = &ab->hw_params.host_ce_config[ce_id]; in ath11k_ce_alloc_pipe() [all …]
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| H A D | pcic.c | 316 for (i = 0, msi_data_idx = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pcic_get_ce_msi_idx() 348 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pcic_free_irq() 393 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pcic_ce_irqs_disable() 405 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pcic_sync_ce_irqs() 613 if (ab->hw_params.ring_mask->tx[i] || in ath11k_pcic_ext_irq_config() 614 ab->hw_params.ring_mask->rx[i] || in ath11k_pcic_ext_irq_config() 615 ab->hw_params.ring_mask->rx_err[i] || in ath11k_pcic_ext_irq_config() 616 ab->hw_params.ring_mask->rx_wbm_rel[i] || in ath11k_pcic_ext_irq_config() 617 ab->hw_params.ring_mask->reo_status[i] || in ath11k_pcic_ext_irq_config() 618 ab->hw_params.ring_mask->rxdma2host[i] || in ath11k_pcic_ext_irq_config() [all …]
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| H A D | pci.h | 39 ((ab)->hw_params.regs->pcie_qserdes_sysclk_en_sel) 43 ((ab)->hw_params.regs->pcie_pcs_osc_dtct_config_base) 46 ((ab)->hw_params.regs->pcie_pcs_osc_dtct_config_base + 0x4) 49 ((ab)->hw_params.regs->pcie_pcs_osc_dtct_config_base + 0xc)
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| H A D | dp_rx.c | 27 return ab->hw_params.hw_ops->rx_desc_get_hdr_status(desc); in ath11k_dp_rx_h_80211_hdr() 34 if (!ab->hw_params.hw_ops->rx_desc_encrypt_valid(desc)) in ath11k_dp_rx_h_mpdu_start_enctype() 37 return ab->hw_params.hw_ops->rx_desc_get_encrypt_type(desc); in ath11k_dp_rx_h_mpdu_start_enctype() 43 return ab->hw_params.hw_ops->rx_desc_get_decap_type(desc); in ath11k_dp_rx_h_msdu_start_decap_type() 50 return ab->hw_params.hw_ops->rx_desc_get_ldpc_support(desc); in ath11k_dp_rx_h_msdu_start_ldpc_support() 57 return ab->hw_params.hw_ops->rx_desc_get_mesh_ctl(desc); in ath11k_dp_rx_h_msdu_start_mesh_ctl_present() 64 return ab->hw_params.hw_ops->rx_desc_get_mpdu_seq_ctl_vld(desc); in ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid() 70 return ab->hw_params.hw_ops->rx_desc_get_mpdu_fc_valid(desc); in ath11k_dp_rx_h_mpdu_start_fc_valid() 78 hdr = (struct ieee80211_hdr *)(skb->data + ab->hw_params.hal_desc_sz); in ath11k_dp_rx_h_mpdu_start_more_frags() 87 hdr = (struct ieee80211_hdr *)(skb->data + ab->hw_params.hal_desc_sz); in ath11k_dp_rx_h_mpdu_start_frag_no() [all …]
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| H A D | spectral.c | 18 #define ATH11K_SPECTRAL_MAX_IB_BINS(x) ((x)->hw_params.spectral.max_fft_bins >> 1) 444 val > ar->ab->hw_params.spectral.max_fft_bins) in ath11k_write_file_spectral_bins() 587 if (!ab->hw_params.spectral.fft_sz) { in ath11k_spectral_process_fft() 597 bin_len = tlv_len - ab->hw_params.spectral.fft_hdr_len; in ath11k_spectral_process_fft() 605 bin_sz = ab->hw_params.spectral.fft_sz + ab->hw_params.spectral.fft_pad_sz; in ath11k_spectral_process_fft() 617 check_length = sizeof(*fft_report) + (num_bins * ab->hw_params.spectral.fft_sz); in ath11k_spectral_process_fft() 639 if (ab->hw_params.spectral.fragment_160mhz) { in ath11k_spectral_process_fft() 681 ab->hw_params.spectral.fft_sz); in ath11k_spectral_process_fft() 766 ab->hw_params.spectral.summary_pad_sz; in ath11k_spectral_process_data() 994 if (!ab->hw_params.spectral.fft_sz) in ath11k_spectral_init()
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| H A D | dp_tx.c | 98 size_t num_tx_rings = ab->hw_params.hal_params->num_tx_rings; in ath11k_dp_tx() 120 ring_selector = ab->hw_params.hw_ops->get_ring_selector(skb); in ath11k_dp_tx() 126 ti.rbm_id = ab->hw_params.hal_params->tcl2wbm_rbm_map[ti.ring_id].rbm_id; in ath11k_dp_tx() 139 !ab->hw_params.tcl_ring_retry) { in ath11k_dp_tx() 257 ab->hw_params.tcl_ring_retry && num_tx_rings > 1) { in ath11k_dp_tx() 623 ab->hw_params.single_pdev_only) { in ath11k_dp_tx_complete_msdu() 848 if (!ab->hw_params.rx_mac_buf_ring) { in ath11k_dp_tx_get_ring_id_type() 1064 for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) { in ath11k_dp_tx_htt_h2t_ppdu_stats_req() 1178 if (ab->hw_params.single_pdev_only) in ath11k_dp_tx_htt_h2t_ext_stats_req() 1211 if (ab->hw_params.full_monitor_mode) { in ath11k_dp_tx_htt_monitor_mode_ring_config() [all …]
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| H A D | qmi.c | 1743 if (ab->hw_params.m3_fw_support) { in ath11k_qmi_host_cap_send() 1758 if (ab->hw_params.internal_sleep_clock) { in ath11k_qmi_host_cap_send() 1772 if (ab->hw_params.global_reset) in ath11k_qmi_host_cap_send() 1843 if (!ab->hw_params.fixed_fw_mem) { in ath11k_qmi_fw_ind_register_send() 1907 if (!(ab->hw_params.fixed_mem_region || in ath11k_qmi_respond_fw_mem_request() 1980 if (ab->hw_params.fixed_mem_region || in ath11k_qmi_free_target_mem_chunk() 2097 ab->qmi.target_mem[idx].paddr = ab->hw_params.bdf_addr; in ath11k_qmi_assign_target_mem_chunk() 2153 if (!ab->hw_params.hybrid_bus_type) in ath11k_qmi_request_device_info() 2218 if (!ab->hw_params.ce_remap) in ath11k_qmi_request_device_info() 2347 if (ab->hw_params.fixed_bdf_addr) { in ath11k_qmi_load_file_target_mem() [all …]
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| H A D | htc.c | 84 bool credit_flow_enabled = (ab->hw_params.credit_flow && in ath11k_htc_send() 211 if (ab->hw_params.credit_flow) { in ath11k_htc_process_trailer() 539 for (i = 0; i < ab->hw_params.ce_count; i++) in ath11k_htc_wait_target() 588 if (ab->hw_params.supports_shadow_regs) in ath11k_htc_wait_target() 654 if (!ab->hw_params.credit_flow) { in ath11k_htc_connect_service() 784 if (ab->hw_params.credit_flow) in ath11k_htc_start() 823 htc->wmi_ep_count = ab->hw_params.max_radios; in ath11k_htc_init()
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| H A D | core.c | 1136 return ab->hw_params.coldboot_cal_ftm; in ath11k_core_coldboot_cal_support() 1139 return ab->hw_params.coldboot_cal_mm; in ath11k_core_coldboot_cal_support() 1152 if (!ab->hw_params.supports_suspend) in ath11k_core_continue_suspend_resume() 1331 if (ab->hw_params.current_cc_support && in ath11k_core_resume_default() 1946 ab->hw_params.fw.dir); in ath11k_core_fetch_bdf() 1997 ATH11K_REGDB_FILE_NAME, ab->hw_params.fw.dir); in ath11k_core_fetch_regdb() 2127 if (!ab->hw_params.pdev_suspend) in ath11k_core_pdev_suspend_target() 2248 if (ab->hw_params.single_pdev_only && ab->hw_params.num_rxdma_per_pdev > 1) { in ath11k_core_start() 2640 const struct ath11k_hw_params *hw_params = NULL; in ath11k_init_hw_params() local 2644 hw_params = &ath11k_hw_params[i]; in ath11k_init_hw_params() [all …]
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| /freebsd/sys/contrib/dev/athk/ath10k/ |
| H A D | leds.c | 30 ath10k_wmi_gpio_output(ar, ar->hw_params.led_pin, ar->leds.gpio_state_pin); in ath10k_leds_set_brightness_blocking() 40 if (ar->hw_params.led_pin == 0) in ath10k_leds_start() 49 ath10k_wmi_gpio_config(ar, ar->hw_params.led_pin, 0, in ath10k_leds_start() 51 ath10k_wmi_gpio_output(ar, ar->hw_params.led_pin, 1); in ath10k_leds_start() 60 if (ar->hw_params.led_pin == 0) in ath10k_leds_register() 83 if (ar->hw_params.led_pin == 0) in ath10k_leds_unregister()
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| H A D | core.c | 829 bool mtu_workaround = ar->hw_params.credit_size_workaround; in ath10k_init_sdio() 983 u32 board_data_size = ar->hw_params.fw.board_size; in ath10k_push_board_ext_data() 984 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; in ath10k_push_board_ext_data() 1034 address = ar->hw_params.patch_load_addr; in ath10k_core_get_board_id_from_otp() 1214 address = ar->hw_params.patch_load_addr; in ath10k_download_fw() 1234 if (ar->hw_params.fw_diag_ce_download) { in ath10k_download_fw() 1333 ar->hw_params.fw.dir, in ath10k_core_fetch_board_data_api_1() 1337 ar->hw_params.fw.dir, in ath10k_core_fetch_board_data_api_1() 1348 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, in ath10k_core_fetch_board_data_api_1() 1538 ar->hw_params.fw.dir, in ath10k_core_fetch_board_data_api_n() [all …]
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| H A D | htt_rx.c | 138 struct ath10k_hw_params *hw = &htt->ar->hw_params; in __ath10k_htt_rx_ring_fill_n() 359 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_rx_amsdu_pop() 511 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_rx_handle_amsdu_mon_32() 588 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_rx_handle_amsdu_mon_64() 673 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_rx_pop_paddr32_list() 738 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_rx_pop_paddr64_list() 815 htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level; in ath10k_htt_rx_alloc() 993 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_rx_h_rates() 1124 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_rx_h_peer_channel() 1240 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_rx_h_signal() [all …]
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| H A D | htt_tx.c | 178 if (!is_mgmt || !ar->hw_params.max_probe_resp_desc_thres) in ath10k_htt_tx_mgmt_inc_pending() 182 ar->hw_params.max_probe_resp_desc_thres < htt->num_pending_mgmt_tx) in ath10k_htt_tx_mgmt_inc_pending() 194 if (!htt->ar->hw_params.max_probe_resp_desc_thres) in ath10k_htt_tx_mgmt_dec_pending() 315 if (!ar->hw_params.continuous_frag_desc) in ath10k_htt_tx_alloc_cont_frag_desc_32() 355 if (!ar->hw_params.continuous_frag_desc) in ath10k_htt_tx_alloc_cont_frag_desc_64() 686 if (!ar->hw_params.continuous_frag_desc) in ath10k_htt_send_frag_desc_bank_cfg_32() 748 if (!ar->hw_params.continuous_frag_desc) in ath10k_htt_send_frag_desc_bank_cfg_64() 816 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_send_rx_ring_cfg_32() 889 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_send_rx_ring_cfg_64() 1454 if (ar->hw_params.continuous_frag_desc) { in ath10k_htt_tx_32() [all …]
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| /freebsd/sys/contrib/dev/athk/ath12k/ |
| H A D | ce.c | 288 if (!(CE_ATTR_DIS_INTR & ab->hw_params->host_ce_config[ce_id].flags)) in ath12k_ce_init_ring() 293 if (!(CE_ATTR_DIS_INTR & ab->hw_params->host_ce_config[ce_id].flags)) in ath12k_ce_init_ring() 297 params.max_buffer_len = ab->hw_params->host_ce_config[ce_id].src_sz_max; in ath12k_ce_init_ring() 298 if (!(ab->hw_params->host_ce_config[ce_id].flags & CE_ATTR_DIS_INTR)) { in ath12k_ce_init_ring() 305 if (!(ab->hw_params->host_ce_config[ce_id].flags & CE_ATTR_DIS_INTR)) { in ath12k_ce_init_ring() 370 const struct ce_attr *attr = &ab->hw_params->host_ce_config[ce_id]; in ath12k_ce_alloc_pipe() 533 for (pipe_num = 0; pipe_num < ab->hw_params->ce_count; pipe_num++) { in ath12k_ce_cleanup_pipes() 550 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_ce_rx_post_buf() 578 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_ce_shadow_config() 579 if (ab->hw_params->host_ce_config[i].src_nentries) in ath12k_ce_shadow_config() [all …]
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| H A D | ahb.c | 144 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_ahb_cancel_workqueue() 205 const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr; in ath12k_ahb_ce_irq_enable() 212 ce_attr = &ab->hw_params->host_ce_config[ce_id]; in ath12k_ahb_ce_irq_enable() 226 const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr; in ath12k_ahb_ce_irq_disable() 233 ce_attr = &ab->hw_params->host_ce_config[ce_id]; in ath12k_ahb_ce_irq_disable() 249 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_ahb_sync_ce_irqs() 277 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_ahb_ce_irqs_enable() 288 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_ahb_ce_irqs_disable() 363 ab->hw_params->fw.dir, ATH12K_AHB_FW_PREFIX, ab_ahb->userpd_id, in ath12k_ahb_power_up() 393 ab->hw_params->fw.dir, ATH12K_AHB_FW2); in ath12k_ahb_power_up() [all …]
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| H A D | dp_rx.c | 201 if (ab->hw_params->rxdma1_enable) in ath12k_dp_rxdma_buf_free() 204 for (i = 0; i < ab->hw_params->num_rxdma_per_pdev; i++) in ath12k_dp_rxdma_buf_free() 257 if (ab->hw_params->rxdma1_enable) { in ath12k_dp_rxdma_buf_setup() 267 for (i = 0; i < ab->hw_params->num_rxdma_per_pdev; i++) { in ath12k_dp_rxdma_buf_setup() 287 for (i = 0; i < ab->hw_params->num_rxdma_per_pdev; i++) in ath12k_dp_rx_pdev_srng_free() 332 for (i = 0; i < ab->hw_params->num_rxdma_per_pdev; i++) { in ath12k_dp_rx_pdev_srng_alloc() 433 if (ab->hw_params->reoq_lut_support) in ath12k_dp_rx_process_reo_cmd_update_rx_queue_list() 606 if (ab->hw_params->dp_primary_link_only && in ath12k_dp_rx_peer_tid_setup() 612 if (ab->hw_params->reoq_lut_support && in ath12k_dp_rx_peer_tid_setup() 637 if (!ab->hw_params->reoq_lut_support) { in ath12k_dp_rx_peer_tid_setup() [all …]
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| H A D | pci.c | 341 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_pci_free_irq() 387 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_pci_ce_irqs_disable() 399 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_pci_sync_ce_irqs() 576 if (ab->hw_params->ring_mask->tx[i] || in ath12k_pci_ext_irq_config() 577 ab->hw_params->ring_mask->rx[i] || in ath12k_pci_ext_irq_config() 578 ab->hw_params->ring_mask->rx_err[i] || in ath12k_pci_ext_irq_config() 579 ab->hw_params->ring_mask->rx_wbm_rel[i] || in ath12k_pci_ext_irq_config() 580 ab->hw_params->ring_mask->reo_status[i] || in ath12k_pci_ext_irq_config() 581 ab->hw_params->ring_mask->host2rxdma[i] || in ath12k_pci_ext_irq_config() 582 ab->hw_params->ring_mask->rx_mon_dest[i] || in ath12k_pci_ext_irq_config() [all …]
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| H A D | dp.c | 142 grp_mask = &ab->hw_params->ring_mask->rx_wbm_rel[0]; in ath12k_dp_srng_calculate_msi_group() 146 for (i = 0; i < ab->hw_params->max_tx_ring; i++) { in ath12k_dp_srng_calculate_msi_group() 153 grp_mask = &ab->hw_params->ring_mask->tx[0]; in ath12k_dp_srng_calculate_msi_group() 157 grp_mask = &ab->hw_params->ring_mask->rx_err[0]; in ath12k_dp_srng_calculate_msi_group() 160 grp_mask = &ab->hw_params->ring_mask->rx[0]; in ath12k_dp_srng_calculate_msi_group() 163 grp_mask = &ab->hw_params->ring_mask->reo_status[0]; in ath12k_dp_srng_calculate_msi_group() 166 grp_mask = &ab->hw_params->ring_mask->rx_mon_status[0]; in ath12k_dp_srng_calculate_msi_group() 169 grp_mask = &ab->hw_params->ring_mask->rx_mon_dest[0]; in ath12k_dp_srng_calculate_msi_group() 172 grp_mask = &ab->hw_params->ring_mask->tx_mon_dest[0]; in ath12k_dp_srng_calculate_msi_group() 175 grp_mask = &ab->hw_params->ring_mask->host2rxdma[0]; in ath12k_dp_srng_calculate_msi_group() [all …]
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| H A D | mhi.c | 207 mhi_ctrl->rddm_size = ab->hw_params->rddm_size; in ath12k_mhi_register() 209 if (ab->hw_params->otp_board_id_register) { in ath12k_mhi_register() 211 ath12k_pci_read32(ab, ab->hw_params->otp_board_id_register); in ath12k_mhi_register() 268 ret = mhi_register_controller(mhi_ctrl, ab->hw_params->mhi_config); in ath12k_mhi_register()
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