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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td260 def : PRFM<"pld", 0b00, "slc", 0b11, "keep", 0b0>;
261 def : PRFM<"pld", 0b00, "slc", 0b11, "strm", 0b1>;
270 def : PRFM<"pli", 0b01, "slc", 0b11, "keep", 0b0>;
271 def : PRFM<"pli", 0b01, "slc", 0b11, "strm", 0b1>;
280 def : PRFM<"pst", 0b10, "slc", 0b11, "keep", 0b0>;
281 def : PRFM<"pst", 0b10, "slc", 0b11, "strm", 0b1>;
707 def : ROSysReg<"PMCEID0_EL0", 0b11, 0b011, 0b1001, 0b1100, 0b110>;
708 def : ROSysReg<"PMCEID1_EL0", 0b11, 0b011, 0b1001, 0b1100, 0b111>;
709 def : ROSysReg<"PMMIR_EL1", 0b11, 0b000, 0b1001, 0b1110, 0b110>;
710 def : ROSysReg<"MIDR_EL1", 0b11, 0b000, 0b0000, 0b0000, 0b000>;
[all …]
H A DAArch64SMEInstrInfo.td333 defm BFMLSL_MZZI : sme2_mla_long_array_index<"bfmlsl", 0b10, 0b11, nxv8bf16, int_aarch64_sm…
334 defm BFMLSL_VG2_M2ZZI : sme2_fp_mla_long_array_vg2_index<"bfmlsl", 0b11, nxv8bf16, int_aarch64_sm…
335 defm BFMLSL_VG4_M4ZZI : sme2_fp_mla_long_array_vg4_index<"bfmlsl", 0b11, nxv8bf16, int_aarch64_sm…
336 defm BFMLSL_MZZ : sme2_mla_long_array_single<"bfmlsl", 0b00, 0b11, nxv8bf16, int_aarch64_sm…
342 defm SMLAL_MZZI : sme2_mla_long_array_index<"smlal", 0b11, 0b00, nxv8i16, int_aarch64_sme_s…
351 defm SMLSL_MZZI : sme2_mla_long_array_index<"smlsl", 0b11, 0b01, nxv8i16, int_aarch64_sme_s…
360 defm UMLAL_MZZI : sme2_mla_long_array_index<"umlal", 0b11, 0b10, nxv8i16, int_aarch64_sme_u…
369 defm UMLSL_MZZI : sme2_mla_long_array_index<"umlsl", 0b11, 0b11, nxv8i16, int_aarch64_sme_u…
370 defm UMLSL_VG2_M2ZZI : sme2_int_mla_long_array_vg2_index<"umlsl", 0b11, int_aarch64_sme_umlsl_lane…
371 defm UMLSL_VG4_M4ZZI : sme2_int_mla_long_array_vg4_index<"umlsl", 0b11, int_aarch64_sme_umlsl_lane…
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H A DAArch64SVEInstrInfo.td540 defm BIC_ZZZ : sve_int_bin_cons_log<0b11, "bic", AArch64bic>;
599 defm UMIN_ZI : sve_int_arith_imm1_unsigned<0b11, "umin", AArch64umin_p>;
764 …defm FNMLS_ZPmZZ : sve_fp_3op_p_zds_a<0b11, "fnmls", "FNMLS_ZPZZZ", int_aarch64_sve_fnmls, "FNMSB_…
769 …defm FNMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b11, "fnmsb", int_aarch64_sve_fnmsb, "FNMLS_ZPmZZ", /*isRev…
916 defm UUNPKHI_ZZ : sve_int_perm_unpk<0b11, "uunpkhi", AArch64uunpkhi>;
939 defm BRKPBS_PPzPP : sve_int_brkp<0b11, "brkpbs", null_frag>;
1005 defm LD1D_Q_IMM : sve_mem_128b_cld_si<0b11, "ld1d">;
1012 defm LD1RB_D_IMM : sve_mem_ld_dup<0b00, 0b11, "ld1rb", Z_d, ZPR64, uimm6s1>;
1016 defm LD1RH_D_IMM : sve_mem_ld_dup<0b01, 0b11, "ld1rh", Z_d, ZPR64, uimm6s2>;
1020 defm LD1RW_D_IMM : sve_mem_ld_dup<0b10, 0b11, "ld1rw", Z_d, ZPR64, uimm6s4>;
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H A DSVEInstrFormats.td385 def _D : sve_int_ptrue<0b11, opc, asm, PPR64, nxv2i1, op>;
775 let Inst{15-14} = 0b11;
832 def _D : sve_int_pfirst_next<0b11, opc, asm, PPR64>;
874 def _D : sve_int_count_r<0b11, opc, asm, GPR64z, PPR64, GPR64as32>;
902 def _D : sve_int_count_r<0b11, opc, asm, GPR32z, PPR64, GPR32z>;
920 def _D : sve_int_count_r<0b11, opc, asm, GPR64z, PPR64, GPR64z>;
1015 def _D : sve_int_count_v<0b11, opc, asm, ZPR64, PPR64>;
1056 def _D : sve_int_pcount_pred<0b11, opc, asm, PPR64>;
1156 let Inst{21-20} = 0b11;
1305 def _D : sve_int_perm_dup_r<0b11, asm, ZPR64, nxv2i64, GPR64sp, op>;
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H A DAArch64InstrFormats.td2952 let Inst{14-13} = 0b11;
3026 let Inst{14-13} = 0b11;
3098 let Unpredictable{15-14} = 0b11;
4419 let Inst{11-10} = 0b11;
4864 BaseMemTagStore<opc1, 0b11, insn, "\t$Rt, [$Rn, $offset]!",
4958 def UWHr : BaseFPToIntegerUnscaled<0b11, rmode, opcode, FPR16, GPR32, asm,
4965 def UXHr : BaseFPToIntegerUnscaled<0b11, rmode, opcode, FPR16, GPR64, asm,
4999 def SWHri : BaseFPToInteger<0b11, rmode, opcode, FPR16, GPR32,
5009 def SXHri : BaseFPToInteger<0b11, rmode, opcode, FPR16, GPR64,
5096 let Inst{23-22} = 0b11; // 16-bit FPR flag
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H A DSMEInstrFormats.td328 …def NAME : sme_fp_outer_product_inst<s, {0,bf}, 0b11, TileOp16, ZPR16, mnemonic>, SMEPseudo2Instr<…
619 def _D : sme_mem_ld_ss_inst<0b0, 0b11, mnemonic # "d",
627 def _Q : sme_mem_ld_ss_inst<0b1, 0b11, mnemonic # "q",
757 def _D : sme_mem_st_ss_inst<0b0, 0b11, mnemonic # "d",
765 def _Q : sme_mem_st_ss_inst<0b1, 0b11, mnemonic # "q",
954 def _D : sme_vector_to_tile_inst<0b0, 0b11, !if(is_col, TileVectorOpV64,
963 def _Q : sme_vector_to_tile_inst<0b1, 0b11, !if(is_col, TileVectorOpV128,
1137 def _D : sme_tile_to_vector_inst<0b0, 0b11, ZPR64, !if(is_col, TileVectorOpV64,
1145 def _Q : sme_tile_to_vector_inst<0b1, 0b11, ZPR128, !if(is_col, TileVectorOpV128,
1337 def _D : sve2_clamp<asm, 0b11, U, ZPR64>;
[all …]
H A DAArch64InstrInfo.td1253 let CRm{1-0} = 0b11;
1347 let Inst{11-10} = 0b11;
1454 def RAX1 : CryptoRRR_2D<0b0,0b11, "rax1">;
1523 def SM3TT2B : CryptoRRRi2Tied<0b0, 0b11, "sm3tt2b">;
1562 def LDAPRX : RCPCLoad<0b11, "ldapr", GPR64>;
1727 def DB : SignAuthOneData<prefix, 0b11, !strconcat(asm, "db"), op>;
1731 def DZB : SignAuthZero<prefix_z, 0b11, !strconcat(asm, "dzb"), op>;
1959 def FJCVTZS : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
2112 defm MOVK : InsertImmediate<0b11, "movk">;
2389 defm RORV : Shift<0b11, "ror", rotr>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrVFP.td426 def VADDD : ADbI<0b11100, 0b11, 0, 0,
433 def VADDS : ASbIn<0b11100, 0b11, 0, 0,
444 def VADDH : AHbI<0b11100, 0b11, 0, 0,
451 def VSUBD : ADbI<0b11100, 0b11, 1, 0,
458 def VSUBS : ASbIn<0b11100, 0b11, 1, 0,
469 def VSUBH : AHbI<0b11100, 0b11, 1, 0,
570 defm VSELGT : vsel_inst<"gt", 0b11, 12>;
610 def VCMPED : ADuI<0b11101, 0b11, 0b0100, 0b11, 0,
615 def VCMPES : ASuI<0b11101, 0b11, 0b0100, 0b11, 0,
624 def VCMPEH : AHuI<0b11101, 0b11, 0b0100, 0b11, 0,
[all …]
H A DARMInstrNEON.td2622 : N2V<0b11, 0b11, op19_18, 0b10, op11_7, 0, 0, (outs DPR:$Vd, DPR:$Vm),
2628 : N2V<0b11, 0b11, op19_18, 0b10, op11_7, 1, 0, (outs QPR:$Vd, QPR:$Vm),
3558 def v1i64 : N3VD<op24, op23, 0b11, op11_8, op4, itinD,
3561 def v2i64 : N3VQ<op24, op23, 0b11, op11_8, op4, itinQ,
3666 def v1i64 : N3VDInt<op24, op23, 0b11, op11_8, op4, f, itinD32,
3669 def v2i64 : N3VQInt<op24, op23, 0b11, op11_8, op4, f, itinQ32,
3680 def v1i64 : N3VDIntSh<op24, op23, 0b11, op11_8, op4, f, itinD32,
3683 def v2i64 : N3VQIntSh<op24, op23, 0b11, op11_8, op4, f, itinQ32,
4680 def VMLShd : N3VDMulOp<0, 0, 0b11, 0b1101, 1, IIC_VMACD, "vmls", "f16",
4683 def VMLShq : N3VQMulOp<0, 0, 0b11, 0b1101, 1, IIC_VMACQ, "vmls", "f16",
[all …]
H A DARMInstrMVE.td291 def MVE_v2i64 : MVEVectorVTInfo<v2i64, ?, v2i1, ?, 0b11, "i", ?>;
299 def MVE_v2s64 : MVEVectorVTInfo<v2i64, ?, v2i1, ?, 0b11, "s", 0b0>;
303 def MVE_v2u64 : MVEVectorVTInfo<v2i64, ?, v2i1, ?, 0b11, "u", 0b1>;
308 def MVE_v2f64 : MVEVectorVTInfo<v2f64, ?, v2i1, ?, 0b11, "f", ?>;
311 def MVE_v16p8 : MVEVectorVTInfo<v16i8, v8i16, v16i1, v8i1, 0b11, "p", 0b0>;
312 def MVE_v8p16 : MVEVectorVTInfo<v8i16, v4i32, v8i1, v4i1, 0b11, "p", 0b1>;
322 if !ne(VTI.Size, 0b11) then {
358 if !ne(VTI.Size, 0b11) then {
412 let Inst{27-26} = 0b11;
474 def MVE_SQSHL : MVE_ScalarShiftSRegImm<"sqshl", 0b11>;
[all...]
H A DARMInstrCDE.td61 let Inst{27-26} = 0b11;
342 let Inst{21-20} = 0b11;
364 let Inst{21-20} = 0b11;
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td410 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
415 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
420 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
425 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
430 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
435 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
444 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
449 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
454 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
459 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
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/freebsd/contrib/llvm-project/libcxx/include/__format/
H A Dindic_conjunct_break_table.h339 return static_cast<__property>(__entries[__i] & 0b11); in __get_property()
/freebsd/sys/arm/ti/am335x/
H A Dtps65217x.h98 #define TPS65217_VO_425V 0b11
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_core/ed25519/ref10/
H A Ded25519_ref10.c1097 int64_t b11 = (load_4(b + 28) >> 7); in sc25519_muladd() local
1177 s11 = c11 + a0 * b11 + a1 * b10 + a2 * b9 + a3 * b8 + a4 * b7 + a5 * b6 + in sc25519_muladd()
1179 s12 = a1 * b11 + a2 * b10 + a3 * b9 + a4 * b8 + a5 * b7 + a6 * b6 + in sc25519_muladd()
1181 s13 = a2 * b11 + a3 * b10 + a4 * b9 + a5 * b8 + a6 * b7 + a7 * b6 + in sc25519_muladd()
1183 s14 = a3 * b11 + a4 * b10 + a5 * b9 + a6 * b8 + a7 * b7 + a8 * b6 + in sc25519_muladd()
1185 s15 = a4 * b11 + a5 * b10 + a6 * b9 + a7 * b8 + a8 * b7 + a9 * b6 + in sc25519_muladd()
1188 a5 * b11 + a6 * b10 + a7 * b9 + a8 * b8 + a9 * b7 + a10 * b6 + a11 * b5; in sc25519_muladd()
1189 s17 = a6 * b11 + a7 * b10 + a8 * b9 + a9 * b8 + a10 * b7 + a11 * b6; in sc25519_muladd()
1190 s18 = a7 * b11 + a8 * b10 + a9 * b9 + a10 * b8 + a11 * b7; in sc25519_muladd()
1191 s19 = a8 * b11 + a9 * b10 + a10 * b9 + a11 * b8; in sc25519_muladd()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo16Instr.td66 def SUBC16 : R16_XZ_BINOP_C<0b1000, 0b11, "subc16">;
84 def ROTL16 : R16_XZ_BINOP<0b1100, 0b11, "rotl16", BinOpFrag<(rotl node:$LHS, (and node:$RHS, 0x1f))…
91 def SEXTH16 : R16_XZ_UNOP<0b1101, 0b11, "sexth16">;
119 def SUBI16XZ : I16_XZ_IMM3<0b11, "subi16", sub>;
186 let Inst{1,0} = 0b11;
197 let Inst{1,0} = 0b11;
288 def REVH16 : R16_XZ_UNOP<0b1110, 0b11, "revh16">;
342 let Inst{1,0} = 0b11;
/freebsd/contrib/netbsd-tests/ipf/input/
H A Dn162 4520 0068 17e4 0000 6b11 3539 c05b ac33 45f8 4fc1
/freebsd/contrib/netbsd-tests/ipf/expected/
H A Dn161 4520 0068 17e4 0000 6b11 cbba c05b ac33 ac1f 5318 1194 07dd 0054 0000 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5…
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoXCV.td48 def CV_BITREV : CVBitManipRII<0b11, 0b001, "cv.bitrev", uimm2>;
113 def CV_MACHHSRN : CVInstMacN<0b11, 0b110, "cv.machhsrn">,
123 def CV_MACHHURN : CVInstMacN<0b11, 0b111, "cv.machhurn">,
135 def CV_MULHHSRN : CVInstMulN<0b11, 0b100, "cv.mulhhsrn">,
145 def CV_MULHHURN : CVInstMulN<0b11, 0b101, "cv.mulhhurn">,
242 def CV_ADDURN : CVInstAluRRI<0b11, 0b010, "cv.addurn">,
250 def CV_SUBURN : CVInstAluRRI<0b11, 0b011, "cv.suburn">,
H A DRISCVInstrFormatsV.td31 def MOPLDIndexedOrder : RISCVMOP<0b11>;
36 def MOPSTIndexedOrder : RISCVMOP<0b11>;
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrControl.td99 let Inst = (descend 0b0101, !cast<MxEncCondOp>("MxCC"#CC).Value, 0b11,
109 (descend 0b0101, !cast<MxEncCondOp>("MxCC"#CC).Value, 0b11, DST_ENC.EA),
136 (descend 0b0100, 0b1110, 0b11, DST_ENC.EA),
H A DM68kInstrShiftRotate.td36 defvar MxROOP_RO = 0b11;
H A DM68kInstrFormats.td90 !eq(scale, 8) : 0b11
207 def MxEncSize64 : MxEncSize<0b11>;
/freebsd/crypto/openssl/crypto/ec/
H A Dcurve25519.c4995 int64_t b11 = (load_4(b + 28) >> 7); in sc_muladd() local
5067 …s11 = c11 + a0 * b11 + a1 * b10 + a2 * b9 + a3 * b8 + a4 * b7 + a5 * b6 + a6 *… in sc_muladd()
5068 …s12 = a1 * b11 + a2 * b10 + a3 * b9 + a4 * b8 + a5 * b7 + a6 * b6 + a7 *… in sc_muladd()
5069 …s13 = a2 * b11 + a3 * b10 + a4 * b9 + a5 * b8 + a6 * b7 + a7 * b6 + a8 *… in sc_muladd()
5070 …s14 = a3 * b11 + a4 * b10 + a5 * b9 + a6 * b8 + a7 * b7 + a8 * b6 + a9 *… in sc_muladd()
5071 …s15 = a4 * b11 + a5 * b10 + a6 * b9 + a7 * b8 + a8 * b7 + a9 * b6 + a10 *… in sc_muladd()
5072 …s16 = a5 * b11 + a6 * b10 + a7 * b9 + a8 * b8 + a9 * b7 + a10 * b6 + a11 *… in sc_muladd()
5073 s17 = a6 * b11 + a7 * b10 + a8 * b9 + a9 * b8 + a10 * b7 + a11 * b6; in sc_muladd()
5074 s18 = a7 * b11 + a8 * b10 + a9 * b9 + a10 * b8 + a11 * b7; in sc_muladd()
5075 s19 = a8 * b11 + a9 * b10 + a10 * b9 + a11 * b8; in sc_muladd()
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dfsav28 #>>>>10 byte 10 \b11-

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