Lines Matching refs:b11
291 def MVE_v2i64 : MVEVectorVTInfo<v2i64, ?, v2i1, ?, 0b11, "i", ?>;
299 def MVE_v2s64 : MVEVectorVTInfo<v2i64, ?, v2i1, ?, 0b11, "s", 0b0>;
303 def MVE_v2u64 : MVEVectorVTInfo<v2i64, ?, v2i1, ?, 0b11, "u", 0b1>;
308 def MVE_v2f64 : MVEVectorVTInfo<v2f64, ?, v2i1, ?, 0b11, "f", ?>;
311 def MVE_v16p8 : MVEVectorVTInfo<v16i8, v8i16, v16i1, v8i1, 0b11, "p", 0b0>;
312 def MVE_v8p16 : MVEVectorVTInfo<v8i16, v4i32, v8i1, v4i1, 0b11, "p", 0b1>;
322 if !ne(VTI.Size, 0b11) then {
358 if !ne(VTI.Size, 0b11) then {
412 let Inst{27-26} = 0b11;
474 def MVE_SQSHL : MVE_ScalarShiftSRegImm<"sqshl", 0b11>;
585 def MVE_SQSHLL : MVE_ScalarShiftDRegImm<"sqshll", 0b11, 0b1>;
839 let Inst{19-18} = 0b11;
1417 let Inst{10-9} = 0b11;
1429 let Inst{25-24} = 0b11;
1461 let Inst{25-24} = 0b11;
1539 let Inst{21-20} = 0b11;
1549 def MVE_VREV64_8 : MVE_VREV<"vrev64", "8", 0b00, 0b00, 0b11, "@earlyclobber $Qd">;
1550 def MVE_VREV64_16 : MVE_VREV<"vrev64", "16", 0b01, 0b00, 0b11, "@earlyclobber $Qd">;
1551 def MVE_VREV64_32 : MVE_VREV<"vrev64", "32", 0b10, 0b00, 0b11, "@earlyclobber $Qd">;
1631 def MVE_VORN : MVE_bit_ops<"vorn", 0b11, 0b0>;
2461 let Inst{21-20} = 0b11;
2502 let Inst{21-20} = 0b11;
2507 let Inst{9-8} = 0b11;
2621 def MVE_VMOVimmi64 : MVE_mod_imm<"vmov", "i64", {1,1,1,0}, 0b1, (ins nImmSplatI64:$imm), 0b11>;
2672 let Inst{21-20} = 0b11;
2674 let Inst{17-16} = 0b11;
2874 let Inst{21-20} = 0b11;
3144 let Inst{25-24} = 0b11;
3241 let Inst{25-24} = 0b11;
3303 let Inst{25-24} = 0b11;
3343 let Inst{25-24} = 0b11;
3373 let Inst{25-24} = 0b11;
3449 let Inst{25-24} = 0b11;
3491 let Inst{25-24} = 0b11;
3568 let Inst{21-20} = 0b11;
3904 let Inst{11-10} = 0b11;
3983 let Inst{21-20} = 0b11;
3985 let Inst{17-16} = 0b11;
4020 defm m : MVE_VCVT_fp_int_anpm_inner<Int, Flt, "m", 0b11>;
4040 let Inst{21-20} = 0b11;
4042 let Inst{17-16} = 0b11;
4103 let Inst{21-20} = 0b11;
4234 : MVE_VCMPqq<suffix, size, 0b11, pred_basic_fp, !if(size, 0b01, 0b10)> {
4299 : MVE_VCMPqr<suffix, size, 0b11, pred_basic_fp, !if(size, 0b01, 0b10)> {
4609 let Inst{21-20} = 0b11;
4693 // For polynomial multiplies, the size bits take the unused value 0b11, and
4705 int_arm_mve_mull_int_predicated, 0b0, 0b11,
4708 int_arm_mve_mull_int_predicated, 0b1, 0b11,
4720 int_arm_mve_mull_int_predicated, 0b0, 0b11,
4723 int_arm_mve_mull_int_predicated, 0b1, 0b11,
4851 let Inst{21-20} = 0b11;
5108 let Inst{21-20} = 0b11;
5135 let Inst{21-20} = 0b11;
5318 let Inst{21-20} = 0b11;
5411 def "" : MVE_VxADDSUB_qr<iname, VTI.Suffix, VTI.Size{0}, 0b11, subtract, VTI.Size>;
5434 let Inst{21-20} = 0b11;
5606 def "" : MVE_VxxMUL_qr<"vmul", VTI.Suffix, VTI.Size{0}, 0b11, VTI.Size>;
5667 def "": MVE_VFMAMLA_qr<iname, VTI.Suffix, VTI.Size{0}, 0b11, scalar_addend, VTI.Size>;
6158 def MVE_memD: MVE_memsz<0b11, 3, ?, "d", ["", "u", "s", "f"]>;
6705 let Inst{21-20} = 0b11;
6774 let Inst{21-20} = 0b11;
6960 def MVE_DLSTP_64 : MVE_DLSTP<"dlstp.64", 0b11>;
6965 def MVE_WLSTP_64 : MVE_WLSTP<"wlstp.64", 0b11>;
6991 let Unpredictable{21-20} = 0b11;