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Searched refs:Registers (Results 1 – 25 of 138) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBanks.td14 /// General Purpose Registers
16 /// Floating point Registers
18 /// Vector Registers
20 /// Condition Registers
/freebsd/contrib/llvm-project/compiler-rt/lib/hwasan/
H A Dhwasan_registers.h23 struct Registers { struct
27 __attribute__((always_inline, unused)) static Registers GetRegisters() { in GetRegisters() argument
28 Registers regs; in GetRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterBanks.td12 /// General Purpose Registers: RAX, RCX,...
15 /// Floating Point/Vector Registers
18 /// Pseudo Registers: RFP80
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dzte,sysctrl.txt1 ZTE sysctrl Registers
3 Registers for 'zte,zx296702' SoC:
15 Registers for 'zte,zx296718' SoC:
/freebsd/sys/dts/arm/
H A Dtegra20.dtsi46 reg = < 0x50041000 0x1000 >, /* Distributor Registers */
47 < 0x50040100 0x0100 >; /* CPU Interface Registers */
57 reg = < 0x50040200 0x100 >, /* Global Timer Registers */
58 < 0x50040600 0x100 >; /* Private Timer Registers */
H A Dtrimslice.dts63 reg = < 0x50041000 0x1000 >, /* Distributor Registers */
64 < 0x50040100 0x0100 >; /* CPU Interface Registers */
71 reg = < 0x50040200 0x100 >, /* Global Timer Registers */
72 < 0x50040600 0x100 >; /* Private Timer Registers */
H A Dvybrid.dtsi70 reg = <0x40003000 0x1000>, /* Distributor Registers */
71 <0x40002100 0x100>; /* CPU Interface Registers */
92 reg = < 0x40002200 0x100 >, /* Global Timer Registers */
93 < 0x40002600 0x100 >; /* Private Timer Registers */
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DCallingConvEmitter.cpp353 std::set<std::string> &Registers = Entry.second; in emitArgRegisterLists() local
354 if (!Registers.empty()) in emitArgRegisterLists()
379 for (const auto &[RegName, Registers] : AssignedRegsMap) { in emitArgRegisterLists()
385 if (Registers.empty()) in emitArgRegisterLists()
388 O << llvm::interleaved(Registers); in emitArgRegisterLists()
397 for (const auto &[RegName, Registers] : AssignedSwiftRegsMap) in emitArgRegisterLists()
399 << llvm::interleaved(Registers) << " };\n"; in emitArgRegisterLists()
H A DAsmWriterEmitter.cpp585 const std::deque<CodeGenRegister> &Registers) { in emitRegisterNameString() argument
587 SmallVector<std::string, 4> AsmNames(Registers.size()); in emitRegisterNameString()
589 for (const auto &Reg : Registers) { in emitRegisterNameString()
627 for (unsigned i = 0, e = Registers.size(); i != e; ++i) { in emitRegisterNameString()
639 const auto &Registers = Target.getRegBank().getRegisters(); in EmitGetRegisterName() local
642 StringRef Namespace = Registers.front().TheDef->getValueAsString("Namespace"); in EmitGetRegisterName()
656 << " assert(RegNo && RegNo < " << (Registers.size() + 1) in EmitGetRegisterName()
662 emitRegisterNameString(O, R->getName(), Registers); in EmitGetRegisterName()
664 emitRegisterNameString(O, "", Registers); in EmitGetRegisterName()
/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dk3-ringacc.txt21 "rt" - The RA Ring Real-time Control/Status Registers
22 "fifos" - The RA Queues Registers
23 "proxy_gcfg" - The RA Proxy Global Config Registers
24 "proxy_target" - The RA Proxy Datapath Registers
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.td71 // Floating Point Registers
85 // Pseudo Registers
101 // Data Registers
109 // Address Registers
128 // Floating Point Data Registers
142 // Float Point System Control Registers
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.td40 // Mips CPU Registers.
43 // Mips 64-bit CPU Registers
49 // Mips 32-bit FPU Registers
52 // Mips 64-bit (aliased) FPU Registers
65 // Mips 128-bit (aliased) MSA Registers
71 // Accumulator Registers
78 // Mips Hardware Registers
82 // Registers
86 // General Purpose Registers
121 // General Purpose 64-bit Registers
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600RegisterInfo.td46 // 32-bit Temporary Registers
53 // 128-bit Temporary Registers
88 // 32-bit Temporary Registers
91 // 128-bit Temporary Registers
103 // 32-bit Temporary Registers
106 // 128-bit Temporary Registers
122 // Special Registers
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterBanks.td12 /// General Purpose Registers: W, X.
15 /// Floating Point, Vector, Scalable Vector Registers: B, H, S, D, Q, Z.
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUPALMetadata.cpp861 auto Registers = getRegisters(); in toLegacyBlob() local
862 if (Registers.getMap().empty()) in toLegacyBlob()
866 for (auto I : Registers.getMap()) { in toLegacyBlob()
889 Registers = RegsObj.getMap(); in setFromString()
903 Registers.getMap()[Key] = I.second; in setFromString()
921 if (Registers.isEmpty()) in getRegisters()
922 Registers = refRegisters(); in getRegisters()
923 return Registers.getMap(); in getRegisters()
1028 Registers = MsgPackDoc.getEmptyNode(); in reset()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSystemOperands.td179 // Debug/Trace Registers
236 // Debug/Trace Registers
242 // Hypervisor Counter/Timer Virtualization Registers
250 // Hypervisor State Enable Registers
260 // Virtual Supervisor Registers
282 // Machine Information Registers
346 // Machine State Enable Registers
400 // Debug/ Trace Registers (shared with Debug Mode)
425 // Debug Mode Registers
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXRegisterInfo.td21 // Registers
24 // Special Registers used as stack pointer
30 // Special Registers used as the stack
/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Dmpc8xxx-wdt.txt10 On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
11 On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.cpp1180 for (CodeGenRegister &Reg : Registers) in CodeGenRegBank()
1184 for (CodeGenRegister &Reg : Registers) in CodeGenRegBank()
1193 for (CodeGenRegister &Reg : Registers) in CodeGenRegBank()
1208 for (CodeGenRegister &Reg : Registers) in CodeGenRegBank()
1214 for (CodeGenRegister &Reg : Registers) in CodeGenRegBank()
1219 for (CodeGenRegister &Reg : Registers) { in CodeGenRegBank()
1287 Registers.emplace_back(Def, Registers.size() + 1); in getReg()
1288 Reg = &Registers.back(); in getReg()
1405 for (const CodeGenRegister &R : Registers) { in computeComposites()
1452 for (const CodeGenRegister &Reg1 : Registers) { in computeComposites()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dfsl,imx27-pinctrl.txt24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
41 Registers: OCR1, OCR2
50 Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/LowLevel/
H A DDWARFUnwindTable.h184 SmallVector<uint32_t, 4> Registers; in getRegisters() local
186 Registers.push_back(Register); in getRegisters()
187 return Registers; in getRegisters()
/freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A Dccf.txt32 Registers that are supported by the CCF.
35 Specifies the number of Snoop ID Port Mapping Registers that
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegisterInfo.td1 //WebAssemblyRegisterInfo.td-Describe the WebAssembly Registers -*- tablegen -*-
23 // Registers
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/POSIX/
H A DProcessPOSIXLog.cpp20 {{"registers"}, {"log register read/writes"}, POSIXLog::Registers},
H A DProcessPOSIXLog.h23 Registers = Log::ChannelFlag<4>, enumerator

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