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Searched refs:RVLocs (Results 1 – 25 of 27) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp36 const SmallVectorImpl<CCValAssign> &RVLocs,
284 SmallVector<CCValAssign, 16> RVLocs; in LowerCall() local
286 CCState RetCCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCall()
403 return lowerCallResult(Chain, Glue, RVLocs, dl, DAG, InVals); in LowerCall()
409 const SmallVectorImpl<CCValAssign> &RVLocs, in lowerCallResult() argument
414 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in lowerCallResult()
415 const CCValAssign &VA = RVLocs[i]; in lowerCallResult()
634 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
635 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
654 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp562 SmallVectorImpl<CCValAssign> &RVLocs, in AnalyzeReturnValues() argument
729 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
730 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
744 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
751 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
755 AnalyzeReturnValues(CCInfo, RVLocs, Outs); in LowerReturn()
761 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
762 CCValAssign &VA = RVLocs[i]; in LowerReturn()
941 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
942 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp533 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
534 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
546 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
549 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
559 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
560 CCValAssign &VA = RVLocs[i]; in LowerReturn()
781 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
782 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
788 for (unsigned I = 0; I != RVLocs.size(); ++I) { in LowerCallResult()
789 Chain = DAG.getCopyFromReg(Chain, DL, RVLocs[I].getLocReg(), in LowerCallResult()
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp543 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
547 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
561 for (size_t i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
562 CCValAssign &VA = RVLocs[i]; in LowerReturn()
590 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
591 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerCallResult()
603 for (auto &Val : RVLocs) { in LowerCallResult()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp238 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
239 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
264 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn_32() local
267 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn_32()
280 i != RVLocs.size(); in LowerReturn_32()
282 CCValAssign &VA = RVLocs[i]; in LowerReturn_32()
302 VA = RVLocs[++i]; // skip ahead to next loc in LowerReturn_32()
347 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn_64() local
350 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn_64()
364 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn_64()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2032 SmallVector<CCValAssign, 16> RVLocs; in FinishCall() local
2033 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, RVLocs, *Context); in FinishCall()
2037 if (RVLocs.size() == 2 && RetVT == MVT::f64) { in FinishCall()
2040 MVT DestVT = RVLocs[0].getValVT(); in FinishCall()
2045 .addReg(RVLocs[0].getLocReg()) in FinishCall()
2046 .addReg(RVLocs[1].getLocReg())); in FinishCall()
2048 UsedRegs.push_back(RVLocs[0].getLocReg()); in FinishCall()
2049 UsedRegs.push_back(RVLocs[1].getLocReg()); in FinishCall()
2054 assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!"); in FinishCall()
2055 MVT CopyVT = RVLocs[0].getValVT(); in FinishCall()
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H A DARMISelLowering.cpp2209 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
2210 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
2215 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCallResult()
2216 CCValAssign VA = RVLocs[i]; in LowerCallResult()
2235 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
2249 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
2253 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
3154 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
3155 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
3199 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp664 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
665 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
753 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
754 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
758 for (unsigned I = 0, OutsIndex = 0, E = RVLocs.size(); I != E; in LowerReturn()
760 CCValAssign &VA = RVLocs[I]; in LowerReturn()
834 Passv64i1ArgInRegs(dl, DAG, ValToCopy, RetVals, VA, RVLocs[++I], in LowerReturn()
839 MF.getRegInfo().disableCalleeSavedRegister(RVLocs[I].getLocReg()); in LowerReturn()
1101 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
1102 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
[all …]
H A DX86CallLowering.cpp
H A DX86FastISel.cpp3582 SmallVector<CCValAssign, 16> RVLocs; in fastLowerCall() local
3583 CCState CCRetInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs, in fastLowerCall()
3589 for (unsigned i = 0; i != RVLocs.size(); ++i) { in fastLowerCall()
3590 CCValAssign &VA = RVLocs[i]; in fastLowerCall()
3632 CLI.NumResultRegs = RVLocs.size(); in fastLowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp971 const SmallVectorImpl<CCValAssign> &RVLocs, in LowerCallResult() argument
976 for (const CCValAssign &VA : RVLocs) { in LowerCallResult()
1033 SmallVector<CCValAssign, 16> RVLocs; in LowerCCCCallTo() local
1035 CCState RetCCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCCCCallTo()
1135 return LowerCallResult(Chain, InGlue, RVLocs, dl, DAG, InVals); in LowerCCCCallTo()
1329 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
1330 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
1351 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
1354 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
1371 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerReturn()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp139 SmallVector<CCValAssign, 16> RVLocs; in canLowerReturn() local
140 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in canLowerReturn()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp71 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
72 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
373 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
376 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
386 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
387 CCValAssign &VA = RVLocs[i]; in LowerReturn()
787 SmallVector<CCValAssign, 16> RVLocs; in LowerCall() local
788 CCState RVInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCall()
799 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCall()
800 CCValAssign &VA = RVLocs[i]; in LowerCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1499 SmallVector<CCValAssign, 16> RVLocs; in finishCall() local
1500 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in finishCall()
1502 CCValAssign &VA = RVLocs[0]; in finishCall()
1503 assert(RVLocs.size() == 1 && "No support for multi-reg return values!"); in finishCall()
1585 SmallVector<CCValAssign, 16> RVLocs; in fastLowerCall() local
1586 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs, *Context); in fastLowerCall()
1588 if (RVLocs.size() > 1) in fastLowerCall()
H A DPPCISelLowering.cpp5349 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
5350 CCState CCRetInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
5359 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerCallResult()
5360 CCValAssign &VA = RVLocs[i]; in LowerCallResult()
5370 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
7812 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
7813 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
7826 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
7827 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
7838 for (unsigned i = 0, RealResIdx = 0; i != RVLocs.size(); ++i, ++RealResIdx) { in LowerReturn()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1651 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
1652 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
1663 for (CCValAssign const &RVLoc : RVLocs) { in LowerCallResult()
1682 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
1683 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
1698 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
1701 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
1716 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerReturn()
1717 CCValAssign &VA = RVLocs[i]; in LowerReturn()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1275 SmallVector<CCValAssign, 16> RVLocs; in finishCall() local
1276 MipsCCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in finishCall()
1283 if (RVLocs.size() != 1) in finishCall()
1286 MVT CopyVT = RVLocs[0].getValVT(); in finishCall()
1296 ResultReg).addReg(RVLocs[0].getLocReg()); in finishCall()
1297 CLI.InRegs.push_back(RVLocs[0].getLocReg()); in finishCall()
H A DMipsISelLowering.cpp3525 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
3526 MipsCCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
3535 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCallResult()
3536 CCValAssign &VA = RVLocs[i]; in LowerCallResult()
3539 SDValue Val = DAG.getCopyFromReg(Chain, DL, RVLocs[i].getLocReg(), in LowerCallResult()
3540 RVLocs[i].getLocVT(), InGlue); in LowerCallResult()
3808 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
3809 MipsCCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
3841 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
3845 MipsCCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp189 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
190 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
207 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
210 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
223 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn()
224 CCValAssign &VA = RVLocs[i]; in LowerReturn()
355 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
357 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
366 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCallResult()
368 if (RVLocs[ in LowerCallResult()
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp889 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
890 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
895 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerCallResult()
896 CCValAssign &VA = RVLocs[i]; in LowerCallResult()
1065 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
1066 CCState CCInfo(CCID, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
1079 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
1080 CCState CCInfo(CCID, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
1092 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerReturn()
1093 CCValAssign &VA = RVLocs[i]; in LowerReturn()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp474 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
475 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp5496 SmallVector<CCValAssign> RVLocs; in LowerCall() local
5497 CCState RetCCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerCall()
5501 for (auto &VA : RVLocs) { in LowerCall()
5520 SmallVector<CCValAssign> RVLocs; in CanLowerReturn() local
5521 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
5540 SmallVector<CCValAssign> RVLocs; in LowerReturn() local
5543 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
5548 if (CallConv == CallingConv::GHC && !RVLocs.empty()) in LowerReturn()
5554 for (unsigned i = 0, e = RVLocs.size(); i < e; ++i) { in LowerReturn()
5555 CCValAssign &VA = RVLocs[i]; in LowerReturn()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3113 SmallVector<CCValAssign, 16> RVLocs; in finishCall() local
3114 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in finishCall()
3118 for (unsigned i = 0; i != RVLocs.size(); ++i) { in finishCall()
3119 CCValAssign &VA = RVLocs[i]; in finishCall()
3135 CLI.NumResultRegs = RVLocs.size(); in finishCall()
H A DAArch64ISelLowering.h1061 const SmallVectorImpl<CCValAssign> &RVLocs,
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp20162 SmallVector<CCValAssign, 16> RVLocs; in LowerCall()
20163 CCState RetCCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerCall()
20167 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { in LowerCall()
20168 auto &VA = RVLocs[i]; in LowerCall()
20178 SDValue RetValue2 = DAG.getCopyFromReg(Chain, DL, RVLocs[++i].getLocReg(), in LowerCall()
20197 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn()
20198 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn()
20224 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn()
20227 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
20233 if (CallConv == CallingConv::GHC && !RVLocs in LowerReturn()
20159 SmallVector<CCValAssign, 16> RVLocs; LowerCall() local
20194 SmallVector<CCValAssign, 16> RVLocs; CanLowerReturn() local
20221 SmallVector<CCValAssign, 16> RVLocs; LowerReturn() local
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