Lines Matching refs:RVLocs

238   SmallVector<CCValAssign, 16> RVLocs;  in CanLowerReturn()  local
239 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
264 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn_32() local
267 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn_32()
280 i != RVLocs.size(); in LowerReturn_32()
282 CCValAssign &VA = RVLocs[i]; in LowerReturn_32()
302 VA = RVLocs[++i]; // skip ahead to next loc in LowerReturn_32()
347 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn_64() local
350 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn_64()
364 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerReturn_64()
365 CCValAssign &VA = RVLocs[i]; in LowerReturn_64()
393 if (i+1 < RVLocs.size() && RVLocs[i+1].getLocReg() == VA.getLocReg()) { in LowerReturn_64()
1106 SmallVector<CCValAssign, 16> RVLocs; in LowerCall_32() local
1107 CCState RVInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCall_32()
1113 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCall_32()
1114 assert(RVLocs[i].isRegLoc() && "Can only return in registers!"); in LowerCall_32()
1115 if (RVLocs[i].getLocVT() == MVT::v2i32) { in LowerCall_32()
1118 Chain, dl, toCallerWindow(RVLocs[i++].getLocReg()), MVT::i32, InGlue); in LowerCall_32()
1124 Chain, dl, toCallerWindow(RVLocs[i].getLocReg()), MVT::i32, InGlue); in LowerCall_32()
1132 DAG.getCopyFromReg(Chain, dl, toCallerWindow(RVLocs[i].getLocReg()), in LowerCall_32()
1133 RVLocs[i].getValVT(), InGlue) in LowerCall_32()
1441 SmallVector<CCValAssign, 16> RVLocs; in LowerCall_64() local
1442 CCState RVInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCall_64()
1453 for (unsigned i = 0; i != RVLocs.size(); ++i) { in LowerCall_64()
1454 CCValAssign &VA = RVLocs[i]; in LowerCall_64()
1468 RV = DAG.getCopyFromReg(Chain, DL, Reg, RVLocs[i].getLocVT(), InGlue); in LowerCall_64()