Lines Matching refs:RVLocs
664 SmallVector<CCValAssign, 16> RVLocs; in CanLowerReturn() local
665 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
753 SmallVector<CCValAssign, 16> RVLocs; in LowerReturn() local
754 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
758 for (unsigned I = 0, OutsIndex = 0, E = RVLocs.size(); I != E; in LowerReturn()
760 CCValAssign &VA = RVLocs[I]; in LowerReturn()
834 Passv64i1ArgInRegs(dl, DAG, ValToCopy, RetVals, VA, RVLocs[++I], in LowerReturn()
839 MF.getRegInfo().disableCalleeSavedRegister(RVLocs[I].getLocReg()); in LowerReturn()
1101 SmallVector<CCValAssign, 16> RVLocs; in LowerCallResult() local
1102 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
1107 for (unsigned I = 0, InsIndex = 0, E = RVLocs.size(); I != E; in LowerCallResult()
1109 CCValAssign &VA = RVLocs[I]; in LowerCallResult()
1153 getv64i1Argument(VA, RVLocs[++I], Chain, DAG, dl, Subtarget, &InGlue); in LowerCallResult()
2820 SmallVector<CCValAssign, 16> RVLocs; in IsEligibleForTailCallOptimization() local
2821 CCState RVCCInfo(CalleeCC, false, MF, RVLocs, C); in IsEligibleForTailCallOptimization()
2823 for (const auto &VA : RVLocs) { in IsEligibleForTailCallOptimization()