| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoSFB.td | 17 def PseudoCCMOVGPR : Pseudo<(outs GPR:$dst),
36 def PseudoCCMOVGPRNoX0 : Pseudo<(outs GPRNoX0:$dst),
53 def PseudoCCADD : Pseudo<(outs GPR:$dst),
58 def PseudoCCSUB : Pseudo<(outs GPR:$dst),
63 def PseudoCCSLL : Pseudo<(outs GPR:$dst),
68 def PseudoCCSRL : Pseudo<(outs GPR:$dst),
73 def PseudoCCSRA : Pseudo<(outs GPR:$dst),
78 def PseudoCCAND : Pseudo<(outs GPR:$dst),
83 def PseudoCCOR : Pseudo<(outs GPR:$dst),
88 def PseudoCCXOR : Pseudo<(outs GPR:$dst),
[all …]
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| H A D | RISCVInstrGISel.td | 20 // Pseudo equivalent to a RISCVISD::FCLASS.
28 // Pseudo equivalent to a RISCVISD::READ_VLENB.
36 // Pseudo equivalent to a RISCVISD::VMCLR_VL
44 // Pseudo equivalent to a RISCVISD::VMSET_VL
52 // Pseudo equivalent to a RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL. There is no
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| H A D | RISCVISelDAGToDAG.h | 214 uint16_t Pseudo; member
224 uint16_t Pseudo; member
233 uint16_t Pseudo; member
243 uint16_t Pseudo; member
252 uint16_t Pseudo; member
260 uint16_t Pseudo; member
269 uint16_t Pseudo; member
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| H A D | RISCVInstrInfo.td | 856 // Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20)
867 def PseudoLI : Pseudo<(outs GPR:$rd), (ins ixlenimm_li:$imm), [],
1180 // Pseudo-instructions and codegen patterns
1320 def PseudoAddTPRel : Pseudo<(outs GPR:$rd),
1331 // Pseudo for a rematerializable LUI+ADDI sequence for loading an address.
1335 def PseudoMovAddr : Pseudo<(outs GPR:$dst), (ins uimm20_lui:$hi, simm12:$lo), []>,
1408 def _Using_CC_GPR : Pseudo<(outs valty:$dst),
1466 class LongBccPseudo : Pseudo<(outs),
1487 def PseudoBR : Pseudo<(outs), (ins simm21_lsb0_jal:$imm20), [(br bb:$imm20)]>,
1492 def PseudoBRIND : Pseudo<(outs), (ins GPRJALR:$rs1, simm12:$imm12), []>,
[all …]
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| H A D | RISCVInstrInfoA.td | 118 // Pseudo-instructions and codegen patterns
190 /// Pseudo AMOs
192 class PseudoAMO : Pseudo<(outs GPR:$res, GPR:$scratch),
201 : Pseudo<(outs GPR:$res, GPR:$scratch),
210 : Pseudo<(outs GPR:$res, GPR:$scratch1, GPR:$scratch2),
221 : Pseudo<(outs GPR:$res, GPR:$scratch1, GPR:$scratch2),
230 class PseudoMaskedAMOPat<Intrinsic intrin, Pseudo AMOInst>
234 class PseudoMaskedAMOMinMaxPat<Intrinsic intrin, Pseudo AMOInst>
330 : Pseudo<(outs GPR:$res, GPR:$scratch),
341 multiclass PseudoCmpXchgPat<string Op, Pseudo CmpXchgInst,
[all …]
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| H A D | RISCVInstrInfoVPseudos.td | 108 defvar AffixSubsts = [["Pseudo", ""],
524 Pseudo Pseudo = !cast<Pseudo>(NAME); // Used as a key.
526 // SEW = 0 is used to denote that the Pseudo is not SEW specific (or unknown).
536 let Fields = [ "Pseudo", "BaseInstr" ];
537 let PrimaryKey = [ "Pseudo" ];
545 let Fields = [ "Pseudo", "BaseInstr", "VLMul", "SEW"];
565 Pseudo MaskedPseudo = !cast<Pseudo>(NAM
[all...] |
| H A D | RISCVInstrFormats.td | 240 // Pseudo instructions
241 class Pseudo<dag outs, dag ins, list<dag> pattern, string opcodestr = "", string argstr = "">
248 : Pseudo<(outs GPR:$rd), (ins Ty:$rs1, Ty:$rs2), []> {
254 // Pseudo load instructions.
256 : Pseudo<(outs GPR:$rd), (ins bare_symbol:$addr), [], opcodestr, "$rd, $addr"> {
265 … : Pseudo<(outs GPR:$tmp, rdty:$rd), (ins bare_symbol:$addr), [], opcodestr, "$rd, $addr, $tmp"> {
273 // Pseudo store instructions.
275 … : Pseudo<(outs GPR:$tmp), (ins rsty:$rs, bare_symbol:$addr), [], opcodestr, "$rs, $addr, $tmp"> {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.td | 76 // Pseudo shift nodes for non-constant shift amounts.
346 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i16imm:$amt, i16imm:$amt2),
356 : Pseudo<(outs), (ins i16imm:$amt1, i16imm:$amt2),
371 // Pseudo instruction to add four 8-bit registers as two 16-bit values.
376 def ADDWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$src, DREGS:$rr),
389 // Pseudo instruction to add four 8-bit registers as two 16-bit values with
396 def ADCWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$src, DREGS:$rr),
426 def SUBWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$rs, DREGS:$rr),
440 def SUBIWRdK : Pseudo<(outs DLDREGS:$rd), (ins DLDREGS:$rs, i16imm:$rr),
462 def SBCWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$rs, DREGS:$rr),
[all …]
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| H A D | AVRInstrFormats.td | 43 // Pseudo instructions are not real AVR instructions. The DAG stores
50 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
555 : Pseudo<outs, ins, asmstr, pattern> {
560 : Pseudo<outs, ins, asmstr, pattern> {
565 : Pseudo<outs, ins, asmstr, pattern> {
572 : Pseudo<outs, ins, asmstr, pattern> {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrCompiler.td | 24 // Random Pseudo Instructions.
31 def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins i32imm:$label),
40 def ADJCALLSTACKDOWN32 : I<0, Pseudo, (outs),
43 def ADJCALLSTACKUP32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
58 def ADJCALLSTACKDOWN64 : I<0, Pseudo, (outs),
61 def ADJCALLSTACKUP64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
73 def VASTART_SAVE_XMM_REGS : I<0, Pseudo,
85 def VAARG_64 : I<0, Pseudo,
92 def VAARG_X32 : I<0, Pseudo,
107 def SEG_ALLOCA_32 : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$size),
[all …]
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| H A D | X86InstrTSX.td | 23 def XBEGIN : I<0, Pseudo, (outs GR32:$dst), (ins),
34 // Pseudo instruction to fake the definition of EAX on the fallback code path.
36 def XABORT_DEF : I<0, Pseudo, (outs), (ins), "# XABORT DEF", []>;
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| H A D | X86RegisterBanks.td | 18 /// Pseudo Registers: RFP80
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.td | 1060 // Pseudo-instructions and codegen patterns
1305 def PseudoUNIMP : Pseudo<(outs), (ins), [(trap)]>,
1468 def PseudoBR : Pseudo<(outs), (ins simm26_b:$imm26), [(br bb:$imm26)]>,
1472 def PseudoBRIND : Pseudo<(outs), (ins GPR:$rj, simm16_lsl2:$imm16)>,
1481 def PseudoCALL : Pseudo<(outs), (ins bare_symbol:$func)>;
1488 def PseudoCALL_MEDIUM : Pseudo<(outs), (ins bare_symbol:$func)>;
1499 def PseudoCALL_LARGE: Pseudo<(outs), (ins bare_symbol:$func)>;
1509 def PseudoCALLIndirect : Pseudo<(outs), (ins GPR:$rj),
1518 def PseudoJIRL_CALL : Pseudo<(outs), (ins GPR:$rj, simm16_lsl2:$imm16)>,
1523 def PseudoRET : Pseudo<(outs), (ins), [(loongarch_ret)]>,
[all …]
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| H A D | LoongArchFloat32InstrInfo.td | 124 // Pseudo instructions for spill/reload CFRs.
126 def PseudoST_CFR : Pseudo<(outs),
129 def PseudoLD_CFR : Pseudo<(outs CFR:$ccd),
140 // Pseudo instruction for copying CFRs.
141 def PseudoCopyCFR : Pseudo<(outs CFR:$dst), (ins CFR:$src)> {
151 // Pseudo-instructions and codegen patterns
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrFormats.td | 28 // Pseudo instructions
29 class Pseudo<dag outs, dag ins> : Op<0, outs, ins, ""> {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPseudo.td | 25 def A2_iconst : Pseudo<(outs IntRegs:$Rd32),
82 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
86 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
205 def PS_call_instrprof_custom : Pseudo<(outs), (ins s32_0Imm:$dst, u32_0Imm:$Ii), "">;
225 : Pseudo<(outs), iops, "">, PredRel {
268 def PS_tailcall_i : Pseudo<(outs), (ins a30_2Imm:$dst), "", []>;
271 def PS_aligna : Pseudo<(outs IntRegs:$Rd), (ins u32_0Imm:$A), "", []>;
282 def PS_fi : Pseudo<(outs IntRegs:$Rd),
285 def PS_fia : Pseudo<(outs IntRegs:$Rd),
335 def PS_alloca: Pseudo <(outs IntRegs:$Rd),
[all …]
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| /freebsd/sys/powerpc/conf/dpaa/ |
| H A D | DPAA | 29 options PSEUDOFS #Pseudo-filesystem framework
94 # Pseudo devices
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrFormats.td | 122 // Pseudo instructions
123 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
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| /freebsd/contrib/netbsd-tests/usr.bin/config/ |
| H A D | d_pseudo_parent | 5 # Pseudo-devices can have children on interface attributes,
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| /freebsd/sys/powerpc/conf/ |
| H A D | DEFAULTS | 5 # Pseudo devices.
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| /freebsd/sys/arm64/conf/ |
| H A D | DEFAULTS | 7 # Pseudo devices.
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| /freebsd/sys/riscv/conf/ |
| H A D | DEFAULTS | 7 # Pseudo devices.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCTargetDesc.h | 43 uint16_t Pseudo; member
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| /freebsd/sys/amd64/conf/ |
| H A D | DEFAULTS | 12 # Pseudo devices.
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| /freebsd/sys/i386/conf/ |
| H A D | DEFAULTS | 13 # Pseudo devices.
|