Lines Matching refs:Pseudo
76 // Pseudo shift nodes for non-constant shift amounts.
346 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i16imm:$amt, i16imm:$amt2),
356 : Pseudo<(outs), (ins i16imm:$amt1, i16imm:$amt2),
371 // Pseudo instruction to add four 8-bit registers as two 16-bit values.
376 def ADDWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$src, DREGS:$rr),
389 // Pseudo instruction to add four 8-bit registers as two 16-bit values with
396 def ADCWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$src, DREGS:$rr),
426 def SUBWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$rs, DREGS:$rr),
440 def SUBIWRdK : Pseudo<(outs DLDREGS:$rd), (ins DLDREGS:$rs, i16imm:$rr),
462 def SBCWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$rs, DREGS:$rr),
474 def SBCIWRdK : Pseudo<(outs DLDREGS:$rd), (ins DLDREGS:$rs, i16imm:$rr),
548 def ANDWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$src, DREGS:$rr),
562 def ORWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$src, DREGS:$rr),
576 def EORWRdRr : Pseudo<(outs DREGS:$rd), (ins DREGS:$src, DREGS:$rr),
591 def ANDIWRdK : Pseudo<(outs DLDREGS:$rd), (ins DLDREGS:$src, i16imm:$k),
605 def ORIWRdK : Pseudo<(outs DLDREGS:$rd), (ins DLDREGS:$src, i16imm:$rr),
623 def COMWRd : Pseudo<(outs DREGS:$rd), (ins DREGS:$src), "comw\t$rd",
636 def NEGWRd : Pseudo<(outs DREGS:$rd), (ins DREGS:$src, GPR8:$zero),
732 def CPWRdRr : Pseudo<(outs), (ins DREGS:$src, DREGS:$src2),
747 def CPCWRdRr : Pseudo<(outs), (ins DREGS:$src, DREGS:$src2),
885 def LDIWRdK : Pseudo<(outs DLDREGS:$dst), (ins i16imm:$src),
905 def LDSWRdK : Pseudo<(outs DREGS:$dst), (ins i16imm:$src), "ldsw\t$dst, $src",
927 : Pseudo<(outs DREGS:$reg), (ins PTRDISPREGS:$ptrreg),
948 def LDWRdPtrPi : Pseudo<(outs DREGS:$reg, PTRREGS:$base_wb),
961 def LDWRdPtrPd : Pseudo<(outs DREGS:$reg, PTRREGS:$base_wb),
984 def LDDWRdPtrQ : Pseudo<(outs DREGS:$dst), (ins memri:$memri),
1006 def LDDWRdYQ : Pseudo<(outs DREGS:$dst), (ins memri:$memri),
1012 : Pseudo<(outs DRC:$rd), (ins PTRRC:$rr), "atomic_op",
1016 : Pseudo<(outs), (ins PTRRC:$rd, DRC:$rr), "atomic_op",
1020 : Pseudo<(outs DRC:$rd), (ins PTRRC:$rr, DRC:$operand), "atomic_op",
1055 : Pseudo<(outs), (ins), "atomic_fence", [(atomic_fence timm, timm)]>;
1072 def STSWKRr : Pseudo<(outs), (ins i16imm:$dst, DREGS:$src),
1093 def STWPtrRr : Pseudo<(outs), (ins PTRDISPREGS:$ptrreg, DREGS:$reg),
1117 def STWPtrPiRr : Pseudo<(outs PTRREGS:$base_wb),
1142 def STWPtrPdRr : Pseudo<(outs PTRREGS:$base_wb),
1170 def STDWPtrQRr : Pseudo<(outs), (ins memri:$memri, DREGS:$src),
1184 def LPMBRdZ : Pseudo<(outs GPR8:$dst), (ins ZREG:$z), "lpmb\t$dst, $z", []>,
1188 def LPMWRdZ : Pseudo<(outs DREGS:$dst), (ins ZREG:$z), "lpmw\t$dst, $z", []>,
1210 def LPMWRdZPi : Pseudo<(outs DREGS
1238 def ELPMBRdZ : Pseudo<(outs GPR8:$dst), (ins ZREG:$z, LD8:$p),
1243 def ELPMWRdZ : Pseudo<(outs DREGS:$dst), (ins ZREG:$z, LD8:$p),
1250 def ELPMBRdZPi : Pseudo<(outs GPR8:$dst), (ins ZREG:$z, LD8:$p),
1254 def ELPMWRdZPi : Pseudo<(outs DREGS:$dst), (ins ZREG:$z, LD8:$p),
1283 def INWRdA : Pseudo<(outs DREGS
1301 def OUTWARr : Pseudo<(outs),
1319 def PUSHWRr : Pseudo<(outs),
1334 def POPWRd : Pseudo<(outs DREGS
1382 def LSLWRd : Pseudo<(outs DREGS
1392 def LSLWHiRd : Pseudo<(outs DREGS:$rd), (ins DREGS:$src), "lslwhi\t$rd",
1395 def LSLWNRd : Pseudo<(outs DLDREGS
1408 def LSLBNRd : Pseudo<(outs LD8
1432 def LSRWRd : Pseudo<(outs DREGS
1442 def LSRWLoRd : Pseudo<(outs DREGS:$rd), (ins DREGS:$src), "lsrwlo\t$rd",
1445 def LSRWNRd : Pseudo<(outs DLDREGS
1458 def LSRBNRd : Pseudo<(outs LD8
1482 def ASRWNRd : Pseudo<(outs DREGS
1495 def ASRBNRd : Pseudo<(outs LD8
1508 def ASRWRd : Pseudo<(outs DREGS
1518 def ASRWLoRd : Pseudo<(outs DREGS:$rd), (ins DREGS:$src), "asrwlo\t$rd",
1521 def ROLBRdR1 : Pseudo<(outs GPR8:$rd),
1529 def ROLBRdR17 : Pseudo<(outs GPR8:$rd),
1536 def RORBRd : Pseudo<(outs GPR8
1550 : Pseudo<(outs DREGS
1568 : Pseudo<(outs DREGS
1729 // Pseudo instructions for later expansion
1759 hasSideEffects = 0 in def FRMIDX : Pseudo<(outs DLDREGS
1788 let Uses = [SP] in def SPREAD : Pseudo<(outs DREGS
1794 let Defs = [SP] in def SPWRITE : Pseudo<(outs GPRSP
1942 def CopyZero : Pseudo<(outs GPR8:$rd), (ins), "clrz\t$rd", [(set i8:$rd, 0)]>;