Searched refs:ItinList (Results 1 – 16 of 16) sorted by relevance
12 list<InstrItinData> ItinList =23 HexagonV79ItinList.ItinList>;
12 list<InstrItinData> ItinList =23 HexagonV75ItinList.ItinList>;
14 list<InstrItinData> ItinList =24 [Hex_FWD, HVX_FWD], HexagonV62ItinList.ItinList>;
16 list<InstrItinData> ItinList =27 HexagonV69ItinList.ItinList>;
15 list<InstrItinData> ItinList =26 HexagonV71ItinList.ItinList>;
15 list<InstrItinData> ItinList =26 HexagonV73ItinList.ItinList>;
27 list<InstrItinData> ItinList =33 [Hex_FWD], HexagonV5ItinList.ItinList>;
28 list<InstrItinData> ItinList =35 [Hex_FWD], HexagonV55ItinList.ItinList>;
16 list<InstrItinData> ItinList =27 HexagonV65ItinList.ItinList>;
16 list<InstrItinData> ItinList =27 HexagonV66ItinList.ItinList>;
16 list<InstrItinData> ItinList =27 HexagonV67ItinList.ItinList>;
15 list<InstrItinData> ItinList =26 HexagonV68ItinList.ItinList>;
37 list<InstrItinData> ItinList =49 HexagonV67TItinList.ItinList>;
37 list<InstrItinData> ItinList =48 HexagonV71TItinList.ItinList>;
58 list<InstrItinData> ItinList =68 [Hex_FWD, HVX_FWD], HexagonV60ItinList.ItinList>;
485 std::vector<InstrItinerary> &ItinList = ProcItinLists.emplace_back(); in emitStageAndOperandCycleData() local494 ItinList.resize(SchedModels.numInstrSchedClasses()); in emitStageAndOperandCycleData()495 assert(ProcModel.ItinDefList.size() == ItinList.size() && "bad Itins"); in emitStageAndOperandCycleData()497 for (unsigned SchedClassIdx = 0, SchedClassEnd = ItinList.size(); in emitStageAndOperandCycleData()572 ItinList[SchedClassIdx] = Intinerary; in emitStageAndOperandCycleData()604 for (const auto &[Proc, ItinList] : in emitItineraries()612 if (ItinList.empty()) in emitItineraries()621 SchedModels.schedClasses().take_front(ItinList.size()); in emitItineraries()625 enumerate(ItinList, ItinSchedClasses)) { in emitItineraries()