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Searched refs:DL (Results 1 – 25 of 932) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZSelectionDAGInfo.cpp34 static SDValue createMemMemNode(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, in createMemMemNode() argument
44 return DAG.getNode(Op, DL, VTs, Ops); in createMemMemNode()
51 static SDValue emitMemMemImm(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, in emitMemMemImm() argument
56 SDValue LenAdj = DAG.getConstant(Size - Adj, DL, Dst.getValueType()); in emitMemMemImm()
57 return createMemMemNode(DAG, DL, Op, Chain, Dst, Src, LenAdj, Byte); in emitMemMemImm()
60 static SDValue emitMemMemReg(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, in emitMemMemReg() argument
64 SDValue LenAdj = DAG.getNode(ISD::ADD, DL, MVT::i64, in emitMemMemReg()
65 DAG.getZExtOrTrunc(Size, DL, MVT::i64), in emitMemMemReg()
66 DAG.getSignedConstant(0 - Adj, DL, MVT::i64)); in emitMemMemReg()
67 return createMemMemNode(DAG, DL, Op, Chain, Dst, Src, LenAdj, Byte); in emitMemMemReg()
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H A DSystemZISelLowering.cpp837 EVT SystemZTargetLowering::getSetCCResultType(const DataLayout &DL, in getSetCCResultType() argument
996 DebugLoc DL = MI.getDebugLoc(); in emitEHSjLjSetJmp() local
1079 BuildMI(*ThisMBB, MI, DL, TII->get(SystemZ::LARL), LabelReg) in emitEHSjLjSetJmp()
1082 BuildMI(*ThisMBB, MI, DL, TII->get(SystemZ::STG)) in emitEHSjLjSetJmp()
1091 BuildMI(*ThisMBB, MI, DL, TII->get(SystemZ::STG)) in emitEHSjLjSetJmp()
1099 BuildMI(*ThisMBB, MI, DL, TII->get(SystemZ::STG)) in emitEHSjLjSetJmp()
1110 MIB = BuildMI(*ThisMBB, MI, DL, TII->get(SystemZ::LG), BCReg) in emitEHSjLjSetJmp()
1115 BuildMI(*ThisMBB, MI, DL, TII->get(SystemZ::STG)) in emitEHSjLjSetJmp()
1123 MIB = BuildMI(*ThisMBB, MI, DL, TII->get(SystemZ::EH_SjLj_Setup)) in emitEHSjLjSetJmp()
1133 BuildMI(MainMBB, DL, TII->get(SystemZ::LHI), MainDstReg).addImm(0); in emitEHSjLjSetJmp()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DVNCoercion.cpp23 const DataLayout &DL = F->getDataLayout(); in canCoerceMustAliasedValueToLoad() local
24 TypeSize MinStoreSize = DL.getTypeSizeInBits(StoredTy); in canCoerceMustAliasedValueToLoad()
25 TypeSize LoadSize = DL.getTypeSizeInBits(LoadTy); in canCoerceMustAliasedValueToLoad()
56 bool StoredNI = DL.isNonIntegralPointerType(StoredTy->getScalarType()); in canCoerceMustAliasedValueToLoad()
57 bool LoadNI = DL.isNonIntegralPointerType(LoadTy->getScalarType()); in canCoerceMustAliasedValueToLoad()
94 const DataLayout &DL = F->getDataLayout(); in coerceAvailableValueToLoadType() local
96 StoredVal = ConstantFoldConstant(C, DL); in coerceAvailableValueToLoadType()
109 TypeSize StoredValSize = DL.getTypeSizeInBits(StoredValTy); in coerceAvailableValueToLoadType()
110 TypeSize LoadedValSize = DL.getTypeSizeInBits(LoadedTy); in coerceAvailableValueToLoadType()
120 StoredValTy = DL.getIntPtrType(StoredValTy); in coerceAvailableValueToLoadType()
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H A DEvaluator.cpp46 const DataLayout &DL);
59 const DataLayout &DL) { in isSimpleEnoughValueToCommitHelper() argument
72 if (!isSimpleEnoughValueToCommit(cast<Constant>(Op), SimpleConstants, DL)) in isSimpleEnoughValueToCommitHelper()
86 return isSimpleEnoughValueToCommit(CE->getOperand(0), SimpleConstants, DL); in isSimpleEnoughValueToCommitHelper()
92 if (DL.getTypeSizeInBits(CE->getType()) != in isSimpleEnoughValueToCommitHelper()
93 DL.getTypeSizeInBits(CE->getOperand(0)->getType())) in isSimpleEnoughValueToCommitHelper()
95 return isSimpleEnoughValueToCommit(CE->getOperand(0), SimpleConstants, DL); in isSimpleEnoughValueToCommitHelper()
102 return isSimpleEnoughValueToCommit(CE->getOperand(0), SimpleConstants, DL); in isSimpleEnoughValueToCommitHelper()
108 return isSimpleEnoughValueToCommit(CE->getOperand(0), SimpleConstants, DL); in isSimpleEnoughValueToCommitHelper()
116 const DataLayout &DL) { in isSimpleEnoughValueToCommit() argument
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DLoads.cpp30 const DataLayout &DL) { in isAligned() argument
31 return Base->getPointerAlignment(DL) >= Alignment; in isAligned()
37 const DataLayout &DL, const Instruction *CtxI, AssumptionCache *AC, in isDereferenceableAndAlignedPointerViaAssumption() argument
50 bool IsAligned = Ptr->getPointerAlignment(DL) >= Alignment; in isDereferenceableAndAlignedPointerViaAssumption()
71 const Value *V, Align Alignment, const APInt &Size, const DataLayout &DL, in isDereferenceableAndAlignedPointer() argument
92 APInt Offset(DL.getIndexTypeSizeInBits(GEP->getType()), 0); in isDereferenceableAndAlignedPointer()
93 if (!GEP->accumulateConstantOffset(DL, Offset) || Offset.isNegative() || in isDereferenceableAndAlignedPointer()
107 Base, Alignment, Offset + Size.sextOrTrunc(Offset.getBitWidth()), DL, in isDereferenceableAndAlignedPointer()
115 BC->getOperand(0), Alignment, Size, DL, CtxI, AC, DT, TLI, in isDereferenceableAndAlignedPointer()
122 Size, DL, CtxI, AC, DT, TLI, in isDereferenceableAndAlignedPointer()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp369 const SDLoc &DL, SelectionDAG &DAG) const { in LowerReturn() argument
395 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
398 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
401 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
412 DAG.getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, MVT::i64), 0); in LowerReturn()
413 SDValue Sub_f32 = DAG.getTargetConstant(VE::sub_f32, DL, MVT::i32); in LowerReturn()
414 OutVal = SDValue(DAG.getMachineNode(TargetOpcode::INSERT_SUBREG, DL, in LowerReturn()
423 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Glue); in LowerReturn()
436 return DAG.getNode(VEISD::RET_GLUE, DL, MVT::Other, RetOps); in LowerReturn()
441 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp434 SDLoc DL(Op); in LowerOperation() local
440 DAG.getConstant(0, DL, MVT::i32), // SWZ_X in LowerOperation()
441 DAG.getConstant(1, DL, MVT::i32), // SWZ_Y in LowerOperation()
442 DAG.getConstant(2, DL, MVT::i32), // SWZ_Z in LowerOperation()
443 DAG.getConstant(3, DL, MVT::i32) // SWZ_W in LowerOperation()
445 return DAG.getNode(AMDGPUISD::R600_EXPORT, DL, Op.getValueType(), Args); in LowerOperation()
457 SDLoc DL(Op); in LowerOperation() local
474 DAG.getConstant(TextureOp, DL, MVT::i32), in LowerOperation()
476 DAG.getConstant(0, DL, MVT::i32), in LowerOperation()
477 DAG.getConstant(1, DL, MVT::i32), in LowerOperation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchExpandAtomicPseudoInsts.cpp163 MachineInstr &MI, DebugLoc DL, in doAtomicBinOpExpansion() argument
178 BuildMI(LoopMBB, DL, in doAtomicBinOpExpansion()
186 BuildMI(LoopMBB, DL, TII->get(LoongArch::OR), ScratchReg) in doAtomicBinOpExpansion()
191 BuildMI(LoopMBB, DL, TII->get(LoongArch::AND), ScratchReg) in doAtomicBinOpExpansion()
194 BuildMI(LoopMBB, DL, TII->get(LoongArch::NOR), ScratchReg) in doAtomicBinOpExpansion()
199 BuildMI(LoopMBB, DL, TII->get(LoongArch::ADD_W), ScratchReg) in doAtomicBinOpExpansion()
204 BuildMI(LoopMBB, DL, TII->get(LoongArch::SUB_W), ScratchReg) in doAtomicBinOpExpansion()
209 BuildMI(LoopMBB, DL, TII->get(LoongArch::AND), ScratchReg) in doAtomicBinOpExpansion()
214 BuildMI(LoopMBB, DL, TII->get(LoongArch::OR), ScratchReg) in doAtomicBinOpExpansion()
219 BuildMI(LoopMBB, DL, TII->get(LoongArch::XOR), ScratchReg) in doAtomicBinOpExpansion()
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H A DLoongArchISelLowering.cpp572 SDLoc DL(N); in combineSelectToBinOp() local
576 SDValue Neg = DAG.getNegative(CondV, DL, VT); in combineSelectToBinOp()
577 return DAG.getNode(ISD::OR, DL, VT, Neg, DAG.getFreeze(FalseV)); in combineSelectToBinOp()
582 DAG.getNode(ISD::ADD, DL, VT, CondV, DAG.getAllOnesConstant(DL, VT)); in combineSelectToBinOp()
583 return DAG.getNode(ISD::OR, DL, VT, Neg, DAG.getFreeze(TrueV)); in combineSelectToBinOp()
589 DAG.getNode(ISD::ADD, DL, VT, CondV, DAG.getAllOnesConstant(DL, VT)); in combineSelectToBinOp()
590 return DAG.getNode(ISD::AND, DL, VT, Neg, DAG.getFreeze(FalseV)); in combineSelectToBinOp()
594 SDValue Neg = DAG.getNegative(CondV, DL, VT); in combineSelectToBinOp()
595 return DAG.getNode(ISD::AND, DL, VT, Neg, DAG.getFreeze(TrueV)); in combineSelectToBinOp()
603 SDValue Neg = DAG.getNegative(CondV, DL, VT); in combineSelectToBinOp()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp58 SDLoc DL(N); in PreprocessISelDAG() local
62 Src = CurDAG->getNode(ISD::ANY_EXTEND, DL, Subtarget->getXLenVT(), in PreprocessISelDAG()
64 Result = CurDAG->getNode(Opc, DL, VT, CurDAG->getUNDEF(VT), Src, VL); in PreprocessISelDAG()
81 SDLoc DL(N); in PreprocessISelDAG() local
90 Lo = CurDAG->getStore(Chain, DL, Lo, StackSlot, MPI, Align(8)); in PreprocessISelDAG()
93 CurDAG->getMemBasePlusOffset(StackSlot, TypeSize::getFixed(4), DL); in PreprocessISelDAG()
94 Hi = CurDAG->getStore(Chain, DL, Hi, OffsetSlot, MPI.getWithOffset(4), in PreprocessISelDAG()
97 Chain = CurDAG->getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi); in PreprocessISelDAG()
101 CurDAG->getTargetConstant(Intrinsic::riscv_vlse, DL, MVT::i64); in PreprocessISelDAG()
109 Result = CurDAG->getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, VTs, Ops, in PreprocessISelDAG()
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H A DRISCVISelLowering.cpp1688 EVT RISCVTargetLowering::getSetCCResultType(const DataLayout &DL, in getSetCCResultType() argument
1692 return getPointerTy(DL); in getSetCCResultType()
1739 auto &DL = I.getDataLayout(); in getTgtMemIntrinsic() local
1764 Info.memVT = getValueType(DL, MemTy); in getTgtMemIntrinsic()
1772 Info.align = DL.getABITypeAlign(MemTy); in getTgtMemIntrinsic()
1774 Info.align = Align(DL.getTypeStoreSize(MemTy->getScalarType())); in getTgtMemIntrinsic()
2017 bool RISCVTargetLowering::isLegalAddressingMode(const DataLayout &DL, in isLegalAddressingMode() argument
2433 static void translateSetCCForBranch(const SDLoc &DL, SDValue &LHS, SDValue &RHS, in translateSetCCForBranch() argument
2455 LHS = DAG.getNode(ISD::SHL, DL, LHS.getValueType(), LHS, in translateSetCCForBranch()
2456 DAG.getConstant(ShAmt, DL, LHS.getValueType())); in translateSetCCForBranch()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp352 SDLoc DL(Disc); in extractPtrauthBlendDiscriminators() local
372 return std::make_tuple(DAG->getTargetConstant(0, DL, MVT::i64), Disc); in extractPtrauthBlendDiscriminators()
380 DAG->getTargetConstant(ConstDiscN->getZExtValue(), DL, MVT::i64), in extractPtrauthBlendDiscriminators()
2479 SDLoc DL(Op); in optimizeLogicalImm() local
2485 New = TLO.DAG.getNode(Op.getOpcode(), DL, VT, Op.getOperand(0), in optimizeLogicalImm()
2486 TLO.DAG.getConstant(NewImm, DL, VT)); in optimizeLogicalImm()
2491 SDValue EncConst = TLO.DAG.getTargetConstant(Enc, DL, VT); in optimizeLogicalImm()
2493 TLO.DAG.getMachineNode(NewOpc, DL, VT, Op.getOperand(0), EncConst), 0); in optimizeLogicalImm()
2701 MVT AArch64TargetLowering::getScalarShiftAmountTy(const DataLayout &DL, in getScalarShiftAmountTy() argument
2793 DebugLoc DL = MI.getDebugLoc(); in EmitF128CSEL() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp596 SDLoc DL(N); in performDivRemCombine() local
598 SDValue DivRem = DAG.getNode(Opc, DL, MVT::Glue, in performDivRemCombine()
605 SDValue CopyFromLo = DAG.getCopyFromReg(InChain, DL, LO, Ty, in performDivRemCombine()
614 SDValue CopyFromHi = DAG.getCopyFromReg(InChain, DL, in performDivRemCombine()
673 SDLoc DL(Op); in createFPCmp() local
679 return DAG.getNode(MipsISD::FPCmp, DL, MVT::Glue, LHS, RHS, in createFPCmp()
680 DAG.getConstant(condCodeToFCC(CC), DL, MVT::i32)); in createFPCmp()
685 SDValue False, const SDLoc &DL) { in createCMovFP() argument
690 return DAG.getNode((invert ? MipsISD::CMovFP_F : MipsISD::CMovFP_T), DL, in createCMovFP()
724 const SDLoc DL(N); in performSELECTCombine() local
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H A DMipsSEISelDAGToDAG.cpp202 void MipsSEDAGToDAGISel::selectAddE(SDNode *Node, const SDLoc &DL) const { in selectAddE()
230 SDValue CstOne = CurDAG->getTargetConstant(1, DL, MVT::i32); in selectAddE()
232 SDValue OuFlag = CurDAG->getTargetConstant(20, DL, MVT::i32); in selectAddE()
234 SDNode *DSPCtrlField = CurDAG->getMachineNode(Mips::RDDSP, DL, MVT::i32, in selectAddE()
238 Mips::EXT, DL, MVT::i32, SDValue(DSPCtrlField, 0), OuFlag, CstOne); in selectAddE()
241 CurDAG->getTargetConstant(6, DL, MVT::i32), CstOne, in selectAddE()
243 SDNode *DSPCFWithCarry = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, Ops); in selectAddE()
254 CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, InsOps); in selectAddE()
256 SDNode *WrDSP = CurDAG->getMachineNode(Mips::WRDSP, DL, MVT::Glue, in selectAddE()
693 SDLoc DL(Node); in trySelect() local
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H A DMipsSEISelLowering.cpp450 SDLoc DL(Op); in lowerSELECT() local
455 SDValue Tmp = DAG.getNode(MipsISD::MTC1_D64, DL, MVT::f64, Op->getOperand(0)); in lowerSELECT()
456 return DAG.getNode(MipsISD::FSELECT, DL, ResTy, Tmp, Op->getOperand(1), in lowerSELECT()
831 static SDValue genConstMult(SDValue X, APInt C, const SDLoc &DL, EVT VT, in genConstMult() argument
835 return DAG.getConstant(0, DL, VT); in genConstMult()
843 return DAG.getNode(ISD::SHL, DL, VT, X, in genConstMult()
844 DAG.getConstant(C.logBase2(), DL, ShiftTy)); in genConstMult()
855 SDValue Op0 = genConstMult(X, Floor, DL, VT, ShiftTy, DAG); in genConstMult()
856 SDValue Op1 = genConstMult(X, C - Floor, DL, VT, ShiftTy, DAG); in genConstMult()
857 return DAG.getNode(ISD::ADD, DL, VT, Op0, Op1); in genConstMult()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp321 SDLoc DL(Op); in LowerAsmOperandForConstraint() local
429 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
468 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); in LowerFormalArguments()
480 ArgValue = DAG.getNode(Opcode, DL, RegVT, ArgValue, in LowerFormalArguments()
484 DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
507 ValVT, DL, Chain, FIN, in LowerFormalArguments()
553 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegTy); in LowerFormalArguments()
556 SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, in LowerFormalArguments()
567 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, OutChains); in LowerFormalArguments()
577 SDLoc &DL = CLI.DL; in LowerCall() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp395 MVT WebAssemblyTargetLowering::getPointerTy(const DataLayout &DL, in getPointerTy() argument
401 return TargetLowering::getPointerTy(DL, AS); in getPointerTy()
404 MVT WebAssemblyTargetLowering::getPointerMemTy(const DataLayout &DL, in getPointerMemTy() argument
410 return TargetLowering::getPointerMemTy(DL, AS); in getPointerMemTy()
507 static MachineBasicBlock *LowerFPToInt(MachineInstr &MI, DebugLoc DL, in LowerFPToInt() argument
564 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
566 BuildMI(BB, DL, TII.get(FConst), Tmp1) in LowerFPToInt()
568 BuildMI(BB, DL, TII.get(LT), CmpReg).addReg(Tmp0).addReg(Tmp1); in LowerFPToInt()
576 BuildMI(BB, DL, TII.get(FConst), Tmp1) in LowerFPToInt()
578 BuildMI(BB, DL, TII.get(GE), SecondCmpReg).addReg(Tmp0).addReg(Tmp1); in LowerFPToInt()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopVectorizationPlanner.h66 ArrayRef<VPValue *> Operands, DebugLoc DL,
68 return tryInsertInstruction(new VPInstruction(Opcode, Operands, DL, Name));
154 DebugLoc DL = DebugLoc::getUnknown();
156 DL = Inst->getDebugLoc();
157 VPInstruction *NewVPInst = createInstruction(Opcode, Operands, DL, Name);
162 DebugLoc DL, const Twine &Name = "") {
163 return createInstruction(Opcode, Operands, DL, Name);
167 DebugLoc DL = DebugLoc::getUnknown(),
170 new VPInstruction(Opcode, Operands, Flags, DL, Name));
176 DebugLoc DL = DebugLoc::getUnknown(),
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp217 EVT M68kTargetLowering::getSetCCResultType(const DataLayout &DL, in getSetCCResultType() argument
223 MVT M68kTargetLowering::getScalarShiftAmountTy(const DataLayout &DL, in getScalarShiftAmountTy() argument
228 return MVT::getIntegerVT(DL.getPointerSizeInBits(0)); in getScalarShiftAmountTy()
267 SelectionDAG &DAG, const SDLoc &DL) { in CreateCopyOfByValArgument() argument
268 SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), DL, MVT::i32); in CreateCopyOfByValArgument()
271 Chain, DL, Dst, Src, SizeNode, Flags.getNonZeroByValAlign(), in CreateCopyOfByValArgument()
404 const SDLoc &DL) const { in EmitTailCallLoadRetAddr()
409 OutRetAddr = DAG.getLoad(VT, DL, Chain, OutRetAddr, MachinePointerInfo()); in EmitTailCallLoadRetAddr()
415 EVT PtrVT, unsigned SlotSize, int FPDiff, const SDLoc &DL) const { in EmitTailCallStoreRetAddr()
426 Chain, DL, RetFI, NewFI, in EmitTailCallStoreRetAddr()
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelDAGToDAG.cpp78 bool fillGenericConstant(const DataLayout &DL, const Constant *CV,
80 bool fillConstantDataArray(const DataLayout &DL, const ConstantDataArray *CDA,
82 bool fillConstantArray(const DataLayout &DL, const ConstantArray *CA,
84 bool fillConstantStruct(const DataLayout &DL, const ConstantStruct *CS,
107 SDLoc DL(Addr); in INITIALIZE_PASS() local
110 Offset = CurDAG->getTargetConstant(0, DL, MVT::i64); in INITIALIZE_PASS()
128 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64); in INITIALIZE_PASS()
134 Offset = CurDAG->getTargetConstant(0, DL, MVT::i64); in INITIALIZE_PASS()
141 SDLoc DL(Addr); in SelectFIAddr() local
155 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64); in SelectFIAddr()
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/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DMangler.cpp37 const DataLayout &DL, char Prefix) { in getNameWithPrefixImpl() argument
49 if (DL.doNotMangleLeadingQuestionMark() && Name[0] == '?') in getNameWithPrefixImpl()
53 OS << DL.getPrivateGlobalPrefix(); in getNameWithPrefixImpl()
55 OS << DL.getLinkerPrivateGlobalPrefix(); in getNameWithPrefixImpl()
65 const DataLayout &DL, in getNameWithPrefixImpl() argument
67 char Prefix = DL.getGlobalPrefix(); in getNameWithPrefixImpl()
68 return getNameWithPrefixImpl(OS, GVName, PrefixTy, DL, Prefix); in getNameWithPrefixImpl()
72 const DataLayout &DL) { in getNameWithPrefix() argument
73 return getNameWithPrefixImpl(OS, GVName, DL, Default); in getNameWithPrefix()
77 const Twine &GVName, const DataLayout &DL) { in getNameWithPrefix() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430FrameLowering.cpp45 const DebugLoc &DL, in BuildCFI() argument
50 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION)) in BuildCFI()
57 const DebugLoc &DL, bool IsPrologue) const { in emitCalleeSavedFrameMoves() argument
72 BuildCFI(MBB, MBBI, DL, in emitCalleeSavedFrameMoves()
75 BuildCFI(MBB, MBBI, DL, in emitCalleeSavedFrameMoves()
90 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); in emitPrologue() local
108 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r)) in emitPrologue()
114 BuildCFI(MBB, MBBI, DL, in emitPrologue()
121 MBB, MBBI, DL, in emitPrologue()
126 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::R4) in emitPrologue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp232 const DebugLoc &DL, int64_t NumBytes, in emitSPUpdate() argument
243 BuildMI(MBB, MBBI, DL, TII.get(X86::TRAP)); in emitSPUpdate()
260 BuildMI(MBB, MBBI, DL, TII.get(X86::STACKALLOC_W_PROBING)).addImm(Offset); in emitSPUpdate()
277 BuildMI(MBB, MBBI, DL, TII.get(getMOVriOpcode(Uses64BitFramePtr, Offset)), in emitSPUpdate()
281 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr) in emitSPUpdate()
295 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r)) in emitSPUpdate()
304 BuildMI(MBB, MBBI, DL, TII.get(getMOVriOpcode(Uses64BitFramePtr, Offset)), in emitSPUpdate()
308 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax) in emitSPUpdate()
314 BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax), in emitSPUpdate()
317 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr), in emitSPUpdate()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp386 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
391 return LowerCCCArguments(Chain, CallConv, IsVarArg, Ins, DL, DAG, InVals); in LowerFormalArguments()
400 SDLoc &DL = CLI.DL; in LowerCall() local
417 OutVals, Ins, DL, DAG, InVals); in LowerCall()
427 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCArguments() argument
452 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerCCCArguments()
458 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
461 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
465 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
492 VA.getLocVT(), DL, Chain, FIN, in LowerCCCArguments()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp400 SDValue foldBitwiseOpWithNeg(SDNode *N, const SDLoc &DL, EVT VT);
402 SDValue combineMinNumMaxNum(const SDLoc &DL, EVT VT, SDValue LHS,
462 SDValue visitORLike(SDValue N0, SDValue N1, const SDLoc &DL);
464 SDValue SimplifyVCastOp(SDNode *N, const SDLoc &DL);
465 SDValue SimplifyVBinOp(SDNode *N, const SDLoc &DL);
575 const SDLoc &DL,
579 SDValue reassociateOpsCommutative(unsigned Opc, const SDLoc &DL, SDValue N0,
581 SDValue reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0,
583 SDValue reassociateReduction(unsigned RedOpc, unsigned Opc, const SDLoc &DL,
594 SDValue SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2);
[all …]

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