Lines Matching refs:DL
260 DebugLoc DL, MachineBasicBlock *ThisMBB,
277 BuildMI(LoopMBB, DL, TII->get(getLRForRMW(Ordering, Width, STI)), DestReg)
283 BuildMI(LoopMBB, DL, TII->get(RISCV::AND), ScratchReg)
286 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg)
291 BuildMI(LoopMBB, DL, TII->get(getSCForRMW(Ordering, Width, STI)), ScratchReg)
294 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE))
300 static void insertMaskedMerge(const RISCVInstrInfo *TII, DebugLoc DL,
311 BuildMI(MBB, DL, TII->get(RISCV::XOR), ScratchReg)
314 BuildMI(MBB, DL, TII->get(RISCV::AND), ScratchReg)
317 BuildMI(MBB, DL, TII->get(RISCV::XOR), DestReg)
323 MachineInstr &MI, DebugLoc DL,
346 BuildMI(LoopMBB, DL, TII->get(getLRForRMW32(Ordering, STI)), DestReg)
352 BuildMI(LoopMBB, DL, TII->get(RISCV::ADDI), ScratchReg)
357 BuildMI(LoopMBB, DL, TII->get(RISCV::ADD), ScratchReg)
362 BuildMI(LoopMBB, DL, TII->get(RISCV::SUB), ScratchReg)
367 BuildMI(LoopMBB, DL, TII->get(RISCV::AND), ScratchReg)
370 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg)
376 insertMaskedMerge(TII, DL, LoopMBB, ScratchReg, DestReg, ScratchReg, MaskReg,
379 BuildMI(LoopMBB, DL, TII->get(getSCForRMW32(Ordering, STI)), ScratchReg)
382 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE))
393 DebugLoc DL = MI.getDebugLoc();
411 doAtomicBinOpExpansion(TII, MI, DL, &MBB, LoopMBB, DoneMBB, BinOp, Width,
414 doMaskedAtomicBinOpExpansion(TII, MI, DL, &MBB, LoopMBB, DoneMBB, BinOp,
427 static void insertSext(const RISCVInstrInfo *TII, DebugLoc DL,
430 BuildMI(MBB, DL, TII->get(RISCV::SLL), ValReg)
433 BuildMI(MBB, DL, TII->get(RISCV::SRA), ValReg)
447 DebugLoc DL = MI.getDebugLoc();
487 BuildMI(LoopHeadMBB, DL, TII->get(getLRForRMW32(Ordering, STI)), DestReg)
489 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::AND), Scratch2Reg)
492 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::ADDI), Scratch1Reg)
500 insertSext(TII, DL, LoopHeadMBB, Scratch2Reg, MI.getOperand(6).getReg());
501 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BGE))
508 insertSext(TII, DL, LoopHeadMBB, Scratch2Reg, MI.getOperand(6).getReg());
509 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BGE))
516 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BGEU))
522 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BGEU))
533 insertMaskedMerge(TII, DL, LoopIfBodyMBB, Scratch1Reg, DestReg, IncrReg,
539 BuildMI(LoopTailMBB, DL, TII->get(getSCForRMW32(Ordering, STI)), Scratch1Reg)
542 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE))
629 DebugLoc DL = MI.getDebugLoc();
667 BuildMI(LoopHeadMBB, DL, TII->get(getLRForRMW(Ordering, Width, STI)),
670 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE))
677 BuildMI(LoopTailMBB, DL, TII->get(getSCForRMW(Ordering, Width, STI)),
681 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE))
691 BuildMI(LoopHeadMBB, DL, TII->get(getLRForRMW(Ordering, Width, STI)),
694 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::AND), ScratchReg)
697 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE))
708 insertMaskedMerge(TII, DL, LoopTailMBB, ScratchReg, DestReg, NewValReg,
710 BuildMI(LoopTailMBB, DL, TII->get(getSCForRMW(Ordering, Width, STI)),
714 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE))