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Searched refs:DCI (Results 1 – 25 of 50) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h100 SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const;
174 DAGCombinerInfo &DCI) const;
175 SDValue performFCopySignCombine(SDNode *N, DAGCombinerInfo &DCI) const;
180 DAGCombinerInfo &DCI) const;
182 SDValue performMemSDNodeCombine(MemSDNode *N, DAGCombinerInfo &DCI) const;
184 SDValue splitBinaryBitConstantOp(DAGCombinerInfo &DCI, const SDLoc &SL,
188 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const;
189 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const;
190 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const;
191 SDValue performZeroExtendCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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H A DAMDGPUISelLowering.h104 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const;
105 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const;
106 SDValue performAssertSZExtCombine(SDNode *N, DAGCombinerInfo &DCI) const;
107 SDValue performIntrinsicWOChainCombine(SDNode *N, DAGCombinerInfo &DCI) const;
109 SDValue splitBinaryBitConstantOpImpl(DAGCombinerInfo &DCI, const SDLoc &SL,
112 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const;
113 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const;
114 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const;
115 SDValue performTruncateCombine(SDNode *N, DAGCombinerInfo &DCI) const;
116 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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H A DAMDGPUISelLowering.cpp1597 SDValue False, SDValue CC, DAGCombinerInfo &DCI) const { in combineFMinMaxLegacyImpl()
1598 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacyImpl()
1628 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in combineFMinMaxLegacyImpl()
1629 !DCI.isCalledByLegalizer()) in combineFMinMaxLegacyImpl()
1649 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in combineFMinMaxLegacyImpl()
1650 !DCI.isCalledByLegalizer()) in combineFMinMaxLegacyImpl()
1668 DAGCombinerInfo &DCI) const { in combineFMinMaxLegacy()
1670 return combineFMinMaxLegacyImpl(DL, VT, LHS, RHS, True, False, CC, DCI); in combineFMinMaxLegacy()
1672 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacy()
1692 combineFMinMaxLegacyImpl(DL, VT, LHS, RHS, NegTrue, False, CC, DCI); in combineFMinMaxLegacy()
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H A DSIISelLowering.cpp7287 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); in lowerEXTRACT_VECTOR_ELT() local
7293 if (SDValue Combined = performExtractVectorEltCombine(Op.getNode(), DCI)) in lowerEXTRACT_VECTOR_ELT()
10174 SDValue SITargetLowering::widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const { in widenLoad()
10175 SelectionDAG &DAG = DCI.DAG; in widenLoad()
10190 if ((MemVT.isSimple() && !DCI.isAfterLegalizeDAG()) || in widenLoad()
10228 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
10233 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
11209 DAGCombinerInfo &DCI) const { in performUCharToFloatCombine()
11215 SelectionDAG &DAG = DCI.DAG; in performUCharToFloatCombine()
11225 if (DCI.isAfterLegalizeDAG() && SrcVT == MVT::i32) { in performUCharToFloatCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h620 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
730 unsigned Index, DAGCombinerInfo &DCI,
733 DAGCombinerInfo &DCI) const;
734 SDValue combineZERO_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const;
735 SDValue combineSIGN_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const;
736 SDValue combineSIGN_EXTEND_INREG(SDNode *N, DAGCombinerInfo &DCI) const;
737 SDValue combineMERGE(SDNode *N, DAGCombinerInfo &DCI) const;
739 SDValue combineLOAD(SDNode *N, DAGCombinerInfo &DCI) const;
740 SDValue combineSTORE(SDNode *N, DAGCombinerInfo &DCI) const;
741 SDValue combineVECTOR_SHUFFLE(SDNode *N, DAGCombinerInfo &DCI) const;
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H A DSystemZISelLowering.cpp6529 DAGCombinerInfo &DCI, in combineExtract() argument
6531 SelectionDAG &DAG = DCI.DAG; in combineExtract()
6582 DCI.AddToWorklist(Op.getNode()); in combineExtract()
6587 DCI.AddToWorklist(Op.getNode()); in combineExtract()
6622 DCI.AddToWorklist(Op.getNode()); in combineExtract()
6633 const SDLoc &DL, EVT TruncVT, SDValue Op, DAGCombinerInfo &DCI) const { in combineTruncateExtract()
6656 VecVT = EVT::getVectorVT(*DCI.DAG.getContext(), in combineTruncateExtract()
6660 return combineExtract(DL, ResVT, VecVT, Vec, NewIndex, DCI, true); in combineTruncateExtract()
6669 SDNode *N, DAGCombinerInfo &DCI) const { in combineZERO_EXTEND()
6671 SelectionDAG &DAG = DCI.DAG; in combineZERO_EXTEND()
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/freebsd/contrib/llvm-project/clang/lib/AST/
H A DASTImporterLookupTable.cpp164 auto DCI = LookupTable.find(DC->getPrimaryContext()); in lookup() local
165 if (DCI == LookupTable.end()) in lookup()
168 const auto &FoundNameMap = DCI->second; in lookup()
181 auto DCI = LookupTable.find(DC->getPrimaryContext()); in dump() local
182 if (DCI == LookupTable.end()) in dump()
184 const auto &FoundNameMap = DCI->second; in dump()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h894 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const;
895 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const;
897 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
1423 SDValue DAGCombineExtBoolTrunc(SDNode *N, DAGCombinerInfo &DCI) const;
1424 SDValue DAGCombineBuildVector(SDNode *N, DAGCombinerInfo &DCI) const;
1425 SDValue DAGCombineTruncBoolExt(SDNode *N, DAGCombinerInfo &DCI) const;
1426 SDValue combineStoreFPToInt(SDNode *N, DAGCombinerInfo &DCI) const;
1427 SDValue combineFPToIntToFP(SDNode *N, DAGCombinerInfo &DCI) const;
1428 SDValue combineSHL(SDNode *N, DAGCombinerInfo &DCI) const;
1429 SDValue combineSRA(SDNode *N, DAGCombinerInfo &DCI) const;
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H A DPPCISelLowering.cpp14031 DAGCombinerInfo &DCI) const { in ConvertSETCCToSubtract()
14034 SelectionDAG &DAG = DCI.DAG; in ConvertSETCCToSubtract()
14039 if (!DCI.isAfterLegalizeDAG()) in ConvertSETCCToSubtract()
14071 DAGCombinerInfo &DCI) const { in DAGCombineTruncBoolExt()
14072 SelectionDAG &DAG = DCI.DAG; in DAGCombineTruncBoolExt()
14111 return (N->getOpcode() == ISD::SETCC ? ConvertSETCCToSubtract(N, DCI) in DAGCombineTruncBoolExt()
14347 DAGCombinerInfo &DCI) const { in DAGCombineExtBoolTrunc()
14348 SelectionDAG &DAG = DCI.DAG; in DAGCombineExtBoolTrunc()
14623 DAGCombinerInfo &DCI) const { in combineSetCC()
14642 SelectionDAG &DAG = DCI.DAG; in combineSetCC()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp12592 TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUse() argument
12594 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse()
12618 TargetLowering::DAGCombinerInfo &DCI) { in combineSelectAndUseCommutative() argument
12622 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) in combineSelectAndUseCommutative()
12625 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes)) in combineSelectAndUseCommutative()
12643 TargetLowering::DAGCombinerInfo &DCI, in AddCombineToVPADD() argument
12655 SelectionDAG &DAG = DCI.DAG; in AddCombineToVPADD()
12671 TargetLowering::DAGCombinerInfo &DCI, in AddCombineVUZPToVPADDL() argument
12695 SelectionDAG &DAG = DCI.DAG; in AddCombineVUZPToVPADDL()
12724 TargetLowering::DAGCombinerInfo &DCI, in AddCombineBUILD_VECTORToVPADDL() argument
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H A DARMISelLowering.h435 SDValue PerformIntrinsicCombine(SDNode *N, DAGCombinerInfo &DCI) const;
436 SDValue PerformMVEExtCombine(SDNode *N, DAGCombinerInfo &DCI) const;
437 SDValue PerformMVETruncCombine(SDNode *N, DAGCombinerInfo &DCI) const;
438 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp5299 TargetLowering::DAGCombinerInfo &DCI) { in PerformADDCombineWithOperands() argument
5312 return DCI.DAG.getNode(NVPTXISD::IMAD, SDLoc(N), VT, N0.getOperand(0), in PerformADDCombineWithOperands()
5331 SDValue MAD = DCI.DAG.getNode(NVPTXISD::IMAD, SDLoc(N), VT, in PerformADDCombineWithOperands()
5333 return DCI.DAG.getSelect(SDLoc(N), VT, N0->getOperand(0), in PerformADDCombineWithOperands()
5343 TargetLowering::DAGCombinerInfo &DCI, in PerformFADDCombineWithOperands() argument
5348 &DCI.DAG.getTargetLoweringInfo()); in PerformFADDCombineWithOperands()
5349 if (!TLI->allowFMA(DCI.DAG.getMachineFunction(), OptLevel)) in PerformFADDCombineWithOperands()
5411 return DCI.DAG.getNode(ISD::FMA, SDLoc(N), VT, N0.getOperand(0), in PerformFADDCombineWithOperands()
5443 TargetLowering::DAGCombinerInfo &DCI, in PerformADDCombine() argument
5457 if (SDValue Result = PerformADDCombineWithOperands(N, N0, N1, DCI)) in PerformADDCombine()
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/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DDynamicType.cpp218 static raw_ostream &printJson(const DynamicCastInfo &DCI, raw_ostream &Out, in printJson() argument
220 return Out << "\"from\": \"" << DCI.from() << "\", \"to\": \"" << DCI.to() in printJson()
221 << "\", \"kind\": \"" << (DCI.succeeds() ? "success" : "fail") in printJson()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.h296 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
298 SDValue combineSelect(SDNode *N, DAGCombinerInfo &DCI) const;
299 SDValue combineSelectCC(SDNode *N, DAGCombinerInfo &DCI) const;
300 SDValue combineTRUNCATE(SDNode *N, DAGCombinerInfo &DCI) const;
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2477 performVECTOR_SHUFFLECombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) { in performVECTOR_SHUFFLECombine() argument
2478 auto &DAG = DCI.DAG; in performVECTOR_SHUFFLECombine()
2506 TargetLowering::DAGCombinerInfo &DCI) { in performVectorExtendToFPCombine() argument
2507 auto &DAG = DCI.DAG; in performVectorExtendToFPCombine()
2528 performVectorExtendCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) { in performVectorExtendCombine() argument
2529 auto &DAG = DCI.DAG; in performVectorExtendCombine()
2575 performVectorTruncZeroCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) { in performVectorTruncZeroCombine() argument
2576 auto &DAG = DCI.DAG; in performVectorTruncZeroCombine()
2777 TargetLowering::DAGCombinerInfo &DCI) { in performTruncateCombine() argument
2778 auto &DAG = DCI.DAG; in performTruncateCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp17928 TargetLowering::DAGCombinerInfo &DCI, in performXorCombine() argument
17930 if (DCI.isBeforeLegalizeOps()) in performXorCombine()
18244 TargetLowering::DAGCombinerInfo &DCI, in performMulCombine() argument
18254 if (DCI.isBeforeLegalizeOps()) in performMulCombine()
18582 TargetLowering::DAGCombinerInfo &DCI, in performFpToIntCombine() argument
18650 static SDValue tryCombineToBSL(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, in tryCombineToBSL() argument
18653 SelectionDAG &DAG = DCI.DAG; in tryCombineToBSL()
18828 static SDValue performORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, in performORCombine() argument
18831 SelectionDAG &DAG = DCI.DAG; in performORCombine()
18840 if (SDValue Res = tryCombineToBSL(N, DCI, TLI)) in performORCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1419 TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUse() argument
1421 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse()
1443 combineSelectAndUseCommutative(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUseCommutative() argument
1448 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) in combineSelectAndUseCommutative()
1451 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes)) in combineSelectAndUseCommutative()
1458 TargetLowering::DAGCombinerInfo &DCI) { in PerformSUBCombine() argument
1464 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, /*AllOnes=*/false)) in PerformSUBCombine()
1471 DAGCombinerInfo &DCI) const { in PerformDAGCombine()
1478 return combineSelectAndUseCommutative(N, DCI, /*AllOnes=*/false); in PerformDAGCombine()
1480 return combineSelectAndUseCommutative(N, DCI, /*AllOnes=*/true); in PerformDAGCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h193 SDValue PerformBITCASTCombine(SDNode *N, DAGCombinerInfo &DCI) const;
198 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp621 DAGCombinerInfo &DCI) const { in SimplifyDemandedBits()
622 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedBits()
623 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in SimplifyDemandedBits()
624 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedBits()
629 DCI.AddToWorklist(Op.getNode()); in SimplifyDemandedBits()
630 DCI.CommitTargetLoweringOpt(TLO); in SimplifyDemandedBits()
637 DAGCombinerInfo &DCI) const { in SimplifyDemandedBits()
638 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedBits()
639 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in SimplifyDemandedBits()
640 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedBits()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h259 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
589 SDValue combineTruncateBeforeLegal(SDValue Op, DAGCombinerInfo &DCI) const;
590 SDValue combineConcatVectorsBeforeLegal(SDValue Op, DAGCombinerInfo & DCI)
592 SDValue combineVectorShuffleBeforeLegal(SDValue Op, DAGCombinerInfo & DCI)
595 SDValue PerformHvxDAGCombine(SDNode * N, DAGCombinerInfo & DCI) const;
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.h96 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp577 TargetLowering::DAGCombinerInfo &DCI, in performDivRemCombine() argument
579 if (DCI.isBeforeLegalizeOps()) in performDivRemCombine()
686 TargetLowering::DAGCombinerInfo &DCI, in performSELECTCombine() argument
688 if (DCI.isBeforeLegalizeOps()) in performSELECTCombine()
767 TargetLowering::DAGCombinerInfo &DCI, in performCMovFPCombine() argument
769 if (DCI.isBeforeLegalizeOps()) in performCMovFPCombine()
794 TargetLowering::DAGCombinerInfo &DCI, in performANDCombine() argument
796 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performANDCombine()
877 TargetLowering::DAGCombinerInfo &DCI, in performORCombine() argument
883 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performORCombine()
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H A DMipsSEISelLowering.h50 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4019 DAGCombinerInfo &DCI) const;
4025 DAGCombinerInfo &DCI) const;
4070 DAGCombinerInfo &DCI) const;
4253 bool foldBooleans, DAGCombinerInfo &DCI,
4277 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
5594 const SDLoc &DL, DAGCombinerInfo &DCI) const;
5596 const SDLoc &DL, DAGCombinerInfo &DCI) const;
5600 DAGCombinerInfo &DCI,
5606 DAGCombinerInfo &DCI, const SDLoc &DL) const;
5610 DAGCombinerInfo &DCI, const SDLoc &DL,
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp40694 TargetLowering::DAGCombinerInfo &DCI, in combineTargetShuffle() argument
40714 DCI.CombineTo(N.getNode(), Movddup); in combineTargetShuffle()
40716 DCI.recursivelyDeleteUnusedNodes(LN); in combineTargetShuffle()
40815 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
40818 DCI.recursivelyDeleteUnusedNodes(LN); in combineTargetShuffle()
40822 DCI.CombineTo(LN, Scl, BcastLd.getValue(1)); in combineTargetShuffle()
40846 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
40848 DCI.recursivelyDeleteUnusedNodes(Src.getNode()); in combineTargetShuffle()
40863 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
40865 DCI.recursivelyDeleteUnusedNodes(Src.getNode()); in combineTargetShuffle()
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