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Searched refs:DCI (Results 1 – 25 of 50) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h100 SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const;
153 SDValue promoteUniformOpToI32(SDValue Op, DAGCombinerInfo &DCI) const;
179 DAGCombinerInfo &DCI) const;
180 SDValue performFCopySignCombine(SDNode *N, DAGCombinerInfo &DCI) const;
185 DAGCombinerInfo &DCI) const;
187 SDValue performMemSDNodeCombine(MemSDNode *N, DAGCombinerInfo &DCI) const;
189 SDValue splitBinaryBitConstantOp(DAGCombinerInfo &DCI, const SDLoc &SL,
193 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const;
194 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const;
195 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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H A DAMDGPUISelLowering.h107 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const;
108 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const;
109 SDValue performAssertSZExtCombine(SDNode *N, DAGCombinerInfo &DCI) const;
110 SDValue performIntrinsicWOChainCombine(SDNode *N, DAGCombinerInfo &DCI) const;
112 SDValue splitBinaryBitConstantOpImpl(DAGCombinerInfo &DCI, const SDLoc &SL,
115 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const;
116 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const;
117 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const;
118 SDValue performTruncateCombine(SDNode *N, DAGCombinerInfo &DCI) const;
119 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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H A DAMDGPUISelLowering.cpp1654 SDValue False, SDValue CC, DAGCombinerInfo &DCI) const { in combineFMinMaxLegacyImpl()
1655 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacyImpl()
1685 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in combineFMinMaxLegacyImpl()
1686 !DCI.isCalledByLegalizer()) in combineFMinMaxLegacyImpl()
1706 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in combineFMinMaxLegacyImpl()
1707 !DCI.isCalledByLegalizer()) in combineFMinMaxLegacyImpl()
1725 DAGCombinerInfo &DCI) const { in combineFMinMaxLegacy()
1727 return combineFMinMaxLegacyImpl(DL, VT, LHS, RHS, True, False, CC, DCI); in combineFMinMaxLegacy()
1729 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacy()
1749 combineFMinMaxLegacyImpl(DL, VT, LHS, RHS, NegTrue, False, CC, DCI); in combineFMinMaxLegacy()
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H A DSIISelLowering.cpp7221 DAGCombinerInfo &DCI) const { in promoteUniformOpToI32()
7233 if (DCI.isBeforeLegalizeOps() || in promoteUniformOpToI32()
7237 auto &DAG = DCI.DAG; in promoteUniformOpToI32()
7829 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); in lowerEXTRACT_VECTOR_ELT() local
7835 if (SDValue Combined = performExtractVectorEltCombine(Op.getNode(), DCI)) in lowerEXTRACT_VECTOR_ELT()
10851 DAGCombinerInfo &DCI) const { in widenLoad()
10852 SelectionDAG &DAG = DCI.DAG; in widenLoad()
10867 if ((MemVT.isSimple() && !DCI.isAfterLegalizeDAG()) || in widenLoad()
10905 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
10910 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h643 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
765 unsigned Index, DAGCombinerInfo &DCI,
768 DAGCombinerInfo &DCI) const;
769 SDValue combineZERO_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const;
770 SDValue combineSIGN_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const;
771 SDValue combineSIGN_EXTEND_INREG(SDNode *N, DAGCombinerInfo &DCI) const;
772 SDValue combineMERGE(SDNode *N, DAGCombinerInfo &DCI) const;
774 SDValue combineLOAD(SDNode *N, DAGCombinerInfo &DCI) const;
775 SDValue combineSTORE(SDNode *N, DAGCombinerInfo &DCI) const;
776 SDValue combineVECTOR_SHUFFLE(SDNode *N, DAGCombinerInfo &DCI) const;
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H A DSystemZISelLowering.cpp7540 DAGCombinerInfo &DCI, in combineExtract() argument
7542 SelectionDAG &DAG = DCI.DAG; in combineExtract()
7593 DCI.AddToWorklist(Op.getNode()); in combineExtract()
7598 DCI.AddToWorklist(Op.getNode()); in combineExtract()
7633 DCI.AddToWorklist(Op.getNode()); in combineExtract()
7644 const SDLoc &DL, EVT TruncVT, SDValue Op, DAGCombinerInfo &DCI) const { in combineTruncateExtract()
7667 VecVT = EVT::getVectorVT(*DCI.DAG.getContext(), in combineTruncateExtract()
7671 return combineExtract(DL, ResVT, VecVT, Vec, NewIndex, DCI, true); in combineTruncateExtract()
7680 SDNode *N, DAGCombinerInfo &DCI) const { in combineZERO_EXTEND()
7682 SelectionDAG &DAG = DCI.DAG; in combineZERO_EXTEND()
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/freebsd/contrib/llvm-project/clang/lib/AST/
H A DASTImporterLookupTable.cpp165 auto DCI = LookupTable.find(DC); in lookup() local
166 if (DCI == LookupTable.end()) in lookup()
169 const auto &FoundNameMap = DCI->second; in lookup()
182 auto DCI = LookupTable.find(DC); in dump() local
183 if (DCI == LookupTable.end()) in dump()
185 const auto &FoundNameMap = DCI->second; in dump()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h907 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const;
908 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const;
910 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
1444 SDValue DAGCombineExtBoolTrunc(SDNode *N, DAGCombinerInfo &DCI) const;
1445 SDValue DAGCombineBuildVector(SDNode *N, DAGCombinerInfo &DCI) const;
1446 SDValue DAGCombineTruncBoolExt(SDNode *N, DAGCombinerInfo &DCI) const;
1447 SDValue combineStoreFPToInt(SDNode *N, DAGCombinerInfo &DCI) const;
1448 SDValue combineFPToIntToFP(SDNode *N, DAGCombinerInfo &DCI) const;
1449 SDValue combineSHL(SDNode *N, DAGCombinerInfo &DCI) const;
1450 SDValue combineVectorShift(SDNode *N, DAGCombinerInfo &DCI) const;
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H A DPPCISelLowering.cpp14864 DAGCombinerInfo &DCI) const { in ConvertSETCCToSubtract()
14867 SelectionDAG &DAG = DCI.DAG; in ConvertSETCCToSubtract()
14872 if (!DCI.isAfterLegalizeDAG()) in ConvertSETCCToSubtract()
14904 DAGCombinerInfo &DCI) const { in DAGCombineTruncBoolExt()
14905 SelectionDAG &DAG = DCI.DAG; in DAGCombineTruncBoolExt()
14944 return (N->getOpcode() == ISD::SETCC ? ConvertSETCCToSubtract(N, DCI) in DAGCombineTruncBoolExt()
15179 DAGCombinerInfo &DCI) const { in DAGCombineExtBoolTrunc()
15180 SelectionDAG &DAG = DCI.DAG; in DAGCombineExtBoolTrunc()
15456 DAGCombinerInfo &DCI) const { in combineSetCC()
15475 SelectionDAG &DAG = DCI.DAG; in combineSetCC()
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp4842 TargetLowering::DAGCombinerInfo &DCI) { in PerformADDCombineWithOperands() argument
4870 DCI.DAG.getNode(ISD::MUL, DL, VT, M->getOperand(0), M->getOperand(1)); in PerformADDCombineWithOperands()
4871 SDValue MAD = DCI.DAG.getNode(ISD::ADD, DL, VT, Mul, N1); in PerformADDCombineWithOperands()
4872 return DCI.DAG.getSelect(SDLoc(N), VT, N0->getOperand(0), in PerformADDCombineWithOperands()
4882 TargetLowering::DAGCombinerInfo &DCI, in PerformFADDCombineWithOperands() argument
4887 &DCI.DAG.getTargetLoweringInfo()); in PerformFADDCombineWithOperands()
4888 if (!(TLI->allowFMA(DCI.DAG.getMachineFunction(), OptLevel) || in PerformFADDCombineWithOperands()
4952 return DCI.DAG.getNode(ISD::FMA, SDLoc(N), VT, N0.getOperand(0), in PerformFADDCombineWithOperands()
4972 combineUnpackingMovIntoLoad(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) { in combineUnpackingMovIntoLoad() argument
4974 if (!DCI.isAfterLegalizeDAG()) in combineUnpackingMovIntoLoad()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp12659 TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUse() argument
12661 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse()
12685 TargetLowering::DAGCombinerInfo &DCI) { in combineSelectAndUseCommutative() argument
12689 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) in combineSelectAndUseCommutative()
12692 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes)) in combineSelectAndUseCommutative()
12710 TargetLowering::DAGCombinerInfo &DCI, in AddCombineToVPADD() argument
12722 SelectionDAG &DAG = DCI.DAG; in AddCombineToVPADD()
12738 TargetLowering::DAGCombinerInfo &DCI, in AddCombineVUZPToVPADDL() argument
12762 SelectionDAG &DAG = DCI.DAG; in AddCombineVUZPToVPADDL()
12791 TargetLowering::DAGCombinerInfo &DCI, in AddCombineBUILD_VECTORToVPADDL() argument
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H A DARMISelLowering.h453 SDValue PerformIntrinsicCombine(SDNode *N, DAGCombinerInfo &DCI) const;
454 SDValue PerformMVEExtCombine(SDNode *N, DAGCombinerInfo &DCI) const;
455 SDValue PerformMVETruncCombine(SDNode *N, DAGCombinerInfo &DCI) const;
456 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DDynamicType.cpp217 static raw_ostream &printJson(const DynamicCastInfo &DCI, raw_ostream &Out, in printJson() argument
219 return Out << "\"from\": \"" << DCI.from() << "\", \"to\": \"" << DCI.to() in printJson()
220 << "\", \"kind\": \"" << (DCI.succeeds() ? "success" : "fail") in printJson()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.h297 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
299 SDValue combineSelect(SDNode *N, DAGCombinerInfo &DCI) const;
300 SDValue combineSelectCC(SDNode *N, DAGCombinerInfo &DCI) const;
301 SDValue combineTRUNCATE(SDNode *N, DAGCombinerInfo &DCI) const;
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2887 performVECTOR_SHUFFLECombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) { in performVECTOR_SHUFFLECombine() argument
2888 auto &DAG = DCI.DAG; in performVECTOR_SHUFFLECombine()
2916 TargetLowering::DAGCombinerInfo &DCI) { in performVectorExtendToFPCombine() argument
2917 auto &DAG = DCI.DAG; in performVectorExtendToFPCombine()
2938 performVectorExtendCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) { in performVectorExtendCombine() argument
2939 auto &DAG = DCI.DAG; in performVectorExtendCombine()
2985 performVectorTruncZeroCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) { in performVectorTruncZeroCombine() argument
2986 auto &DAG = DCI.DAG; in performVectorTruncZeroCombine()
3187 TargetLowering::DAGCombinerInfo &DCI) { in performTruncateCombine() argument
3188 auto &DAG = DCI.DAG; in performTruncateCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp18189 performActiveLaneMaskCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, in performActiveLaneMaskCombine() argument
18191 if (DCI.isBeforeLegalize()) in performActiveLaneMaskCombine()
18194 if (SDValue While = optimizeIncrementingWhile(N, DCI.DAG, /*IsSigned=*/false, in performActiveLaneMaskCombine()
18230 SelectionDAG &DAG = DCI.DAG; in performActiveLaneMaskCombine()
18247 DCI.CombineTo(Extracts[0], R.getValue(0)); in performActiveLaneMaskCombine()
18248 DCI.CombineTo(Extracts[1], R.getValue(1)); in performActiveLaneMaskCombine()
18258 DCI.CombineTo(Extracts[I], R.getValue(0)); in performActiveLaneMaskCombine()
18259 DCI.CombineTo(Extracts[I + 1], R.getValue(1)); in performActiveLaneMaskCombine()
18495 TargetLowering::DAGCombinerInfo &DCI, in performXorCombine() argument
18497 if (DCI.isBeforeLegalizeOps()) in performXorCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1373 TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUse() argument
1375 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse()
1397 combineSelectAndUseCommutative(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUseCommutative() argument
1402 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) in combineSelectAndUseCommutative()
1405 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes)) in combineSelectAndUseCommutative()
1412 TargetLowering::DAGCombinerInfo &DCI) { in PerformSUBCombine() argument
1418 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, /*AllOnes=*/false)) in PerformSUBCombine()
1425 DAGCombinerInfo &DCI) const { in PerformDAGCombine()
1432 return combineSelectAndUseCommutative(N, DCI, /*AllOnes=*/false); in PerformDAGCombine()
1434 return combineSelectAndUseCommutative(N, DCI, /*AllOnes=*/true); in PerformDAGCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h150 SDValue PerformBITCASTCombine(SDNode *N, DAGCombinerInfo &DCI) const;
155 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp648 DAGCombinerInfo &DCI) const { in SimplifyDemandedBits()
649 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedBits()
650 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in SimplifyDemandedBits()
651 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedBits()
656 DCI.AddToWorklist(Op.getNode()); in SimplifyDemandedBits()
657 DCI.CommitTargetLoweringOpt(TLO); in SimplifyDemandedBits()
664 DAGCombinerInfo &DCI) const { in SimplifyDemandedBits()
665 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedBits()
666 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in SimplifyDemandedBits()
667 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedBits()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h262 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
606 SDValue combineTruncateBeforeLegal(SDValue Op, DAGCombinerInfo &DCI) const;
607 SDValue combineConcatVectorsBeforeLegal(SDValue Op, DAGCombinerInfo & DCI)
609 SDValue combineVectorShuffleBeforeLegal(SDValue Op, DAGCombinerInfo & DCI)
612 SDValue PerformHvxDAGCombine(SDNode * N, DAGCombinerInfo & DCI) const;
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.h63 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp586 TargetLowering::DAGCombinerInfo &DCI, in performDivRemCombine() argument
588 if (DCI.isBeforeLegalizeOps()) in performDivRemCombine()
695 TargetLowering::DAGCombinerInfo &DCI, in performSELECTCombine() argument
697 if (DCI.isBeforeLegalizeOps()) in performSELECTCombine()
776 TargetLowering::DAGCombinerInfo &DCI, in performCMovFPCombine() argument
778 if (DCI.isBeforeLegalizeOps()) in performCMovFPCombine()
803 TargetLowering::DAGCombinerInfo &DCI, in performANDCombine() argument
805 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performANDCombine()
886 TargetLowering::DAGCombinerInfo &DCI, in performORCombine() argument
888 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performORCombine()
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/freebsd/contrib/llvm-project/clang/lib/Interpreter/
H A DInterpreter.cpp484 std::unique_ptr<CompilerInstance> DCI) { in createWithCUDA() argument
504 return std::make_unique<IncrementalAction>(*DCI, *Ctx, Err, *Interp); in createWithCUDA()
512 DCI->ExecuteAction(*Interp->DeviceAct); in createWithCUDA()
514 Interp->DeviceCI = std::move(DCI); in createWithCUDA()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp42211 TargetLowering::DAGCombinerInfo &DCI, in combineTargetShuffle() argument
42234 DCI.CombineTo(N.getNode(), Movddup); in combineTargetShuffle()
42236 DCI.recursivelyDeleteUnusedNodes(LN); in combineTargetShuffle()
42336 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
42339 DCI.recursivelyDeleteUnusedNodes(LN); in combineTargetShuffle()
42343 DCI.CombineTo(LN, Scl, BcastLd.getValue(1)); in combineTargetShuffle()
42367 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
42369 DCI.recursivelyDeleteUnusedNodes(Src.getNode()); in combineTargetShuffle()
42384 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
42386 DCI.recursivelyDeleteUnusedNodes(Src.getNode()); in combineTargetShuffle()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4175 DAGCombinerInfo &DCI) const;
4181 DAGCombinerInfo &DCI) const;
4226 DAGCombinerInfo &DCI) const;
4422 bool foldBooleans, DAGCombinerInfo &DCI,
4446 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
5800 const SDLoc &DL, DAGCombinerInfo &DCI) const;
5802 const SDLoc &DL, DAGCombinerInfo &DCI) const;
5804 const SDLoc &DL, DAGCombinerInfo &DCI) const;
5808 DAGCombinerInfo &DCI,
5814 DAGCombinerInfo &DCI, const SDLoc &DL) const;
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