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Searched refs:AR_PHY (Results 1 – 25 of 30) sorted by relevance

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/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_reset.c222 OS_REG_WRITE(ah, AR_PHY(10), in ar5210Reset()
223 (OS_REG_READ(ah, AR_PHY(10)) & 0xFFFF00FF) | in ar5210Reset()
225 OS_REG_WRITE(ah, AR_PHY(13), in ar5210Reset()
228 OS_REG_WRITE(ah, AR_PHY(17), in ar5210Reset()
229 (OS_REG_READ(ah, AR_PHY(17)) & 0xFFFFC07F) | in ar5210Reset()
231 OS_REG_WRITE(ah, AR_PHY(18), in ar5210Reset()
232 (OS_REG_READ(ah, AR_PHY(18)) & 0xFFFC0FFF) | in ar5210Reset()
234 OS_REG_WRITE(ah, AR_PHY(25), in ar5210Reset()
235 (OS_REG_READ(ah, AR_PHY(25)) & 0xFFF80FFF) | in ar5210Reset()
237 OS_REG_WRITE(ah, AR_PHY(68), in ar5210Reset()
[all …]
H A Dar5210phy.h28 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) macro
H A Dar5210_xmit.c189 OS_REG_WRITE(ah, AR_PHY(17), in ar5210ResetTxQueue()
190 (OS_REG_READ(ah, AR_PHY(17)) & ~0x7F) | 0x38); in ar5210ResetTxQueue()
206 OS_REG_WRITE(ah, AR_PHY(17), in ar5210ResetTxQueue()
207 (OS_REG_READ(ah, AR_PHY(17)) & ~0x7F) | 0x1C); in ar5210ResetTxQueue()
/freebsd/sys/dev/ath/ath_hal/ar5312/
H A Dar5312_attach.c184 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar5312Attach()
216 OS_REG_WRITE(ah, AR_PHY(0), 0x00004007); in ar5312Attach()
221 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar5312Attach()
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_attach.c189 OS_REG_WRITE(ah, AR_PHY(0x34), 0x00001c16); in ar5212GetRadioRev()
191 OS_REG_WRITE(ah, AR_PHY(0x20), 0x00010000); in ar5212GetRadioRev()
192 val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff; in ar5212GetRadioRev()
400 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar5212Attach()
509 OS_REG_WRITE(ah, AR_PHY(0), 0x00004007); in ar5212Attach()
514 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar5212Attach()
H A Dar5212_reset.c297 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar5212Reset()
1302 int16_t nf = (OS_REG_READ(ah, AR_PHY(25)) >> 19) & 0x1ff; in ar5212GetNoiseFloor()
1447 val = OS_REG_READ(ah, AR_PHY(25)); in ar5212GetNf()
1450 OS_REG_WRITE(ah, AR_PHY(25), val); in ar5212GetNf()
1468 OS_REG_WRITE(ah, AR_PHY(25), val); in ar5212GetNf()
1512 #define ANT_SWITCH_TABLE1 AR_PHY(88) in ar5212SetAntennaSwitchInternal()
1513 #define ANT_SWITCH_TABLE2 AR_PHY(89) in ar5212SetAntennaSwitchInternal()
1616 OS_REG_WRITE(_ah, AR_PHY(_reg), \ in ar5212SetBoardValues()
1617 (OS_REG_READ(_ah, AR_PHY(_reg)) & _mask) | (_val)); in ar5212SetBoardValues()
1658 OS_REG_WRITE(ah, AR_PHY(90), in ar5212SetBoardValues()
[all …]
H A Dar5212phy.h24 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) macro
H A Dar5111.c180 OS_REG_WRITE(ah, AR_PHY(0x27), ((data2111 & 0xff) << 8) | (reg32 & 0xff)); in ar5111SetChannel()
182 OS_REG_WRITE(ah, AR_PHY(0x34), (data2111 & 0xff00) | (reg32 & 0xff)); in ar5111SetChannel()
H A Dar2316.c149 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); in ar2316SetChannel()
152 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); in ar2316SetChannel()
H A Dar2317.c126 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); in ar2317SetChannel()
129 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); in ar2317SetChannel()
H A Dar2413.c141 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); in ar2413SetChannel()
144 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); in ar2413SetChannel()
H A Dar2425.c136 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); in ar2425SetChannel()
139 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); in ar2425SetChannel()
H A Dar5413.c141 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); in ar5413SetChannel()
144 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); in ar5413SetChannel()
H A Dar5112.c141 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); in ar5112SetChannel()
144 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); in ar5112SetChannel()
H A Dar5212_misc.c158 OS_REG_SET_BIT(ah, AR_PHY(0), 0x00002000); in ar5212EnableRfKill()
335 nf = (OS_REG_READ(ah, AR_PHY(25)) >> 19) & 0x1ff; in ar5212GetRandomSeed()
/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211phy.h28 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) macro
H A Dar5211_reset.c814 OS_REG_WRITE(ah, AR_PHY(0x27), ((data2111 & 0xff) << 8) | (reg32 & 0xff)); in ar5211SetChannel()
816 OS_REG_WRITE(ah, AR_PHY(0x34), (data2111 & 0xff00) | (reg32 & 0xff)); in ar5211SetChannel()
827 nf = (OS_REG_READ(ah, AR_PHY(25)) >> 19) & 0x1ff; in ar5211GetNoiseFloor()
847 OS_REG_WRITE(ah, AR_PHY(25), in ar5211RunNoiseFloor()
848 (OS_REG_READ(ah, AR_PHY(25)) & ~0xFFF) | in ar5211RunNoiseFloor()
1229 OS_REG_WRITE(ah, AR_PHY(68), in ar5211SetBoardValues()
1230 (OS_REG_READ(ah, AR_PHY(68)) & 0xFFFFFFFC) | 0x3); in ar5211SetBoardValues()
1232 OS_REG_WRITE(ah, AR_PHY(68), in ar5211SetBoardValues()
1233 (OS_REG_READ(ah, AR_PHY(68)) & 0xFFFFFC06) | in ar5211SetBoardValues()
H A Dar5211_misc.c381 nf = (OS_REG_READ(ah, AR_PHY(25)) >> 19) & 0x1ff; in ar5211GetRandomSeed()
/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_attach.c286 OS_REG_WRITE(ah, AR_PHY(0x36), 0x00007058); in ar5416GetRadioRev()
288 OS_REG_WRITE(ah, AR_PHY(0x20), 0x00010000); in ar5416GetRadioRev()
289 val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff; in ar5416GetRadioRev()
397 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar5416Attach()
608 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar5416WriteIni()
/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9287_attach.c261 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9287Attach()
413 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9287WriteIni()
H A Dar9285_attach.c270 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9285Attach()
505 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9285WriteIni()
H A Dar9280_attach.c279 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9280Attach()
519 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9280WriteIni()
/freebsd/sys/dev/ath/ath_hal/ar9001/
H A Dar9160_attach.c220 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9160Attach()
/freebsd/sys/dev/otus/
H A Dif_otus.c2600 if (AR_PHY(ar5416_phy_regs[i]) == reg) in otus_phy_get_def()
2719 otus_write(sc, AR_PHY(ar5416_phy_regs[i]), vals[i]); in otus_program_phy()
2785 otus_write(sc, AR_PHY(44), data); in otus_set_rf_bank4()
2788 otus_write(sc, AR_PHY(58), data); in otus_set_rf_bank4()
2874 otus_write(sc, AR_PHY(ar5416_banks_regs[i]), vals[i]); in otus_set_chan()
H A Dif_otusreg.h123 #define AR_PHY(reg) (AR_PHY_BASE + (reg) * 4) macro

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