16e778a7eSPedro F. Giffuni /*-
26e778a7eSPedro F. Giffuni * SPDX-License-Identifier: ISC
36e778a7eSPedro F. Giffuni *
4204582f2SAdrian Chadd * Copyright (c) 2008 Sam Leffler, Errno Consulting
5204582f2SAdrian Chadd * Copyright (c) 2008 Atheros Communications, Inc.
6204582f2SAdrian Chadd *
7204582f2SAdrian Chadd * Permission to use, copy, modify, and/or distribute this software for any
8204582f2SAdrian Chadd * purpose with or without fee is hereby granted, provided that the above
9204582f2SAdrian Chadd * copyright notice and this permission notice appear in all copies.
10204582f2SAdrian Chadd *
11204582f2SAdrian Chadd * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12204582f2SAdrian Chadd * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13204582f2SAdrian Chadd * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14204582f2SAdrian Chadd * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15204582f2SAdrian Chadd * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16204582f2SAdrian Chadd * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17204582f2SAdrian Chadd * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18204582f2SAdrian Chadd */
19204582f2SAdrian Chadd #include "opt_ah.h"
20204582f2SAdrian Chadd
21204582f2SAdrian Chadd #include "ah.h"
22204582f2SAdrian Chadd #include "ah_internal.h"
23204582f2SAdrian Chadd #include "ah_devid.h"
24204582f2SAdrian Chadd
25204582f2SAdrian Chadd #include "ar5416/ar5416.h"
26204582f2SAdrian Chadd #include "ar5416/ar5416reg.h"
27204582f2SAdrian Chadd #include "ar5416/ar5416phy.h"
28204582f2SAdrian Chadd
29204582f2SAdrian Chadd #include "ar9001/ar9160.ini"
30204582f2SAdrian Chadd
31204582f2SAdrian Chadd static const HAL_PERCAL_DATA ar9160_iq_cal = { /* multi sample */
32204582f2SAdrian Chadd .calName = "IQ", .calType = IQ_MISMATCH_CAL,
33204582f2SAdrian Chadd .calNumSamples = MAX_CAL_SAMPLES,
34204582f2SAdrian Chadd .calCountMax = PER_MIN_LOG_COUNT,
35204582f2SAdrian Chadd .calCollect = ar5416IQCalCollect,
36204582f2SAdrian Chadd .calPostProc = ar5416IQCalibration
37204582f2SAdrian Chadd };
38204582f2SAdrian Chadd static const HAL_PERCAL_DATA ar9160_adc_gain_cal = { /* multi sample */
39204582f2SAdrian Chadd .calName = "ADC Gain", .calType = ADC_GAIN_CAL,
40204582f2SAdrian Chadd .calNumSamples = MAX_CAL_SAMPLES,
41204582f2SAdrian Chadd .calCountMax = PER_MIN_LOG_COUNT,
42204582f2SAdrian Chadd .calCollect = ar5416AdcGainCalCollect,
43204582f2SAdrian Chadd .calPostProc = ar5416AdcGainCalibration
44204582f2SAdrian Chadd };
45204582f2SAdrian Chadd static const HAL_PERCAL_DATA ar9160_adc_dc_cal = { /* multi sample */
46204582f2SAdrian Chadd .calName = "ADC DC", .calType = ADC_DC_CAL,
47204582f2SAdrian Chadd .calNumSamples = MAX_CAL_SAMPLES,
48204582f2SAdrian Chadd .calCountMax = PER_MIN_LOG_COUNT,
49204582f2SAdrian Chadd .calCollect = ar5416AdcDcCalCollect,
50204582f2SAdrian Chadd .calPostProc = ar5416AdcDcCalibration
51204582f2SAdrian Chadd };
52204582f2SAdrian Chadd static const HAL_PERCAL_DATA ar9160_adc_init_dc_cal = {
53204582f2SAdrian Chadd .calName = "ADC Init DC", .calType = ADC_DC_INIT_CAL,
54204582f2SAdrian Chadd .calNumSamples = MIN_CAL_SAMPLES,
55204582f2SAdrian Chadd .calCountMax = INIT_LOG_COUNT,
56204582f2SAdrian Chadd .calCollect = ar5416AdcDcCalCollect,
57204582f2SAdrian Chadd .calPostProc = ar5416AdcDcCalibration
58204582f2SAdrian Chadd };
59204582f2SAdrian Chadd
60204582f2SAdrian Chadd static HAL_BOOL ar9160FillCapabilityInfo(struct ath_hal *ah);
61204582f2SAdrian Chadd
62204582f2SAdrian Chadd static void
ar9160AniSetup(struct ath_hal * ah)63204582f2SAdrian Chadd ar9160AniSetup(struct ath_hal *ah)
64204582f2SAdrian Chadd {
65204582f2SAdrian Chadd static const struct ar5212AniParams aniparams = {
66204582f2SAdrian Chadd .maxNoiseImmunityLevel = 4, /* levels 0..4 */
67204582f2SAdrian Chadd .totalSizeDesired = { -55, -55, -55, -55, -62 },
68204582f2SAdrian Chadd .coarseHigh = { -14, -14, -14, -14, -12 },
69204582f2SAdrian Chadd .coarseLow = { -64, -64, -64, -64, -70 },
70204582f2SAdrian Chadd .firpwr = { -78, -78, -78, -78, -80 },
719bb63aa8SAdrian Chadd .maxSpurImmunityLevel = 7,
729bb63aa8SAdrian Chadd .cycPwrThr1 = { 2, 4, 6, 8, 10, 12, 14, 16 },
73204582f2SAdrian Chadd .maxFirstepLevel = 2, /* levels 0..2 */
74204582f2SAdrian Chadd .firstep = { 0, 4, 8 },
75204582f2SAdrian Chadd .ofdmTrigHigh = 500,
76204582f2SAdrian Chadd .ofdmTrigLow = 200,
77204582f2SAdrian Chadd .cckTrigHigh = 200,
78204582f2SAdrian Chadd .cckTrigLow = 100,
79204582f2SAdrian Chadd .rssiThrHigh = 40,
80204582f2SAdrian Chadd .rssiThrLow = 7,
81204582f2SAdrian Chadd .period = 100,
82204582f2SAdrian Chadd };
83423c974cSAdrian Chadd
84*328df6daSJose Luis Duran /* NB: disable ANI noise immunity for reliable RIFS rx */
85241d9a34SAdrian Chadd AH5416(ah)->ah_ani_function &= ~(1 << HAL_ANI_NOISE_IMMUNITY_LEVEL);
86423c974cSAdrian Chadd ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE);
87204582f2SAdrian Chadd }
88204582f2SAdrian Chadd
8964d6d2d3SAdrian Chadd static void
ar9160InitPLL(struct ath_hal * ah,const struct ieee80211_channel * chan)9064d6d2d3SAdrian Chadd ar9160InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
9164d6d2d3SAdrian Chadd {
9264d6d2d3SAdrian Chadd uint32_t pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV);
9364d6d2d3SAdrian Chadd if (chan != AH_NULL) {
9464d6d2d3SAdrian Chadd if (IEEE80211_IS_CHAN_HALF(chan))
9564d6d2d3SAdrian Chadd pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL);
9664d6d2d3SAdrian Chadd else if (IEEE80211_IS_CHAN_QUARTER(chan))
9764d6d2d3SAdrian Chadd pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL);
9864d6d2d3SAdrian Chadd
9964d6d2d3SAdrian Chadd if (IEEE80211_IS_CHAN_5GHZ(chan))
10064d6d2d3SAdrian Chadd pll |= SM(0x50, AR_RTC_SOWL_PLL_DIV);
10164d6d2d3SAdrian Chadd else
10264d6d2d3SAdrian Chadd pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV);
10364d6d2d3SAdrian Chadd } else
10464d6d2d3SAdrian Chadd pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV);
10564d6d2d3SAdrian Chadd
10664d6d2d3SAdrian Chadd OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
10764d6d2d3SAdrian Chadd OS_DELAY(RTC_PLL_SETTLE_DELAY);
10864d6d2d3SAdrian Chadd OS_REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_SLEEP_DERIVED_CLK);
10964d6d2d3SAdrian Chadd }
11064d6d2d3SAdrian Chadd
111204582f2SAdrian Chadd /*
112204582f2SAdrian Chadd * Attach for an AR9160 part.
113204582f2SAdrian Chadd */
114204582f2SAdrian Chadd static struct ath_hal *
ar9160Attach(uint16_t devid,HAL_SOFTC sc,HAL_BUS_TAG st,HAL_BUS_HANDLE sh,uint16_t * eepromdata,HAL_OPS_CONFIG * ah_config,HAL_STATUS * status)115204582f2SAdrian Chadd ar9160Attach(uint16_t devid, HAL_SOFTC sc,
116204582f2SAdrian Chadd HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
1179389d5a9SAdrian Chadd HAL_OPS_CONFIG *ah_config,
118204582f2SAdrian Chadd HAL_STATUS *status)
119204582f2SAdrian Chadd {
120204582f2SAdrian Chadd struct ath_hal_5416 *ahp5416;
121204582f2SAdrian Chadd struct ath_hal_5212 *ahp;
122204582f2SAdrian Chadd struct ath_hal *ah;
123204582f2SAdrian Chadd uint32_t val;
124204582f2SAdrian Chadd HAL_STATUS ecode;
125204582f2SAdrian Chadd HAL_BOOL rfStatus;
126204582f2SAdrian Chadd
1270e56140aSAdrian Chadd HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
128204582f2SAdrian Chadd __func__, sc, (void*) st, (void*) sh);
129204582f2SAdrian Chadd
130204582f2SAdrian Chadd /* NB: memory is returned zero'd */
131204582f2SAdrian Chadd ahp5416 = ath_hal_malloc(sizeof (struct ath_hal_5416));
132204582f2SAdrian Chadd if (ahp5416 == AH_NULL) {
1330e56140aSAdrian Chadd HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
134204582f2SAdrian Chadd "%s: cannot allocate memory for state block\n", __func__);
135204582f2SAdrian Chadd *status = HAL_ENOMEM;
136204582f2SAdrian Chadd return AH_NULL;
137204582f2SAdrian Chadd }
138204582f2SAdrian Chadd ar5416InitState(ahp5416, devid, sc, st, sh, status);
139204582f2SAdrian Chadd ahp = &ahp5416->ah_5212;
140204582f2SAdrian Chadd ah = &ahp->ah_priv.h;
141204582f2SAdrian Chadd
142204582f2SAdrian Chadd /* XXX override with 9160 specific state */
143204582f2SAdrian Chadd /* override 5416 methods for our needs */
14464d6d2d3SAdrian Chadd AH5416(ah)->ah_initPLL = ar9160InitPLL;
145204582f2SAdrian Chadd
146204582f2SAdrian Chadd AH5416(ah)->ah_cal.iqCalData.calData = &ar9160_iq_cal;
147204582f2SAdrian Chadd AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9160_adc_gain_cal;
148204582f2SAdrian Chadd AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9160_adc_dc_cal;
149204582f2SAdrian Chadd AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9160_adc_init_dc_cal;
150204582f2SAdrian Chadd AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL;
151204582f2SAdrian Chadd
152204582f2SAdrian Chadd if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) {
153204582f2SAdrian Chadd /* reset chip */
154204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n",
155204582f2SAdrian Chadd __func__);
156204582f2SAdrian Chadd ecode = HAL_EIO;
157204582f2SAdrian Chadd goto bad;
158204582f2SAdrian Chadd }
159204582f2SAdrian Chadd
160204582f2SAdrian Chadd if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {
161204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",
162204582f2SAdrian Chadd __func__);
163204582f2SAdrian Chadd ecode = HAL_EIO;
164204582f2SAdrian Chadd goto bad;
165204582f2SAdrian Chadd }
166204582f2SAdrian Chadd /* Read Revisions from Chips before taking out of reset */
167204582f2SAdrian Chadd val = OS_REG_READ(ah, AR_SREV);
168204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ATTACH,
169204582f2SAdrian Chadd "%s: ID 0x%x VERSION 0x%x TYPE 0x%x REVISION 0x%x\n",
170204582f2SAdrian Chadd __func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),
171204582f2SAdrian Chadd MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));
172204582f2SAdrian Chadd /* NB: include chip type to differentiate from pre-Sowl versions */
173204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_macVersion =
174204582f2SAdrian Chadd (val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;
175204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
176204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
177204582f2SAdrian Chadd
178204582f2SAdrian Chadd /* setup common ini data; rf backends handle remainder */
179204582f2SAdrian Chadd HAL_INI_INIT(&ahp->ah_ini_modes, ar9160Modes, 6);
180204582f2SAdrian Chadd HAL_INI_INIT(&ahp->ah_ini_common, ar9160Common, 2);
181204582f2SAdrian Chadd
182204582f2SAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_bb_rfgain, ar9160BB_RfGain, 3);
183204582f2SAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_bank0, ar9160Bank0, 2);
184204582f2SAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_bank1, ar9160Bank1, 2);
185204582f2SAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_bank2, ar9160Bank2, 2);
186204582f2SAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_bank3, ar9160Bank3, 3);
1878b470f6fSAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_bank6, ar9160Bank6TPC, 3);
188204582f2SAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_bank7, ar9160Bank7, 2);
189204582f2SAdrian Chadd if (AR_SREV_SOWL_11(ah))
190204582f2SAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac_1_1, 2);
191204582f2SAdrian Chadd else
192204582f2SAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac, 2);
193204582f2SAdrian Chadd
194204582f2SAdrian Chadd ecode = ath_hal_v14EepromAttach(ah);
195204582f2SAdrian Chadd if (ecode != HAL_OK)
196204582f2SAdrian Chadd goto bad;
197204582f2SAdrian Chadd
198204582f2SAdrian Chadd HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, ar9160PciePhy, 2);
199204582f2SAdrian Chadd ar5416AttachPCIE(ah);
200204582f2SAdrian Chadd
2018c01c3dcSAdrian Chadd if (!ar5416ChipReset(ah, AH_NULL, HAL_RESET_NORMAL)) { /* reset chip */
202204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
203204582f2SAdrian Chadd ecode = HAL_EIO;
204204582f2SAdrian Chadd goto bad;
205204582f2SAdrian Chadd }
206204582f2SAdrian Chadd
207204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
208204582f2SAdrian Chadd
209204582f2SAdrian Chadd if (!ar5212ChipTest(ah)) {
210204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
211204582f2SAdrian Chadd __func__);
212204582f2SAdrian Chadd ecode = HAL_ESELFTEST;
213204582f2SAdrian Chadd goto bad;
214204582f2SAdrian Chadd }
215204582f2SAdrian Chadd
216204582f2SAdrian Chadd /*
217204582f2SAdrian Chadd * Set correct Baseband to analog shift
218204582f2SAdrian Chadd * setting to access analog chips.
219204582f2SAdrian Chadd */
220204582f2SAdrian Chadd OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
221204582f2SAdrian Chadd
222204582f2SAdrian Chadd /* Read Radio Chip Rev Extract */
223204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah);
224204582f2SAdrian Chadd switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {
225204582f2SAdrian Chadd case AR_RAD2133_SREV_MAJOR: /* Sowl: 2G/3x3 */
226204582f2SAdrian Chadd case AR_RAD5133_SREV_MAJOR: /* Sowl: 2+5G/3x3 */
227204582f2SAdrian Chadd break;
228204582f2SAdrian Chadd default:
229204582f2SAdrian Chadd if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {
230204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_analog5GhzRev =
231204582f2SAdrian Chadd AR_RAD5133_SREV_MAJOR;
232204582f2SAdrian Chadd break;
233204582f2SAdrian Chadd }
234204582f2SAdrian Chadd #ifdef AH_DEBUG
235204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ANY,
236204582f2SAdrian Chadd "%s: 5G Radio Chip Rev 0x%02X is not supported by "
237204582f2SAdrian Chadd "this driver\n", __func__,
238204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_analog5GhzRev);
239204582f2SAdrian Chadd ecode = HAL_ENOTSUPP;
240204582f2SAdrian Chadd goto bad;
241204582f2SAdrian Chadd #endif
242204582f2SAdrian Chadd }
243204582f2SAdrian Chadd rfStatus = ar2133RfAttach(ah, &ecode);
244204582f2SAdrian Chadd if (!rfStatus) {
245204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",
246204582f2SAdrian Chadd __func__, ecode);
247204582f2SAdrian Chadd goto bad;
248204582f2SAdrian Chadd }
249204582f2SAdrian Chadd
250204582f2SAdrian Chadd /*
251204582f2SAdrian Chadd * Got everything we need now to setup the capabilities.
252204582f2SAdrian Chadd */
253204582f2SAdrian Chadd if (!ar9160FillCapabilityInfo(ah)) {
254204582f2SAdrian Chadd ecode = HAL_EEREAD;
255204582f2SAdrian Chadd goto bad;
256204582f2SAdrian Chadd }
257204582f2SAdrian Chadd
258204582f2SAdrian Chadd ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
259204582f2SAdrian Chadd if (ecode != HAL_OK) {
260204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ANY,
261204582f2SAdrian Chadd "%s: error getting mac address from EEPROM\n", __func__);
262204582f2SAdrian Chadd goto bad;
263204582f2SAdrian Chadd }
264204582f2SAdrian Chadd /* XXX How about the serial number ? */
265204582f2SAdrian Chadd /* Read Reg Domain */
266204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_currentRD =
267204582f2SAdrian Chadd ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL);
268f93ef551SAdrian Chadd AH_PRIVATE(ah)->ah_currentRDext =
269f93ef551SAdrian Chadd ath_hal_eepromGet(ah, AR_EEP_REGDMN_1, AH_NULL);
270204582f2SAdrian Chadd
271204582f2SAdrian Chadd /*
272204582f2SAdrian Chadd * ah_miscMode is populated by ar5416FillCapabilityInfo()
273204582f2SAdrian Chadd * starting from griffin. Set here to make sure that
274204582f2SAdrian Chadd * AR_MISC_MODE_MIC_NEW_LOC_ENABLE is set before a GTK is
275204582f2SAdrian Chadd * placed into hardware.
276204582f2SAdrian Chadd */
277204582f2SAdrian Chadd if (ahp->ah_miscMode != 0)
278299bb498SAdrian Chadd OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode);
279204582f2SAdrian Chadd
280204582f2SAdrian Chadd ar9160AniSetup(ah); /* Anti Noise Immunity */
281c6c9d8c8SAdrian Chadd
282c6c9d8c8SAdrian Chadd /* This just uses the AR5416 NF values */
283c6c9d8c8SAdrian Chadd AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ;
284c6c9d8c8SAdrian Chadd AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ;
285c6c9d8c8SAdrian Chadd AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_5416_2GHZ;
286c6c9d8c8SAdrian Chadd AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ;
287c6c9d8c8SAdrian Chadd AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ;
288c6c9d8c8SAdrian Chadd AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ;
289c6c9d8c8SAdrian Chadd
290204582f2SAdrian Chadd ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist);
291204582f2SAdrian Chadd
292204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
293204582f2SAdrian Chadd
294204582f2SAdrian Chadd return ah;
295204582f2SAdrian Chadd bad:
296204582f2SAdrian Chadd if (ahp)
297204582f2SAdrian Chadd ar5416Detach((struct ath_hal *) ahp);
298204582f2SAdrian Chadd if (status)
299204582f2SAdrian Chadd *status = ecode;
300204582f2SAdrian Chadd return AH_NULL;
301204582f2SAdrian Chadd }
302204582f2SAdrian Chadd
303204582f2SAdrian Chadd /*
304204582f2SAdrian Chadd * Fill all software cached or static hardware state information.
305204582f2SAdrian Chadd * Return failure if capabilities are to come from EEPROM and
306204582f2SAdrian Chadd * cannot be read.
307204582f2SAdrian Chadd */
308204582f2SAdrian Chadd static HAL_BOOL
ar9160FillCapabilityInfo(struct ath_hal * ah)309204582f2SAdrian Chadd ar9160FillCapabilityInfo(struct ath_hal *ah)
310204582f2SAdrian Chadd {
311204582f2SAdrian Chadd HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps;
312204582f2SAdrian Chadd
313204582f2SAdrian Chadd if (!ar5416FillCapabilityInfo(ah))
314204582f2SAdrian Chadd return AH_FALSE;
315204582f2SAdrian Chadd pCap->halCSTSupport = AH_TRUE;
316204582f2SAdrian Chadd pCap->halRifsRxSupport = AH_TRUE;
317204582f2SAdrian Chadd pCap->halRifsTxSupport = AH_TRUE;
318204582f2SAdrian Chadd pCap->halRtsAggrLimit = 64*1024; /* 802.11n max */
319204582f2SAdrian Chadd pCap->halExtChanDfsSupport = AH_TRUE;
3202cb5233bSAdrian Chadd pCap->halUseCombinedRadarRssi = AH_TRUE;
321204582f2SAdrian Chadd pCap->halAutoSleepSupport = AH_FALSE; /* XXX? */
32226e8415dSAdrian Chadd pCap->halMbssidAggrSupport = AH_TRUE;
32326e8415dSAdrian Chadd pCap->hal4AddrAggrSupport = AH_TRUE;
32446614948SAdrian Chadd /* BB Read WAR */
32546614948SAdrian Chadd pCap->halHasBBReadWar = AH_TRUE;
32626e8415dSAdrian Chadd
32794d748d2SAdrian Chadd /* AR9160 is a 2x2 stream device */
32894d748d2SAdrian Chadd pCap->halTxStreams = 2;
32994d748d2SAdrian Chadd pCap->halRxStreams = 2;
33094d748d2SAdrian Chadd
331204582f2SAdrian Chadd return AH_TRUE;
332204582f2SAdrian Chadd }
333204582f2SAdrian Chadd
334204582f2SAdrian Chadd static const char*
ar9160Probe(uint16_t vendorid,uint16_t devid)335204582f2SAdrian Chadd ar9160Probe(uint16_t vendorid, uint16_t devid)
336204582f2SAdrian Chadd {
337204582f2SAdrian Chadd if (vendorid == ATHEROS_VENDOR_ID && devid == AR9160_DEVID_PCI)
338204582f2SAdrian Chadd return "Atheros 9160";
339204582f2SAdrian Chadd return AH_NULL;
340204582f2SAdrian Chadd }
341204582f2SAdrian Chadd AH_CHIP(AR9160, ar9160Probe, ar9160Attach);
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