xref: /freebsd/sys/dev/otus/if_otus.c (revision 7067450010931479f8dd97e51e4c5bf6a4d34c7e)
19be4c8d0SPedro F. Giffuni /*	$OpenBSD: if_otus.c,v 1.49 2015/11/24 13:33:18 mpi Exp $	*/
2a9fcb51fSAdrian Chadd 
3a9fcb51fSAdrian Chadd /*-
4a9fcb51fSAdrian Chadd  * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
5a9fcb51fSAdrian Chadd  * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org>
6a9fcb51fSAdrian Chadd  *
7a9fcb51fSAdrian Chadd  * Permission to use, copy, modify, and distribute this software for any
8a9fcb51fSAdrian Chadd  * purpose with or without fee is hereby granted, provided that the above
9a9fcb51fSAdrian Chadd  * copyright notice and this permission notice appear in all copies.
10a9fcb51fSAdrian Chadd  *
11a9fcb51fSAdrian Chadd  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12a9fcb51fSAdrian Chadd  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13a9fcb51fSAdrian Chadd  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14a9fcb51fSAdrian Chadd  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15a9fcb51fSAdrian Chadd  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16a9fcb51fSAdrian Chadd  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17a9fcb51fSAdrian Chadd  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18a9fcb51fSAdrian Chadd  */
19a9fcb51fSAdrian Chadd 
20a9fcb51fSAdrian Chadd /*
21a9fcb51fSAdrian Chadd  * Driver for Atheros AR9001U chipset.
22a9fcb51fSAdrian Chadd  */
23a9fcb51fSAdrian Chadd 
24a9fcb51fSAdrian Chadd #include <sys/cdefs.h>
25c74d4747SAdrian Chadd #include "opt_wlan.h"
26c74d4747SAdrian Chadd 
27a9fcb51fSAdrian Chadd #include <sys/param.h>
28a9fcb51fSAdrian Chadd #include <sys/endian.h>
29a9fcb51fSAdrian Chadd #include <sys/sockio.h>
30a9fcb51fSAdrian Chadd #include <sys/mbuf.h>
31a9fcb51fSAdrian Chadd #include <sys/kernel.h>
328ec07310SGleb Smirnoff #include <sys/malloc.h>
33a9fcb51fSAdrian Chadd #include <sys/socket.h>
34a9fcb51fSAdrian Chadd #include <sys/systm.h>
35a9fcb51fSAdrian Chadd #include <sys/conf.h>
36a9fcb51fSAdrian Chadd #include <sys/bus.h>
37a9fcb51fSAdrian Chadd #include <sys/rman.h>
38a9fcb51fSAdrian Chadd #include <sys/firmware.h>
39a9fcb51fSAdrian Chadd #include <sys/module.h>
40a9fcb51fSAdrian Chadd #include <sys/taskqueue.h>
41a9fcb51fSAdrian Chadd 
42a9fcb51fSAdrian Chadd #include <machine/bus.h>
43a9fcb51fSAdrian Chadd #include <machine/resource.h>
44a9fcb51fSAdrian Chadd 
45a9fcb51fSAdrian Chadd #include <net/bpf.h>
46a9fcb51fSAdrian Chadd #include <net/if.h>
47a9fcb51fSAdrian Chadd #include <net/if_var.h>
48a9fcb51fSAdrian Chadd #include <net/if_arp.h>
49a9fcb51fSAdrian Chadd #include <net/if_dl.h>
50a9fcb51fSAdrian Chadd #include <net/if_media.h>
51a9fcb51fSAdrian Chadd 
52a9fcb51fSAdrian Chadd #include <netinet/in.h>
53a9fcb51fSAdrian Chadd #include <netinet/in_systm.h>
54a9fcb51fSAdrian Chadd #include <netinet/in_var.h>
55a9fcb51fSAdrian Chadd #include <netinet/if_ether.h>
56a9fcb51fSAdrian Chadd #include <netinet/ip.h>
57a9fcb51fSAdrian Chadd 
58a9fcb51fSAdrian Chadd #include <net80211/ieee80211_var.h>
59a9fcb51fSAdrian Chadd #include <net80211/ieee80211_regdomain.h>
60a9fcb51fSAdrian Chadd #include <net80211/ieee80211_radiotap.h>
61a9fcb51fSAdrian Chadd #include <net80211/ieee80211_ratectl.h>
62c74d4747SAdrian Chadd #ifdef	IEEE80211_SUPPORT_SUPERG
63c74d4747SAdrian Chadd #include <net80211/ieee80211_superg.h>
64c74d4747SAdrian Chadd #endif
65a9fcb51fSAdrian Chadd 
66a9fcb51fSAdrian Chadd #include <dev/usb/usb.h>
67a9fcb51fSAdrian Chadd #include <dev/usb/usbdi.h>
68a9fcb51fSAdrian Chadd #include "usbdevs.h"
69a9fcb51fSAdrian Chadd 
70a9fcb51fSAdrian Chadd #define USB_DEBUG_VAR otus_debug
71a9fcb51fSAdrian Chadd #include <dev/usb/usb_debug.h>
72a9fcb51fSAdrian Chadd 
73a9fcb51fSAdrian Chadd #include "if_otusreg.h"
74a9fcb51fSAdrian Chadd 
75a9fcb51fSAdrian Chadd static int otus_debug = 0;
7608f5e6bbSPawel Biernacki static SYSCTL_NODE(_hw_usb, OID_AUTO, otus, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
7708f5e6bbSPawel Biernacki     "USB otus");
78a9fcb51fSAdrian Chadd SYSCTL_INT(_hw_usb_otus, OID_AUTO, debug, CTLFLAG_RWTUN, &otus_debug, 0,
79a9fcb51fSAdrian Chadd     "Debug level");
80a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_XMIT		0x00000001
81a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_RECV		0x00000002
82a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_TXDONE	0x00000004
83a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_RXDONE	0x00000008
84a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_CMD		0x00000010
85a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_CMDDONE	0x00000020
86a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_RESET	0x00000040
87a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_STATE	0x00000080
88a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_CMDNOTIFY	0x00000100
89a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_REGIO	0x00000200
90a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_IRQ		0x00000400
91a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_TXCOMP	0x00000800
9253652fb9SAdrian Chadd #define	OTUS_DEBUG_RX_BUFFER	0x00001000
93a9fcb51fSAdrian Chadd #define	OTUS_DEBUG_ANY		0xffffffff
94a9fcb51fSAdrian Chadd 
95a9fcb51fSAdrian Chadd #define	OTUS_DPRINTF(sc, dm, ...) \
96a9fcb51fSAdrian Chadd 	do { \
97a9fcb51fSAdrian Chadd 		if ((dm == OTUS_DEBUG_ANY) || (dm & otus_debug)) \
98a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev, __VA_ARGS__); \
99a9fcb51fSAdrian Chadd 	} while (0)
100a9fcb51fSAdrian Chadd #define	OTUS_DEV(v, p) { USB_VPI(v, p, 0) }
101a9fcb51fSAdrian Chadd static const STRUCT_USB_HOST_ID otus_devs[] = {
102a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ACCTON,		USB_PRODUCT_ACCTON_WN7512),
103a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ATHEROS2,		USB_PRODUCT_ATHEROS2_3CRUSBN275),
104a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ATHEROS2,		USB_PRODUCT_ATHEROS2_TG121N),
105a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ATHEROS2,		USB_PRODUCT_ATHEROS2_AR9170),
106a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ATHEROS2,		USB_PRODUCT_ATHEROS2_WN612),
107a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ATHEROS2,		USB_PRODUCT_ATHEROS2_WN821NV2),
108a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_AVM,		USB_PRODUCT_AVM_FRITZWLAN),
109a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_CACE,		USB_PRODUCT_CACE_AIRPCAPNX),
110a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DWA130D1),
111a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DWA160A1),
112a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DWA160A2),
113a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_IODATA,		USB_PRODUCT_IODATA_WNGDNUS2),
114a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_NEC,		USB_PRODUCT_NEC_WL300NUG),
115a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_NETGEAR,		USB_PRODUCT_NETGEAR_WN111V2),
116a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_NETGEAR,		USB_PRODUCT_NETGEAR_WNA1000),
117a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_NETGEAR,		USB_PRODUCT_NETGEAR_WNDA3100),
118a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_PLANEX2,		USB_PRODUCT_PLANEX2_GW_US300),
119a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_WISTRONNEWEB,	USB_PRODUCT_WISTRONNEWEB_O8494),
120a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_WISTRONNEWEB,	USB_PRODUCT_WISTRONNEWEB_WNC0600),
121a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ZCOM,		USB_PRODUCT_ZCOM_UB81),
122a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ZCOM,		USB_PRODUCT_ZCOM_UB82),
123a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ZYDAS,		USB_PRODUCT_ZYDAS_ZD1221),
124a9fcb51fSAdrian Chadd 	OTUS_DEV(USB_VENDOR_ZYXEL,		USB_PRODUCT_ZYXEL_NWD271N),
125a9fcb51fSAdrian Chadd };
126a9fcb51fSAdrian Chadd 
127a9fcb51fSAdrian Chadd static device_probe_t otus_match;
128a9fcb51fSAdrian Chadd static device_attach_t otus_attach;
129a9fcb51fSAdrian Chadd static device_detach_t otus_detach;
130a9fcb51fSAdrian Chadd 
131a9fcb51fSAdrian Chadd static int	otus_attachhook(struct otus_softc *);
1327f145abaSAndriy Voskoboinyk static void	otus_getradiocaps(struct ieee80211com *, int, int *,
1337f145abaSAndriy Voskoboinyk 		    struct ieee80211_channel[]);
134a9fcb51fSAdrian Chadd int		otus_load_firmware(struct otus_softc *, const char *,
135a9fcb51fSAdrian Chadd 		    uint32_t);
136a9fcb51fSAdrian Chadd int		otus_open_pipes(struct otus_softc *);
137a9fcb51fSAdrian Chadd void		otus_close_pipes(struct otus_softc *);
138a9fcb51fSAdrian Chadd 
139a9fcb51fSAdrian Chadd static int	otus_alloc_tx_cmd_list(struct otus_softc *);
140a9fcb51fSAdrian Chadd static void	otus_free_tx_cmd_list(struct otus_softc *);
141a9fcb51fSAdrian Chadd 
142a9fcb51fSAdrian Chadd static int	otus_alloc_rx_list(struct otus_softc *);
143a9fcb51fSAdrian Chadd static void	otus_free_rx_list(struct otus_softc *);
144a9fcb51fSAdrian Chadd static int	otus_alloc_tx_list(struct otus_softc *);
145a9fcb51fSAdrian Chadd static void	otus_free_tx_list(struct otus_softc *);
146a9fcb51fSAdrian Chadd static void	otus_free_list(struct otus_softc *, struct otus_data [], int);
147a9fcb51fSAdrian Chadd static struct otus_data *_otus_getbuf(struct otus_softc *);
148a9fcb51fSAdrian Chadd static struct otus_data *otus_getbuf(struct otus_softc *);
149a9fcb51fSAdrian Chadd static void	otus_freebuf(struct otus_softc *, struct otus_data *);
150a9fcb51fSAdrian Chadd 
151a9fcb51fSAdrian Chadd static struct otus_tx_cmd *_otus_get_txcmd(struct otus_softc *);
152a9fcb51fSAdrian Chadd static struct otus_tx_cmd *otus_get_txcmd(struct otus_softc *);
153a9fcb51fSAdrian Chadd static void	otus_free_txcmd(struct otus_softc *, struct otus_tx_cmd *);
154a9fcb51fSAdrian Chadd 
155a9fcb51fSAdrian Chadd void		otus_next_scan(void *, int);
156a9fcb51fSAdrian Chadd static void	otus_tx_task(void *, int pending);
157a9fcb51fSAdrian Chadd void		otus_do_async(struct otus_softc *,
158a9fcb51fSAdrian Chadd 		    void (*)(struct otus_softc *, void *), void *, int);
159a9fcb51fSAdrian Chadd int		otus_newstate(struct ieee80211vap *, enum ieee80211_state,
160a9fcb51fSAdrian Chadd 		    int);
161a9fcb51fSAdrian Chadd int		otus_cmd(struct otus_softc *, uint8_t, const void *, int,
162c4dabdf7SAdrian Chadd 		    void *, int);
163a9fcb51fSAdrian Chadd void		otus_write(struct otus_softc *, uint32_t, uint32_t);
164a9fcb51fSAdrian Chadd int		otus_write_barrier(struct otus_softc *);
16502b3773aSAdrian Chadd static struct	ieee80211_node *otus_node_alloc(struct ieee80211vap *vap,
16602b3773aSAdrian Chadd 		    const uint8_t mac[IEEE80211_ADDR_LEN]);
167a9fcb51fSAdrian Chadd int		otus_read_eeprom(struct otus_softc *);
168a9fcb51fSAdrian Chadd void		otus_newassoc(struct ieee80211_node *, int);
169a9fcb51fSAdrian Chadd void		otus_cmd_rxeof(struct otus_softc *, uint8_t *, int);
170a9fcb51fSAdrian Chadd void		otus_sub_rxeof(struct otus_softc *, uint8_t *, int,
171a9fcb51fSAdrian Chadd 		    struct mbufq *);
172a9fcb51fSAdrian Chadd static int	otus_tx(struct otus_softc *, struct ieee80211_node *,
1735433f357SAdrian Chadd 		    struct mbuf *, struct otus_data *,
1745433f357SAdrian Chadd 		    const struct ieee80211_bpf_params *);
175ec22a3a2SJustin Hibbits int		otus_ioctl(if_t, u_long, caddr_t);
176a9fcb51fSAdrian Chadd int		otus_set_multi(struct otus_softc *);
177a14954c5SAndriy Voskoboinyk static int	otus_updateedca(struct ieee80211com *);
178a14954c5SAndriy Voskoboinyk static void	otus_updateedca_locked(struct otus_softc *);
179a14954c5SAndriy Voskoboinyk static void	otus_updateslot(struct otus_softc *);
180b35978d0SAdrian Chadd static void	otus_set_operating_mode(struct otus_softc *sc);
181b35978d0SAdrian Chadd static void	otus_set_rx_filter(struct otus_softc *sc);
182a9fcb51fSAdrian Chadd int		otus_init_mac(struct otus_softc *);
183a9fcb51fSAdrian Chadd uint32_t	otus_phy_get_def(struct otus_softc *, uint32_t);
184a9fcb51fSAdrian Chadd int		otus_set_board_values(struct otus_softc *,
185a9fcb51fSAdrian Chadd 		    struct ieee80211_channel *);
186a9fcb51fSAdrian Chadd int		otus_program_phy(struct otus_softc *,
187a9fcb51fSAdrian Chadd 		    struct ieee80211_channel *);
188a9fcb51fSAdrian Chadd int		otus_set_rf_bank4(struct otus_softc *,
189a9fcb51fSAdrian Chadd 		    struct ieee80211_channel *);
190a9fcb51fSAdrian Chadd void		otus_get_delta_slope(uint32_t, uint32_t *, uint32_t *);
191a9fcb51fSAdrian Chadd static int	otus_set_chan(struct otus_softc *, struct ieee80211_channel *,
192a9fcb51fSAdrian Chadd 		    int);
193a9fcb51fSAdrian Chadd int		otus_set_key(struct ieee80211com *, struct ieee80211_node *,
194a9fcb51fSAdrian Chadd 		    struct ieee80211_key *);
195a9fcb51fSAdrian Chadd void		otus_set_key_cb(struct otus_softc *, void *);
196a9fcb51fSAdrian Chadd void		otus_delete_key(struct ieee80211com *, struct ieee80211_node *,
197a9fcb51fSAdrian Chadd 		    struct ieee80211_key *);
198a9fcb51fSAdrian Chadd void		otus_delete_key_cb(struct otus_softc *, void *);
199a9fcb51fSAdrian Chadd void		otus_calibrate_to(void *, int);
200a9fcb51fSAdrian Chadd int		otus_set_bssid(struct otus_softc *, const uint8_t *);
201a9fcb51fSAdrian Chadd int		otus_set_macaddr(struct otus_softc *, const uint8_t *);
202a9fcb51fSAdrian Chadd void		otus_led_newstate_type1(struct otus_softc *);
203a9fcb51fSAdrian Chadd void		otus_led_newstate_type2(struct otus_softc *);
204a9fcb51fSAdrian Chadd void		otus_led_newstate_type3(struct otus_softc *);
205a9fcb51fSAdrian Chadd int		otus_init(struct otus_softc *sc);
206a9fcb51fSAdrian Chadd void		otus_stop(struct otus_softc *sc);
207a9fcb51fSAdrian Chadd 
208a9fcb51fSAdrian Chadd static device_method_t otus_methods[] = {
209a9fcb51fSAdrian Chadd 	DEVMETHOD(device_probe,		otus_match),
210a9fcb51fSAdrian Chadd 	DEVMETHOD(device_attach,	otus_attach),
211a9fcb51fSAdrian Chadd 	DEVMETHOD(device_detach,	otus_detach),
212a9fcb51fSAdrian Chadd 
213a9fcb51fSAdrian Chadd 	DEVMETHOD_END
214a9fcb51fSAdrian Chadd };
215a9fcb51fSAdrian Chadd 
216a9fcb51fSAdrian Chadd static driver_t otus_driver = {
217a9fcb51fSAdrian Chadd 	.name = "otus",
218a9fcb51fSAdrian Chadd 	.methods = otus_methods,
219a9fcb51fSAdrian Chadd 	.size = sizeof(struct otus_softc)
220a9fcb51fSAdrian Chadd };
221a9fcb51fSAdrian Chadd 
2221262e017SJohn Baldwin DRIVER_MODULE(otus, uhub, otus_driver, NULL, NULL);
223a9fcb51fSAdrian Chadd MODULE_DEPEND(otus, wlan, 1, 1, 1);
224a9fcb51fSAdrian Chadd MODULE_DEPEND(otus, usb, 1, 1, 1);
225a9fcb51fSAdrian Chadd MODULE_DEPEND(otus, firmware, 1, 1, 1);
226a9fcb51fSAdrian Chadd MODULE_VERSION(otus, 1);
227a9fcb51fSAdrian Chadd 
228a9fcb51fSAdrian Chadd static usb_callback_t	otus_bulk_tx_callback;
229a9fcb51fSAdrian Chadd static usb_callback_t	otus_bulk_rx_callback;
230a9fcb51fSAdrian Chadd static usb_callback_t	otus_bulk_irq_callback;
231a9fcb51fSAdrian Chadd static usb_callback_t	otus_bulk_cmd_callback;
232a9fcb51fSAdrian Chadd 
233a9fcb51fSAdrian Chadd static const struct usb_config otus_config[OTUS_N_XFER] = {
234a9fcb51fSAdrian Chadd 	[OTUS_BULK_TX] = {
235a9fcb51fSAdrian Chadd 	.type = UE_BULK,
236a9fcb51fSAdrian Chadd 	.endpoint = UE_ADDR_ANY,
237a9fcb51fSAdrian Chadd 	.direction = UE_DIR_OUT,
238a9fcb51fSAdrian Chadd 	.bufsize = 0x200,
239a9fcb51fSAdrian Chadd 	.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
240a9fcb51fSAdrian Chadd 	.callback = otus_bulk_tx_callback,
241a9fcb51fSAdrian Chadd 	.timeout = 5000,	/* ms */
242a9fcb51fSAdrian Chadd 	},
243a9fcb51fSAdrian Chadd 	[OTUS_BULK_RX] = {
244a9fcb51fSAdrian Chadd 	.type = UE_BULK,
245a9fcb51fSAdrian Chadd 	.endpoint = UE_ADDR_ANY,
246a9fcb51fSAdrian Chadd 	.direction = UE_DIR_IN,
247a9fcb51fSAdrian Chadd 	.bufsize = OTUS_RXBUFSZ,
248a9fcb51fSAdrian Chadd 	.flags = { .ext_buffer = 1, .pipe_bof = 1,.short_xfer_ok = 1,},
249a9fcb51fSAdrian Chadd 	.callback = otus_bulk_rx_callback,
250a9fcb51fSAdrian Chadd 	},
251a9fcb51fSAdrian Chadd 	[OTUS_BULK_IRQ] = {
252a9fcb51fSAdrian Chadd 	.type = UE_INTERRUPT,
253a9fcb51fSAdrian Chadd 	.endpoint = UE_ADDR_ANY,
254a9fcb51fSAdrian Chadd 	.direction = UE_DIR_IN,
255a9fcb51fSAdrian Chadd 	.bufsize = OTUS_MAX_CTRLSZ,
256a9fcb51fSAdrian Chadd 	.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
257a9fcb51fSAdrian Chadd 	.callback = otus_bulk_irq_callback,
258a9fcb51fSAdrian Chadd 	},
259a9fcb51fSAdrian Chadd 	[OTUS_BULK_CMD] = {
260a9fcb51fSAdrian Chadd 	.type = UE_INTERRUPT,
261a9fcb51fSAdrian Chadd 	.endpoint = UE_ADDR_ANY,
262a9fcb51fSAdrian Chadd 	.direction = UE_DIR_OUT,
263a9fcb51fSAdrian Chadd 	.bufsize = OTUS_MAX_CTRLSZ,
264a9fcb51fSAdrian Chadd 	.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
265a9fcb51fSAdrian Chadd 	.callback = otus_bulk_cmd_callback,
266a9fcb51fSAdrian Chadd 	.timeout = 5000,	/* ms */
267a9fcb51fSAdrian Chadd 	},
268a9fcb51fSAdrian Chadd };
269a9fcb51fSAdrian Chadd 
270a9fcb51fSAdrian Chadd static int
otus_match(device_t self)271a9fcb51fSAdrian Chadd otus_match(device_t self)
272a9fcb51fSAdrian Chadd {
273a9fcb51fSAdrian Chadd 	struct usb_attach_arg *uaa = device_get_ivars(self);
274a9fcb51fSAdrian Chadd 
275a9fcb51fSAdrian Chadd 	if (uaa->usb_mode != USB_MODE_HOST ||
276a9fcb51fSAdrian Chadd 	    uaa->info.bIfaceIndex != 0 ||
277a9fcb51fSAdrian Chadd 	    uaa->info.bConfigIndex != 0)
278a9fcb51fSAdrian Chadd 	return (ENXIO);
279a9fcb51fSAdrian Chadd 
280a9fcb51fSAdrian Chadd 	return (usbd_lookup_id_by_uaa(otus_devs, sizeof(otus_devs), uaa));
281a9fcb51fSAdrian Chadd }
282a9fcb51fSAdrian Chadd 
283a9fcb51fSAdrian Chadd static int
otus_attach(device_t self)284a9fcb51fSAdrian Chadd otus_attach(device_t self)
285a9fcb51fSAdrian Chadd {
286a9fcb51fSAdrian Chadd 	struct usb_attach_arg *uaa = device_get_ivars(self);
287a9fcb51fSAdrian Chadd 	struct otus_softc *sc = device_get_softc(self);
288a9fcb51fSAdrian Chadd 	int error;
289a9fcb51fSAdrian Chadd 	uint8_t iface_index;
290a9fcb51fSAdrian Chadd 
291a9fcb51fSAdrian Chadd 	device_set_usb_desc(self);
292a9fcb51fSAdrian Chadd 	sc->sc_udev = uaa->device;
293a9fcb51fSAdrian Chadd 	sc->sc_dev = self;
294a9fcb51fSAdrian Chadd 
295a9fcb51fSAdrian Chadd 	mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK,
296a9fcb51fSAdrian Chadd 	    MTX_DEF);
297a9fcb51fSAdrian Chadd 
298a9fcb51fSAdrian Chadd 	TIMEOUT_TASK_INIT(taskqueue_thread, &sc->scan_to, 0, otus_next_scan, sc);
299a9fcb51fSAdrian Chadd 	TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_to, 0, otus_calibrate_to, sc);
300a9fcb51fSAdrian Chadd 	TASK_INIT(&sc->tx_task, 0, otus_tx_task, sc);
301a9fcb51fSAdrian Chadd 	mbufq_init(&sc->sc_snd, ifqmaxlen);
302a9fcb51fSAdrian Chadd 
303a9fcb51fSAdrian Chadd 	iface_index = 0;
304a9fcb51fSAdrian Chadd 	error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
305a9fcb51fSAdrian Chadd 	    otus_config, OTUS_N_XFER, sc, &sc->sc_mtx);
306a9fcb51fSAdrian Chadd 	if (error) {
307a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
308a9fcb51fSAdrian Chadd 		    "could not allocate USB transfers, err=%s\n",
309a9fcb51fSAdrian Chadd 		    usbd_errstr(error));
310a9fcb51fSAdrian Chadd 		goto fail_usb;
311a9fcb51fSAdrian Chadd 	}
312a9fcb51fSAdrian Chadd 
313a9fcb51fSAdrian Chadd 	if ((error = otus_open_pipes(sc)) != 0) {
314a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev, "%s: could not open pipes\n",
315a9fcb51fSAdrian Chadd 		    __func__);
316a9fcb51fSAdrian Chadd 		goto fail;
317a9fcb51fSAdrian Chadd 	}
318a9fcb51fSAdrian Chadd 
319a9fcb51fSAdrian Chadd 	/* XXX check return status; fail out if appropriate */
320a9fcb51fSAdrian Chadd 	if (otus_attachhook(sc) != 0)
321a9fcb51fSAdrian Chadd 		goto fail;
322a9fcb51fSAdrian Chadd 
323a9fcb51fSAdrian Chadd 	return (0);
324a9fcb51fSAdrian Chadd 
325a9fcb51fSAdrian Chadd fail:
326a9fcb51fSAdrian Chadd 	otus_close_pipes(sc);
327a9fcb51fSAdrian Chadd fail_usb:
328a9fcb51fSAdrian Chadd 	mtx_destroy(&sc->sc_mtx);
329a9fcb51fSAdrian Chadd 	return (ENXIO);
330a9fcb51fSAdrian Chadd }
331a9fcb51fSAdrian Chadd 
332a9fcb51fSAdrian Chadd static int
otus_detach(device_t self)333a9fcb51fSAdrian Chadd otus_detach(device_t self)
334a9fcb51fSAdrian Chadd {
335a9fcb51fSAdrian Chadd 	struct otus_softc *sc = device_get_softc(self);
336a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
337a9fcb51fSAdrian Chadd 
338a9fcb51fSAdrian Chadd 	otus_stop(sc);
339a9fcb51fSAdrian Chadd 
340a9fcb51fSAdrian Chadd 	usbd_transfer_unsetup(sc->sc_xfer, OTUS_N_XFER);
341a9fcb51fSAdrian Chadd 
342a9fcb51fSAdrian Chadd 	taskqueue_drain_timeout(taskqueue_thread, &sc->scan_to);
343a9fcb51fSAdrian Chadd 	taskqueue_drain_timeout(taskqueue_thread, &sc->calib_to);
344a9fcb51fSAdrian Chadd 	taskqueue_drain(taskqueue_thread, &sc->tx_task);
345a9fcb51fSAdrian Chadd 
346c74d4747SAdrian Chadd 	otus_close_pipes(sc);
347a9fcb51fSAdrian Chadd #if 0
348a9fcb51fSAdrian Chadd 	/* Wait for all queued asynchronous commands to complete. */
349a9fcb51fSAdrian Chadd 	usb_rem_wait_task(sc->sc_udev, &sc->sc_task);
350a9fcb51fSAdrian Chadd 
351a9fcb51fSAdrian Chadd 	usbd_ref_wait(sc->sc_udev);
352a9fcb51fSAdrian Chadd #endif
353a9fcb51fSAdrian Chadd 
354a9fcb51fSAdrian Chadd 	ieee80211_ifdetach(ic);
355a9fcb51fSAdrian Chadd 	mtx_destroy(&sc->sc_mtx);
356a9fcb51fSAdrian Chadd 	return 0;
357a9fcb51fSAdrian Chadd }
358a9fcb51fSAdrian Chadd 
359a9fcb51fSAdrian Chadd static void
otus_delay_ms(struct otus_softc * sc,int ms)360a9fcb51fSAdrian Chadd otus_delay_ms(struct otus_softc *sc, int ms)
361a9fcb51fSAdrian Chadd {
362a9fcb51fSAdrian Chadd 
363a9fcb51fSAdrian Chadd 	DELAY(1000 * ms);
364a9fcb51fSAdrian Chadd }
365a9fcb51fSAdrian Chadd 
366a9fcb51fSAdrian Chadd static struct ieee80211vap *
otus_vap_create(struct ieee80211com * ic,const char name[IFNAMSIZ],int unit,enum ieee80211_opmode opmode,int flags,const uint8_t bssid[IEEE80211_ADDR_LEN],const uint8_t mac[IEEE80211_ADDR_LEN])367a9fcb51fSAdrian Chadd otus_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
368a9fcb51fSAdrian Chadd     enum ieee80211_opmode opmode, int flags,
369a9fcb51fSAdrian Chadd     const uint8_t bssid[IEEE80211_ADDR_LEN],
370a9fcb51fSAdrian Chadd     const uint8_t mac[IEEE80211_ADDR_LEN])
371a9fcb51fSAdrian Chadd {
372a9fcb51fSAdrian Chadd 	struct otus_vap *uvp;
373a9fcb51fSAdrian Chadd 	struct ieee80211vap *vap;
374a9fcb51fSAdrian Chadd 
375a9fcb51fSAdrian Chadd 	if (!TAILQ_EMPTY(&ic->ic_vaps))	 /* only one at a time */
376a9fcb51fSAdrian Chadd 		return (NULL);
377a9fcb51fSAdrian Chadd 
378a9fcb51fSAdrian Chadd 	uvp =  malloc(sizeof(struct otus_vap), M_80211_VAP, M_WAITOK | M_ZERO);
379a9fcb51fSAdrian Chadd 	vap = &uvp->vap;
380a9fcb51fSAdrian Chadd 
381a9fcb51fSAdrian Chadd 	if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
382a9fcb51fSAdrian Chadd 	    flags, bssid) != 0) {
383a9fcb51fSAdrian Chadd 		/* out of memory */
384a9fcb51fSAdrian Chadd 		free(uvp, M_80211_VAP);
385a9fcb51fSAdrian Chadd 		return (NULL);
386a9fcb51fSAdrian Chadd 	}
387a9fcb51fSAdrian Chadd 
388a9fcb51fSAdrian Chadd 	/* override state transition machine */
389a9fcb51fSAdrian Chadd 	uvp->newstate = vap->iv_newstate;
390a9fcb51fSAdrian Chadd 	vap->iv_newstate = otus_newstate;
391a9fcb51fSAdrian Chadd 
39253652fb9SAdrian Chadd 	vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_8;
39353652fb9SAdrian Chadd 	vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K;
394a9fcb51fSAdrian Chadd 
395a9fcb51fSAdrian Chadd 	ieee80211_ratectl_init(vap);
396a9fcb51fSAdrian Chadd 
397a9fcb51fSAdrian Chadd 	/* complete setup */
398a9fcb51fSAdrian Chadd 	ieee80211_vap_attach(vap, ieee80211_media_change,
399a9fcb51fSAdrian Chadd 	    ieee80211_media_status, mac);
400a9fcb51fSAdrian Chadd 	ic->ic_opmode = opmode;
401a9fcb51fSAdrian Chadd 
402a9fcb51fSAdrian Chadd 	return (vap);
403a9fcb51fSAdrian Chadd }
404a9fcb51fSAdrian Chadd 
405a9fcb51fSAdrian Chadd static void
otus_vap_delete(struct ieee80211vap * vap)406a9fcb51fSAdrian Chadd otus_vap_delete(struct ieee80211vap *vap)
407a9fcb51fSAdrian Chadd {
408a9fcb51fSAdrian Chadd 	struct otus_vap *uvp = OTUS_VAP(vap);
409a9fcb51fSAdrian Chadd 
410a9fcb51fSAdrian Chadd 	ieee80211_ratectl_deinit(vap);
411a9fcb51fSAdrian Chadd 	ieee80211_vap_detach(vap);
412a9fcb51fSAdrian Chadd 	free(uvp, M_80211_VAP);
413a9fcb51fSAdrian Chadd }
414a9fcb51fSAdrian Chadd 
415a9fcb51fSAdrian Chadd static void
otus_parent(struct ieee80211com * ic)416a9fcb51fSAdrian Chadd otus_parent(struct ieee80211com *ic)
417a9fcb51fSAdrian Chadd {
418a9fcb51fSAdrian Chadd 	struct otus_softc *sc = ic->ic_softc;
419a9fcb51fSAdrian Chadd 	int startall = 0;
420a9fcb51fSAdrian Chadd 
421a9fcb51fSAdrian Chadd 	if (ic->ic_nrunning > 0) {
422a9fcb51fSAdrian Chadd 		if (!sc->sc_running) {
423a9fcb51fSAdrian Chadd 			otus_init(sc);
424a9fcb51fSAdrian Chadd 			startall = 1;
425a9fcb51fSAdrian Chadd 		} else {
426a9fcb51fSAdrian Chadd 			(void) otus_set_multi(sc);
427a9fcb51fSAdrian Chadd 		}
428a9fcb51fSAdrian Chadd 	} else if (sc->sc_running)
429a9fcb51fSAdrian Chadd 		otus_stop(sc);
430a9fcb51fSAdrian Chadd 
431a9fcb51fSAdrian Chadd 	if (startall)
432a9fcb51fSAdrian Chadd 		ieee80211_start_all(ic);
433a9fcb51fSAdrian Chadd }
434a9fcb51fSAdrian Chadd 
435a9fcb51fSAdrian Chadd static void
otus_drain_mbufq(struct otus_softc * sc)436a9fcb51fSAdrian Chadd otus_drain_mbufq(struct otus_softc *sc)
437a9fcb51fSAdrian Chadd {
438a9fcb51fSAdrian Chadd 	struct mbuf *m;
439a9fcb51fSAdrian Chadd 	struct ieee80211_node *ni;
440a9fcb51fSAdrian Chadd 
441a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
442a9fcb51fSAdrian Chadd 	while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
443a9fcb51fSAdrian Chadd 		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
444a9fcb51fSAdrian Chadd 		m->m_pkthdr.rcvif = NULL;
445a9fcb51fSAdrian Chadd 		ieee80211_free_node(ni);
446a9fcb51fSAdrian Chadd 		m_freem(m);
447a9fcb51fSAdrian Chadd 	}
448a9fcb51fSAdrian Chadd }
449a9fcb51fSAdrian Chadd 
450a9fcb51fSAdrian Chadd static void
otus_tx_start(struct otus_softc * sc)451a9fcb51fSAdrian Chadd otus_tx_start(struct otus_softc *sc)
452a9fcb51fSAdrian Chadd {
453a9fcb51fSAdrian Chadd 
454a9fcb51fSAdrian Chadd 	taskqueue_enqueue(taskqueue_thread, &sc->tx_task);
455a9fcb51fSAdrian Chadd }
456a9fcb51fSAdrian Chadd 
457a9fcb51fSAdrian Chadd static int
otus_transmit(struct ieee80211com * ic,struct mbuf * m)458a9fcb51fSAdrian Chadd otus_transmit(struct ieee80211com *ic, struct mbuf *m)
459a9fcb51fSAdrian Chadd {
460a9fcb51fSAdrian Chadd 	struct otus_softc *sc = ic->ic_softc;
461a9fcb51fSAdrian Chadd 	int error;
462a9fcb51fSAdrian Chadd 
463a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
464a9fcb51fSAdrian Chadd 	if (! sc->sc_running) {
465a9fcb51fSAdrian Chadd 		OTUS_UNLOCK(sc);
466a9fcb51fSAdrian Chadd 		return (ENXIO);
467a9fcb51fSAdrian Chadd 	}
468a9fcb51fSAdrian Chadd 
469a9fcb51fSAdrian Chadd 	/* XXX TODO: handle fragments */
470a9fcb51fSAdrian Chadd 	error = mbufq_enqueue(&sc->sc_snd, m);
471a9fcb51fSAdrian Chadd 	if (error) {
472a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
473a9fcb51fSAdrian Chadd 		    "%s: mbufq_enqueue failed: %d\n",
474a9fcb51fSAdrian Chadd 		    __func__,
475a9fcb51fSAdrian Chadd 		    error);
476a9fcb51fSAdrian Chadd 		OTUS_UNLOCK(sc);
477a9fcb51fSAdrian Chadd 		return (error);
478a9fcb51fSAdrian Chadd 	}
479a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
480a9fcb51fSAdrian Chadd 
481a9fcb51fSAdrian Chadd 	/* Kick TX */
482a9fcb51fSAdrian Chadd 	otus_tx_start(sc);
483a9fcb51fSAdrian Chadd 
484a9fcb51fSAdrian Chadd 	return (0);
485a9fcb51fSAdrian Chadd }
486a9fcb51fSAdrian Chadd 
487a9fcb51fSAdrian Chadd static void
_otus_start(struct otus_softc * sc)488a9fcb51fSAdrian Chadd _otus_start(struct otus_softc *sc)
489a9fcb51fSAdrian Chadd {
490a9fcb51fSAdrian Chadd 	struct ieee80211_node *ni;
491a9fcb51fSAdrian Chadd 	struct otus_data *bf;
492a9fcb51fSAdrian Chadd 	struct mbuf *m;
493a9fcb51fSAdrian Chadd 
494a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
495a9fcb51fSAdrian Chadd 
496a9fcb51fSAdrian Chadd 	while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
497a9fcb51fSAdrian Chadd 		bf = otus_getbuf(sc);
498a9fcb51fSAdrian Chadd 		if (bf == NULL) {
499a9fcb51fSAdrian Chadd 			OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
500a9fcb51fSAdrian Chadd 			    "%s: failed to get buffer\n", __func__);
501a9fcb51fSAdrian Chadd 			mbufq_prepend(&sc->sc_snd, m);
502a9fcb51fSAdrian Chadd 			break;
503a9fcb51fSAdrian Chadd 		}
504a9fcb51fSAdrian Chadd 
505a9fcb51fSAdrian Chadd 		ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
506a9fcb51fSAdrian Chadd 		m->m_pkthdr.rcvif = NULL;
507a9fcb51fSAdrian Chadd 
5085433f357SAdrian Chadd 		if (otus_tx(sc, ni, m, bf, NULL) != 0) {
509a9fcb51fSAdrian Chadd 			OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
510a9fcb51fSAdrian Chadd 			    "%s: failed to transmit\n", __func__);
511a9fcb51fSAdrian Chadd 			if_inc_counter(ni->ni_vap->iv_ifp,
512a9fcb51fSAdrian Chadd 			    IFCOUNTER_OERRORS, 1);
513a9fcb51fSAdrian Chadd 			otus_freebuf(sc, bf);
514a9fcb51fSAdrian Chadd 			ieee80211_free_node(ni);
515a9fcb51fSAdrian Chadd 			m_freem(m);
516a9fcb51fSAdrian Chadd 			break;
517a9fcb51fSAdrian Chadd 		}
518a9fcb51fSAdrian Chadd 	}
519a9fcb51fSAdrian Chadd }
520a9fcb51fSAdrian Chadd 
521a9fcb51fSAdrian Chadd static void
otus_tx_task(void * arg,int pending)522a9fcb51fSAdrian Chadd otus_tx_task(void *arg, int pending)
523a9fcb51fSAdrian Chadd {
524a9fcb51fSAdrian Chadd 	struct otus_softc *sc = arg;
525a9fcb51fSAdrian Chadd 
526a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
527a9fcb51fSAdrian Chadd 	_otus_start(sc);
528a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
529a9fcb51fSAdrian Chadd }
530a9fcb51fSAdrian Chadd 
531a9fcb51fSAdrian Chadd static int
otus_raw_xmit(struct ieee80211_node * ni,struct mbuf * m,const struct ieee80211_bpf_params * params)532a9fcb51fSAdrian Chadd otus_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
533a9fcb51fSAdrian Chadd     const struct ieee80211_bpf_params *params)
534a9fcb51fSAdrian Chadd {
535a9fcb51fSAdrian Chadd 	struct ieee80211com *ic= ni->ni_ic;
536a9fcb51fSAdrian Chadd 	struct otus_softc *sc = ic->ic_softc;
537a9fcb51fSAdrian Chadd 	struct otus_data *bf = NULL;
538a9fcb51fSAdrian Chadd 	int error = 0;
539a9fcb51fSAdrian Chadd 
540a9fcb51fSAdrian Chadd 	/* Don't transmit if we're not running */
541a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
542a9fcb51fSAdrian Chadd 	if (! sc->sc_running) {
543a9fcb51fSAdrian Chadd 		error = ENETDOWN;
544a9fcb51fSAdrian Chadd 		goto error;
545a9fcb51fSAdrian Chadd 	}
546a9fcb51fSAdrian Chadd 
547a9fcb51fSAdrian Chadd 	bf = otus_getbuf(sc);
548a9fcb51fSAdrian Chadd 	if (bf == NULL) {
549a9fcb51fSAdrian Chadd 		error = ENOBUFS;
550a9fcb51fSAdrian Chadd 		goto error;
551a9fcb51fSAdrian Chadd 	}
552a9fcb51fSAdrian Chadd 
5535433f357SAdrian Chadd 	if (otus_tx(sc, ni, m, bf, params) != 0) {
554a9fcb51fSAdrian Chadd 		error = EIO;
555a9fcb51fSAdrian Chadd 		goto error;
556a9fcb51fSAdrian Chadd 	}
557a9fcb51fSAdrian Chadd 
558a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
559a9fcb51fSAdrian Chadd 	return (0);
560a9fcb51fSAdrian Chadd error:
561a9fcb51fSAdrian Chadd 	if (bf)
562a9fcb51fSAdrian Chadd 		otus_freebuf(sc, bf);
563a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
564a9fcb51fSAdrian Chadd 	m_freem(m);
565c0ca75b0SJohn Baldwin 	return (error);
566a9fcb51fSAdrian Chadd }
567a9fcb51fSAdrian Chadd 
568a9fcb51fSAdrian Chadd static void
otus_update_chw(struct ieee80211com * ic)569a9fcb51fSAdrian Chadd otus_update_chw(struct ieee80211com *ic)
570a9fcb51fSAdrian Chadd {
571a9fcb51fSAdrian Chadd 
572a9fcb51fSAdrian Chadd 	printf("%s: TODO\n", __func__);
573a9fcb51fSAdrian Chadd }
574a9fcb51fSAdrian Chadd 
575a9fcb51fSAdrian Chadd static void
otus_set_channel(struct ieee80211com * ic)576a9fcb51fSAdrian Chadd otus_set_channel(struct ieee80211com *ic)
577a9fcb51fSAdrian Chadd {
578a9fcb51fSAdrian Chadd 	struct otus_softc *sc = ic->ic_softc;
579a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_RESET, "%s: set channel: %d\n",
580a9fcb51fSAdrian Chadd 	    __func__,
581a9fcb51fSAdrian Chadd 	    ic->ic_curchan->ic_freq);
582a9fcb51fSAdrian Chadd 
583a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
584a9fcb51fSAdrian Chadd 	(void) otus_set_chan(sc, ic->ic_curchan, 0);
585a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
586a9fcb51fSAdrian Chadd }
587a9fcb51fSAdrian Chadd 
588a9fcb51fSAdrian Chadd static int
otus_ampdu_enable(struct ieee80211_node * ni,struct ieee80211_tx_ampdu * tap)589a9fcb51fSAdrian Chadd otus_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
590a9fcb51fSAdrian Chadd {
591a9fcb51fSAdrian Chadd 
592a9fcb51fSAdrian Chadd 	/* For now, no A-MPDU TX support in the driver */
593a9fcb51fSAdrian Chadd 	return (0);
594a9fcb51fSAdrian Chadd }
595a9fcb51fSAdrian Chadd 
596a9fcb51fSAdrian Chadd static void
otus_scan_start(struct ieee80211com * ic)597a9fcb51fSAdrian Chadd otus_scan_start(struct ieee80211com *ic)
598a9fcb51fSAdrian Chadd {
599a9fcb51fSAdrian Chadd 
600a9fcb51fSAdrian Chadd //	printf("%s: TODO\n", __func__);
601a9fcb51fSAdrian Chadd }
602a9fcb51fSAdrian Chadd 
603a9fcb51fSAdrian Chadd static void
otus_scan_end(struct ieee80211com * ic)604a9fcb51fSAdrian Chadd otus_scan_end(struct ieee80211com *ic)
605a9fcb51fSAdrian Chadd {
606a9fcb51fSAdrian Chadd 
607a9fcb51fSAdrian Chadd //	printf("%s: TODO\n", __func__);
608a9fcb51fSAdrian Chadd }
609a9fcb51fSAdrian Chadd 
610a9fcb51fSAdrian Chadd static void
otus_update_mcast(struct ieee80211com * ic)611a9fcb51fSAdrian Chadd otus_update_mcast(struct ieee80211com *ic)
612a9fcb51fSAdrian Chadd {
613a9fcb51fSAdrian Chadd 	struct otus_softc *sc = ic->ic_softc;
614a9fcb51fSAdrian Chadd 
615a9fcb51fSAdrian Chadd 	(void) otus_set_multi(sc);
616a9fcb51fSAdrian Chadd }
617a9fcb51fSAdrian Chadd 
618a9fcb51fSAdrian Chadd static int
otus_attachhook(struct otus_softc * sc)619a9fcb51fSAdrian Chadd otus_attachhook(struct otus_softc *sc)
620a9fcb51fSAdrian Chadd {
621a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
622a9fcb51fSAdrian Chadd 	usb_device_request_t req;
623a9fcb51fSAdrian Chadd 	uint32_t in, out;
624a9fcb51fSAdrian Chadd 	int error;
625a9fcb51fSAdrian Chadd 
626a9fcb51fSAdrian Chadd 	/* Not locked */
627a9fcb51fSAdrian Chadd 	error = otus_load_firmware(sc, "otusfw_init", AR_FW_INIT_ADDR);
628a9fcb51fSAdrian Chadd 	if (error != 0) {
629a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev, "%s: could not load %s firmware\n",
630a9fcb51fSAdrian Chadd 		    __func__, "init");
631a9fcb51fSAdrian Chadd 		return (ENXIO);
632a9fcb51fSAdrian Chadd 	}
633a9fcb51fSAdrian Chadd 
634a9fcb51fSAdrian Chadd 	/* XXX not locked? */
635a9fcb51fSAdrian Chadd 	otus_delay_ms(sc, 1000);
636a9fcb51fSAdrian Chadd 
637a9fcb51fSAdrian Chadd 	/* Not locked */
638a9fcb51fSAdrian Chadd 	error = otus_load_firmware(sc, "otusfw_main", AR_FW_MAIN_ADDR);
639a9fcb51fSAdrian Chadd 	if (error != 0) {
640a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev, "%s: could not load %s firmware\n",
641a9fcb51fSAdrian Chadd 		    __func__, "main");
642a9fcb51fSAdrian Chadd 		return (ENXIO);
643a9fcb51fSAdrian Chadd 	}
644a9fcb51fSAdrian Chadd 
645a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
646a9fcb51fSAdrian Chadd 
647a9fcb51fSAdrian Chadd 	/* Tell device that firmware transfer is complete. */
648a9fcb51fSAdrian Chadd 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
649a9fcb51fSAdrian Chadd 	req.bRequest = AR_FW_DOWNLOAD_COMPLETE;
650a9fcb51fSAdrian Chadd 	USETW(req.wValue, 0);
651a9fcb51fSAdrian Chadd 	USETW(req.wIndex, 0);
652a9fcb51fSAdrian Chadd 	USETW(req.wLength, 0);
653a9fcb51fSAdrian Chadd 	if (usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, &req, NULL,
654a9fcb51fSAdrian Chadd 	    0, NULL, 250) != 0) {
655a9fcb51fSAdrian Chadd 		OTUS_UNLOCK(sc);
656a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
657a9fcb51fSAdrian Chadd 		    "%s: firmware initialization failed\n",
658a9fcb51fSAdrian Chadd 		    __func__);
659a9fcb51fSAdrian Chadd 		return (ENXIO);
660a9fcb51fSAdrian Chadd 	}
661a9fcb51fSAdrian Chadd 
662a9fcb51fSAdrian Chadd 	/* Send an ECHO command to check that everything is settled. */
663a9fcb51fSAdrian Chadd 	in = 0xbadc0ffe;
664c4dabdf7SAdrian Chadd 	if (otus_cmd(sc, AR_CMD_ECHO, &in, sizeof in, &out, sizeof(out)) != 0) {
665a9fcb51fSAdrian Chadd 		OTUS_UNLOCK(sc);
666a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
667a9fcb51fSAdrian Chadd 		    "%s: echo command failed\n", __func__);
668a9fcb51fSAdrian Chadd 		return (ENXIO);
669a9fcb51fSAdrian Chadd 	}
670a9fcb51fSAdrian Chadd 	if (in != out) {
671a9fcb51fSAdrian Chadd 		OTUS_UNLOCK(sc);
672a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
673a9fcb51fSAdrian Chadd 		    "%s: echo reply mismatch: 0x%08x!=0x%08x\n",
674a9fcb51fSAdrian Chadd 		    __func__, in, out);
675a9fcb51fSAdrian Chadd 		return (ENXIO);
676a9fcb51fSAdrian Chadd 	}
677a9fcb51fSAdrian Chadd 
678a9fcb51fSAdrian Chadd 	/* Read entire EEPROM. */
679a9fcb51fSAdrian Chadd 	if (otus_read_eeprom(sc) != 0) {
680a9fcb51fSAdrian Chadd 		OTUS_UNLOCK(sc);
681a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
682a9fcb51fSAdrian Chadd 		    "%s: could not read EEPROM\n",
683a9fcb51fSAdrian Chadd 		    __func__);
684a9fcb51fSAdrian Chadd 		return (ENXIO);
685a9fcb51fSAdrian Chadd 	}
686a9fcb51fSAdrian Chadd 
687a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
688a9fcb51fSAdrian Chadd 
689a9fcb51fSAdrian Chadd 	sc->txmask = sc->eeprom.baseEepHeader.txMask;
690a9fcb51fSAdrian Chadd 	sc->rxmask = sc->eeprom.baseEepHeader.rxMask;
691a9fcb51fSAdrian Chadd 	sc->capflags = sc->eeprom.baseEepHeader.opCapFlags;
692a9fcb51fSAdrian Chadd 	IEEE80211_ADDR_COPY(ic->ic_macaddr, sc->eeprom.baseEepHeader.macAddr);
693a9fcb51fSAdrian Chadd 	sc->sc_led_newstate = otus_led_newstate_type3;	/* XXX */
694a9fcb51fSAdrian Chadd 
69553652fb9SAdrian Chadd 	if (sc->txmask == 0x5)
69653652fb9SAdrian Chadd 		ic->ic_txstream = 2;
69753652fb9SAdrian Chadd 	else
69853652fb9SAdrian Chadd 		ic->ic_txstream = 1;
69953652fb9SAdrian Chadd 
70053652fb9SAdrian Chadd 	if (sc->rxmask == 0x5)
70153652fb9SAdrian Chadd 		ic->ic_rxstream = 2;
70253652fb9SAdrian Chadd 	else
70353652fb9SAdrian Chadd 		ic->ic_rxstream = 1;
70453652fb9SAdrian Chadd 
705a9fcb51fSAdrian Chadd 	device_printf(sc->sc_dev,
706a9fcb51fSAdrian Chadd 	    "MAC/BBP AR9170, RF AR%X, MIMO %dT%dR, address %s\n",
707a9fcb51fSAdrian Chadd 	    (sc->capflags & AR5416_OPFLAGS_11A) ?
708a9fcb51fSAdrian Chadd 		0x9104 : ((sc->txmask == 0x5) ? 0x9102 : 0x9101),
709a9fcb51fSAdrian Chadd 	    (sc->txmask == 0x5) ? 2 : 1, (sc->rxmask == 0x5) ? 2 : 1,
710a9fcb51fSAdrian Chadd 	    ether_sprintf(ic->ic_macaddr));
711a9fcb51fSAdrian Chadd 
712a9fcb51fSAdrian Chadd 	ic->ic_softc = sc;
713a9fcb51fSAdrian Chadd 	ic->ic_name = device_get_nameunit(sc->sc_dev);
714a9fcb51fSAdrian Chadd 	ic->ic_phytype = IEEE80211_T_OFDM;	/* not only, but not used */
715a9fcb51fSAdrian Chadd 	ic->ic_opmode = IEEE80211_M_STA;	/* default to BSS mode */
716a9fcb51fSAdrian Chadd 
717a9fcb51fSAdrian Chadd 	/* Set device capabilities. */
718a9fcb51fSAdrian Chadd 	ic->ic_caps =
719a9fcb51fSAdrian Chadd 	    IEEE80211_C_STA |		/* station mode */
720a9fcb51fSAdrian Chadd #if 0
721a9fcb51fSAdrian Chadd 	    IEEE80211_C_BGSCAN |	/* Background scan. */
722a9fcb51fSAdrian Chadd #endif
723a9fcb51fSAdrian Chadd 	    IEEE80211_C_SHPREAMBLE |	/* Short preamble supported. */
724a9fcb51fSAdrian Chadd 	    IEEE80211_C_WME |		/* WME/QoS */
725a9fcb51fSAdrian Chadd 	    IEEE80211_C_SHSLOT |	/* Short slot time supported. */
726a9fcb51fSAdrian Chadd 	    IEEE80211_C_FF |		/* Atheros fast-frames supported. */
72753652fb9SAdrian Chadd 	    IEEE80211_C_MONITOR |	/* Enable monitor mode */
72853652fb9SAdrian Chadd 	    IEEE80211_C_SWAMSDUTX |	/* Do software A-MSDU TX */
729a9fcb51fSAdrian Chadd 	    IEEE80211_C_WPA;		/* WPA/RSN. */
730a9fcb51fSAdrian Chadd 
73153652fb9SAdrian Chadd 	ic->ic_htcaps =
73253652fb9SAdrian Chadd 	    IEEE80211_HTC_HT |
733a9fcb51fSAdrian Chadd #if 0
73453652fb9SAdrian Chadd 	    IEEE80211_HTC_AMPDU |
735a9fcb51fSAdrian Chadd #endif
73653652fb9SAdrian Chadd 	    IEEE80211_HTC_AMSDU |
73753652fb9SAdrian Chadd 	    IEEE80211_HTCAP_MAXAMSDU_3839 |
73853652fb9SAdrian Chadd 	    IEEE80211_HTCAP_SMPS_OFF;
739a9fcb51fSAdrian Chadd 
7407f145abaSAndriy Voskoboinyk 	otus_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
7417f145abaSAndriy Voskoboinyk 	    ic->ic_channels);
742a9fcb51fSAdrian Chadd 
743a9fcb51fSAdrian Chadd 	ieee80211_ifattach(ic);
744a9fcb51fSAdrian Chadd 	ic->ic_raw_xmit = otus_raw_xmit;
745a9fcb51fSAdrian Chadd 	ic->ic_scan_start = otus_scan_start;
746a9fcb51fSAdrian Chadd 	ic->ic_scan_end = otus_scan_end;
747a9fcb51fSAdrian Chadd 	ic->ic_set_channel = otus_set_channel;
7487f145abaSAndriy Voskoboinyk 	ic->ic_getradiocaps = otus_getradiocaps;
749a9fcb51fSAdrian Chadd 	ic->ic_vap_create = otus_vap_create;
750a9fcb51fSAdrian Chadd 	ic->ic_vap_delete = otus_vap_delete;
751a9fcb51fSAdrian Chadd 	ic->ic_update_mcast = otus_update_mcast;
752a9fcb51fSAdrian Chadd 	ic->ic_update_promisc = otus_update_mcast;
753a9fcb51fSAdrian Chadd 	ic->ic_parent = otus_parent;
754a9fcb51fSAdrian Chadd 	ic->ic_transmit = otus_transmit;
755a9fcb51fSAdrian Chadd 	ic->ic_update_chw = otus_update_chw;
756a9fcb51fSAdrian Chadd 	ic->ic_ampdu_enable = otus_ampdu_enable;
757a14954c5SAndriy Voskoboinyk 	ic->ic_wme.wme_update = otus_updateedca;
758a9fcb51fSAdrian Chadd 	ic->ic_newassoc = otus_newassoc;
75902b3773aSAdrian Chadd 	ic->ic_node_alloc = otus_node_alloc;
760a9fcb51fSAdrian Chadd 
761a9fcb51fSAdrian Chadd #ifdef notyet
762a9fcb51fSAdrian Chadd 	ic->ic_set_key = otus_set_key;
763a9fcb51fSAdrian Chadd 	ic->ic_delete_key = otus_delete_key;
764a9fcb51fSAdrian Chadd #endif
765a9fcb51fSAdrian Chadd 
766a9fcb51fSAdrian Chadd 	ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr,
767a9fcb51fSAdrian Chadd 	    sizeof(sc->sc_txtap), OTUS_TX_RADIOTAP_PRESENT,
768a9fcb51fSAdrian Chadd 	    &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
769a9fcb51fSAdrian Chadd 	    OTUS_RX_RADIOTAP_PRESENT);
770a9fcb51fSAdrian Chadd 
771a9fcb51fSAdrian Chadd 	return (0);
772a9fcb51fSAdrian Chadd }
773a9fcb51fSAdrian Chadd 
7747f145abaSAndriy Voskoboinyk static void
otus_getradiocaps(struct ieee80211com * ic,int maxchans,int * nchans,struct ieee80211_channel chans[])7757f145abaSAndriy Voskoboinyk otus_getradiocaps(struct ieee80211com *ic,
7767f145abaSAndriy Voskoboinyk     int maxchans, int *nchans, struct ieee80211_channel chans[])
7777f145abaSAndriy Voskoboinyk {
7787f145abaSAndriy Voskoboinyk 	struct otus_softc *sc = ic->ic_softc;
7797f145abaSAndriy Voskoboinyk 	uint8_t bands[IEEE80211_MODE_BYTES];
7807f145abaSAndriy Voskoboinyk 
7817f145abaSAndriy Voskoboinyk 	/* Set supported .11b and .11g rates. */
7827f145abaSAndriy Voskoboinyk 	memset(bands, 0, sizeof(bands));
7837f145abaSAndriy Voskoboinyk 	if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11G) {
7847f145abaSAndriy Voskoboinyk 		setbit(bands, IEEE80211_MODE_11B);
7857f145abaSAndriy Voskoboinyk 		setbit(bands, IEEE80211_MODE_11G);
7867f145abaSAndriy Voskoboinyk 		setbit(bands, IEEE80211_MODE_11NG);
7877f145abaSAndriy Voskoboinyk 		ieee80211_add_channel_list_2ghz(chans, maxchans, nchans,
7887f145abaSAndriy Voskoboinyk 		    ar_chans, 14, bands, 0);
7897f145abaSAndriy Voskoboinyk 	}
7907f145abaSAndriy Voskoboinyk 	if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11A) {
7917f145abaSAndriy Voskoboinyk 		setbit(bands, IEEE80211_MODE_11A);
79253652fb9SAdrian Chadd 		setbit(bands, IEEE80211_MODE_11NA);
7937f145abaSAndriy Voskoboinyk 		ieee80211_add_channel_list_5ghz(chans, maxchans, nchans,
7947f145abaSAndriy Voskoboinyk                     &ar_chans[14], nitems(ar_chans) - 14, bands, 0);
7957f145abaSAndriy Voskoboinyk 	}
7967f145abaSAndriy Voskoboinyk }
7977f145abaSAndriy Voskoboinyk 
798a9fcb51fSAdrian Chadd int
otus_load_firmware(struct otus_softc * sc,const char * name,uint32_t addr)799a9fcb51fSAdrian Chadd otus_load_firmware(struct otus_softc *sc, const char *name, uint32_t addr)
800a9fcb51fSAdrian Chadd {
801a9fcb51fSAdrian Chadd 	usb_device_request_t req;
802a9fcb51fSAdrian Chadd 	char *ptr;
803a9fcb51fSAdrian Chadd 	const struct firmware *fw;
804a9fcb51fSAdrian Chadd 	int mlen, error, size;
805a9fcb51fSAdrian Chadd 
806a9fcb51fSAdrian Chadd 	error = 0;
807a9fcb51fSAdrian Chadd 
808a9fcb51fSAdrian Chadd 	/* Read firmware image from the filesystem. */
809a9fcb51fSAdrian Chadd 	if ((fw = firmware_get(name)) == NULL) {
810a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
811a9fcb51fSAdrian Chadd 		    "%s: failed loadfirmware of file %s\n", __func__, name);
812a9fcb51fSAdrian Chadd 		return (ENXIO);
813a9fcb51fSAdrian Chadd 	}
814a9fcb51fSAdrian Chadd 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
815a9fcb51fSAdrian Chadd 	req.bRequest = AR_FW_DOWNLOAD;
816a9fcb51fSAdrian Chadd 	USETW(req.wIndex, 0);
817a9fcb51fSAdrian Chadd 
818a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
819a9fcb51fSAdrian Chadd 
820a9fcb51fSAdrian Chadd 	/* XXX const */
821a9fcb51fSAdrian Chadd 	ptr = __DECONST(char *, fw->data);
822a9fcb51fSAdrian Chadd 	size = fw->datasize;
823a9fcb51fSAdrian Chadd 	addr >>= 8;
824a9fcb51fSAdrian Chadd 	while (size > 0) {
825a9fcb51fSAdrian Chadd 		mlen = MIN(size, 4096);
826a9fcb51fSAdrian Chadd 
827a9fcb51fSAdrian Chadd 		USETW(req.wValue, addr);
828a9fcb51fSAdrian Chadd 		USETW(req.wLength, mlen);
829a9fcb51fSAdrian Chadd 		if (usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
830a9fcb51fSAdrian Chadd 		    &req, ptr, 0, NULL, 250) != 0) {
831a9fcb51fSAdrian Chadd 			error = EIO;
832a9fcb51fSAdrian Chadd 			break;
833a9fcb51fSAdrian Chadd 		}
834a9fcb51fSAdrian Chadd 		addr += mlen >> 8;
835a9fcb51fSAdrian Chadd 		ptr  += mlen;
836a9fcb51fSAdrian Chadd 		size -= mlen;
837a9fcb51fSAdrian Chadd 	}
838a9fcb51fSAdrian Chadd 
839a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
840a9fcb51fSAdrian Chadd 
841a9fcb51fSAdrian Chadd 	firmware_put(fw, FIRMWARE_UNLOAD);
842a9fcb51fSAdrian Chadd 	if (error != 0)
843a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
844a9fcb51fSAdrian Chadd 		    "%s: %s: error=%d\n", __func__, name, error);
845a9fcb51fSAdrian Chadd 	return error;
846a9fcb51fSAdrian Chadd }
847a9fcb51fSAdrian Chadd 
848a9fcb51fSAdrian Chadd int
otus_open_pipes(struct otus_softc * sc)849a9fcb51fSAdrian Chadd otus_open_pipes(struct otus_softc *sc)
850a9fcb51fSAdrian Chadd {
851a9fcb51fSAdrian Chadd #if 0
852a9fcb51fSAdrian Chadd 	int isize, error;
853a9fcb51fSAdrian Chadd 	int i;
854a9fcb51fSAdrian Chadd #endif
855a9fcb51fSAdrian Chadd 	int error;
856a9fcb51fSAdrian Chadd 
857a9fcb51fSAdrian Chadd 	OTUS_UNLOCK_ASSERT(sc);
858a9fcb51fSAdrian Chadd 
859a9fcb51fSAdrian Chadd 	if ((error = otus_alloc_tx_cmd_list(sc)) != 0) {
860a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
861a9fcb51fSAdrian Chadd 		    "%s: could not allocate command xfer\n",
862a9fcb51fSAdrian Chadd 		    __func__);
863a9fcb51fSAdrian Chadd 		goto fail;
864a9fcb51fSAdrian Chadd 	}
865a9fcb51fSAdrian Chadd 
866a9fcb51fSAdrian Chadd 	if ((error = otus_alloc_tx_list(sc)) != 0) {
867a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev, "%s: could not allocate Tx xfers\n",
868a9fcb51fSAdrian Chadd 		    __func__);
869a9fcb51fSAdrian Chadd 		goto fail;
870a9fcb51fSAdrian Chadd 	}
871a9fcb51fSAdrian Chadd 
872a9fcb51fSAdrian Chadd 	if ((error = otus_alloc_rx_list(sc)) != 0) {
873a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev, "%s: could not allocate Rx xfers\n",
874a9fcb51fSAdrian Chadd 		    __func__);
875a9fcb51fSAdrian Chadd 		goto fail;
876a9fcb51fSAdrian Chadd 	}
877a9fcb51fSAdrian Chadd 
878a9fcb51fSAdrian Chadd 	/* Enable RX transfers; needed for initial firmware messages */
879a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
880a9fcb51fSAdrian Chadd 	usbd_transfer_start(sc->sc_xfer[OTUS_BULK_RX]);
881a9fcb51fSAdrian Chadd 	usbd_transfer_start(sc->sc_xfer[OTUS_BULK_IRQ]);
882a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
883a9fcb51fSAdrian Chadd 	return 0;
884a9fcb51fSAdrian Chadd 
885a9fcb51fSAdrian Chadd fail:	otus_close_pipes(sc);
886a9fcb51fSAdrian Chadd 	return error;
887a9fcb51fSAdrian Chadd }
888a9fcb51fSAdrian Chadd 
889a9fcb51fSAdrian Chadd void
otus_close_pipes(struct otus_softc * sc)890a9fcb51fSAdrian Chadd otus_close_pipes(struct otus_softc *sc)
891a9fcb51fSAdrian Chadd {
892c74d4747SAdrian Chadd 
893c74d4747SAdrian Chadd 	OTUS_LOCK(sc);
894a9fcb51fSAdrian Chadd 	otus_free_tx_cmd_list(sc);
895a9fcb51fSAdrian Chadd 	otus_free_tx_list(sc);
896a9fcb51fSAdrian Chadd 	otus_free_rx_list(sc);
897c74d4747SAdrian Chadd 	OTUS_UNLOCK(sc);
898a9fcb51fSAdrian Chadd 
899a9fcb51fSAdrian Chadd 	usbd_transfer_unsetup(sc->sc_xfer, OTUS_N_XFER);
900a9fcb51fSAdrian Chadd }
901a9fcb51fSAdrian Chadd 
902a9fcb51fSAdrian Chadd static void
otus_free_cmd_list(struct otus_softc * sc,struct otus_tx_cmd cmd[],int ndata)903a9fcb51fSAdrian Chadd otus_free_cmd_list(struct otus_softc *sc, struct otus_tx_cmd cmd[], int ndata)
904a9fcb51fSAdrian Chadd {
905a9fcb51fSAdrian Chadd 	int i;
906a9fcb51fSAdrian Chadd 
907a9fcb51fSAdrian Chadd 	/* XXX TODO: someone has to have waken up waiters! */
908a9fcb51fSAdrian Chadd 	for (i = 0; i < ndata; i++) {
909a9fcb51fSAdrian Chadd 		struct otus_tx_cmd *dp = &cmd[i];
910a9fcb51fSAdrian Chadd 
911a9fcb51fSAdrian Chadd 		if (dp->buf != NULL) {
912a9fcb51fSAdrian Chadd 			free(dp->buf, M_USBDEV);
913a9fcb51fSAdrian Chadd 			dp->buf = NULL;
914a9fcb51fSAdrian Chadd 		}
915a9fcb51fSAdrian Chadd 	}
916a9fcb51fSAdrian Chadd }
917a9fcb51fSAdrian Chadd 
918a9fcb51fSAdrian Chadd static int
otus_alloc_cmd_list(struct otus_softc * sc,struct otus_tx_cmd cmd[],int ndata,int maxsz)919a9fcb51fSAdrian Chadd otus_alloc_cmd_list(struct otus_softc *sc, struct otus_tx_cmd cmd[],
920a9fcb51fSAdrian Chadd     int ndata, int maxsz)
921a9fcb51fSAdrian Chadd {
922a9fcb51fSAdrian Chadd 	int i, error;
923a9fcb51fSAdrian Chadd 
924a9fcb51fSAdrian Chadd 	for (i = 0; i < ndata; i++) {
925a9fcb51fSAdrian Chadd 		struct otus_tx_cmd *dp = &cmd[i];
926b35978d0SAdrian Chadd 		dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT | M_ZERO);
927a9fcb51fSAdrian Chadd 		dp->odata = NULL;
928a9fcb51fSAdrian Chadd 		if (dp->buf == NULL) {
929a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev,
930a9fcb51fSAdrian Chadd 			    "could not allocate buffer\n");
931a9fcb51fSAdrian Chadd 			error = ENOMEM;
932a9fcb51fSAdrian Chadd 			goto fail;
933a9fcb51fSAdrian Chadd 		}
934a9fcb51fSAdrian Chadd 	}
935a9fcb51fSAdrian Chadd 
936a9fcb51fSAdrian Chadd 	return (0);
937a9fcb51fSAdrian Chadd fail:
938a9fcb51fSAdrian Chadd 	otus_free_cmd_list(sc, cmd, ndata);
939a9fcb51fSAdrian Chadd 	return (error);
940a9fcb51fSAdrian Chadd }
941a9fcb51fSAdrian Chadd 
942a9fcb51fSAdrian Chadd static int
otus_alloc_tx_cmd_list(struct otus_softc * sc)943a9fcb51fSAdrian Chadd otus_alloc_tx_cmd_list(struct otus_softc *sc)
944a9fcb51fSAdrian Chadd {
945a9fcb51fSAdrian Chadd 	int error, i;
946a9fcb51fSAdrian Chadd 
947a9fcb51fSAdrian Chadd 	error = otus_alloc_cmd_list(sc, sc->sc_cmd, OTUS_CMD_LIST_COUNT,
948a9fcb51fSAdrian Chadd 	    OTUS_MAX_TXCMDSZ);
949a9fcb51fSAdrian Chadd 	if (error != 0)
950a9fcb51fSAdrian Chadd 		return (error);
951a9fcb51fSAdrian Chadd 
952a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_cmd_active);
953a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_cmd_inactive);
954a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_cmd_pending);
955a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_cmd_waiting);
956a9fcb51fSAdrian Chadd 
957a9fcb51fSAdrian Chadd 	for (i = 0; i < OTUS_CMD_LIST_COUNT; i++)
958a9fcb51fSAdrian Chadd 		STAILQ_INSERT_HEAD(&sc->sc_cmd_inactive, &sc->sc_cmd[i],
959a9fcb51fSAdrian Chadd 		    next_cmd);
960a9fcb51fSAdrian Chadd 
961a9fcb51fSAdrian Chadd 	return (0);
962a9fcb51fSAdrian Chadd }
963a9fcb51fSAdrian Chadd 
964a9fcb51fSAdrian Chadd static void
otus_free_tx_cmd_list(struct otus_softc * sc)965a9fcb51fSAdrian Chadd otus_free_tx_cmd_list(struct otus_softc *sc)
966a9fcb51fSAdrian Chadd {
967a9fcb51fSAdrian Chadd 
968a9fcb51fSAdrian Chadd 	/*
969a9fcb51fSAdrian Chadd 	 * XXX TODO: something needs to wake up any pending/sleeping
970a9fcb51fSAdrian Chadd 	 * waiters!
971a9fcb51fSAdrian Chadd 	 */
972a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_cmd_active);
973a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_cmd_inactive);
974a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_cmd_pending);
975a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_cmd_waiting);
976a9fcb51fSAdrian Chadd 
977a9fcb51fSAdrian Chadd 	otus_free_cmd_list(sc, sc->sc_cmd, OTUS_CMD_LIST_COUNT);
978a9fcb51fSAdrian Chadd }
979a9fcb51fSAdrian Chadd 
980a9fcb51fSAdrian Chadd static int
otus_alloc_list(struct otus_softc * sc,struct otus_data data[],int ndata,int maxsz)981a9fcb51fSAdrian Chadd otus_alloc_list(struct otus_softc *sc, struct otus_data data[],
982a9fcb51fSAdrian Chadd     int ndata, int maxsz)
983a9fcb51fSAdrian Chadd {
984a9fcb51fSAdrian Chadd 	int i, error;
985a9fcb51fSAdrian Chadd 
986a9fcb51fSAdrian Chadd 	for (i = 0; i < ndata; i++) {
987a9fcb51fSAdrian Chadd 		struct otus_data *dp = &data[i];
988a9fcb51fSAdrian Chadd 		dp->sc = sc;
989a9fcb51fSAdrian Chadd 		dp->m = NULL;
990b35978d0SAdrian Chadd 		dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT | M_ZERO);
991a9fcb51fSAdrian Chadd 		if (dp->buf == NULL) {
992a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev,
993a9fcb51fSAdrian Chadd 			    "could not allocate buffer\n");
994a9fcb51fSAdrian Chadd 			error = ENOMEM;
995a9fcb51fSAdrian Chadd 			goto fail;
996a9fcb51fSAdrian Chadd 		}
997a9fcb51fSAdrian Chadd 		dp->ni = NULL;
998a9fcb51fSAdrian Chadd 	}
999a9fcb51fSAdrian Chadd 
1000a9fcb51fSAdrian Chadd 	return (0);
1001a9fcb51fSAdrian Chadd fail:
1002a9fcb51fSAdrian Chadd 	otus_free_list(sc, data, ndata);
1003a9fcb51fSAdrian Chadd 	return (error);
1004a9fcb51fSAdrian Chadd }
1005a9fcb51fSAdrian Chadd 
1006a9fcb51fSAdrian Chadd static int
otus_alloc_rx_list(struct otus_softc * sc)1007a9fcb51fSAdrian Chadd otus_alloc_rx_list(struct otus_softc *sc)
1008a9fcb51fSAdrian Chadd {
1009a9fcb51fSAdrian Chadd 	int error, i;
1010a9fcb51fSAdrian Chadd 
1011a9fcb51fSAdrian Chadd 	error = otus_alloc_list(sc, sc->sc_rx, OTUS_RX_LIST_COUNT,
1012a9fcb51fSAdrian Chadd 	    OTUS_RXBUFSZ);
1013a9fcb51fSAdrian Chadd 	if (error != 0)
1014a9fcb51fSAdrian Chadd 		return (error);
1015a9fcb51fSAdrian Chadd 
1016a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_rx_active);
1017a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_rx_inactive);
1018a9fcb51fSAdrian Chadd 
1019a9fcb51fSAdrian Chadd 	for (i = 0; i < OTUS_RX_LIST_COUNT; i++)
1020a9fcb51fSAdrian Chadd 		STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next);
1021a9fcb51fSAdrian Chadd 
1022a9fcb51fSAdrian Chadd 	return (0);
1023a9fcb51fSAdrian Chadd }
1024a9fcb51fSAdrian Chadd 
1025a9fcb51fSAdrian Chadd static int
otus_alloc_tx_list(struct otus_softc * sc)1026a9fcb51fSAdrian Chadd otus_alloc_tx_list(struct otus_softc *sc)
1027a9fcb51fSAdrian Chadd {
1028a9fcb51fSAdrian Chadd 	int error, i;
1029a9fcb51fSAdrian Chadd 
1030a9fcb51fSAdrian Chadd 	error = otus_alloc_list(sc, sc->sc_tx, OTUS_TX_LIST_COUNT,
1031a9fcb51fSAdrian Chadd 	    OTUS_TXBUFSZ);
1032a9fcb51fSAdrian Chadd 	if (error != 0)
1033a9fcb51fSAdrian Chadd 		return (error);
1034a9fcb51fSAdrian Chadd 
1035a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_tx_inactive);
1036a9fcb51fSAdrian Chadd 
1037a9fcb51fSAdrian Chadd 	for (i = 0; i != OTUS_N_XFER; i++) {
1038a9fcb51fSAdrian Chadd 		STAILQ_INIT(&sc->sc_tx_active[i]);
1039a9fcb51fSAdrian Chadd 		STAILQ_INIT(&sc->sc_tx_pending[i]);
1040a9fcb51fSAdrian Chadd 	}
1041a9fcb51fSAdrian Chadd 
1042a9fcb51fSAdrian Chadd 	for (i = 0; i < OTUS_TX_LIST_COUNT; i++) {
1043a9fcb51fSAdrian Chadd 		STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next);
1044a9fcb51fSAdrian Chadd 	}
1045a9fcb51fSAdrian Chadd 
1046a9fcb51fSAdrian Chadd 	return (0);
1047a9fcb51fSAdrian Chadd }
1048a9fcb51fSAdrian Chadd 
1049a9fcb51fSAdrian Chadd static void
otus_free_tx_list(struct otus_softc * sc)1050a9fcb51fSAdrian Chadd otus_free_tx_list(struct otus_softc *sc)
1051a9fcb51fSAdrian Chadd {
1052a9fcb51fSAdrian Chadd 	int i;
1053a9fcb51fSAdrian Chadd 
1054a9fcb51fSAdrian Chadd 	/* prevent further allocations from TX list(s) */
1055a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_tx_inactive);
1056a9fcb51fSAdrian Chadd 
1057a9fcb51fSAdrian Chadd 	for (i = 0; i != OTUS_N_XFER; i++) {
1058a9fcb51fSAdrian Chadd 		STAILQ_INIT(&sc->sc_tx_active[i]);
1059a9fcb51fSAdrian Chadd 		STAILQ_INIT(&sc->sc_tx_pending[i]);
1060a9fcb51fSAdrian Chadd 	}
1061a9fcb51fSAdrian Chadd 
1062a9fcb51fSAdrian Chadd 	otus_free_list(sc, sc->sc_tx, OTUS_TX_LIST_COUNT);
1063a9fcb51fSAdrian Chadd }
1064a9fcb51fSAdrian Chadd 
1065a9fcb51fSAdrian Chadd static void
otus_free_rx_list(struct otus_softc * sc)1066a9fcb51fSAdrian Chadd otus_free_rx_list(struct otus_softc *sc)
1067a9fcb51fSAdrian Chadd {
1068a9fcb51fSAdrian Chadd 	/* prevent further allocations from RX list(s) */
1069a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_rx_inactive);
1070a9fcb51fSAdrian Chadd 	STAILQ_INIT(&sc->sc_rx_active);
1071a9fcb51fSAdrian Chadd 
1072a9fcb51fSAdrian Chadd 	otus_free_list(sc, sc->sc_rx, OTUS_RX_LIST_COUNT);
1073a9fcb51fSAdrian Chadd }
1074a9fcb51fSAdrian Chadd 
1075a9fcb51fSAdrian Chadd static void
otus_free_list(struct otus_softc * sc,struct otus_data data[],int ndata)1076a9fcb51fSAdrian Chadd otus_free_list(struct otus_softc *sc, struct otus_data data[], int ndata)
1077a9fcb51fSAdrian Chadd {
1078a9fcb51fSAdrian Chadd 	int i;
1079a9fcb51fSAdrian Chadd 
1080a9fcb51fSAdrian Chadd 	for (i = 0; i < ndata; i++) {
1081a9fcb51fSAdrian Chadd 		struct otus_data *dp = &data[i];
1082a9fcb51fSAdrian Chadd 
1083a9fcb51fSAdrian Chadd 		if (dp->buf != NULL) {
1084a9fcb51fSAdrian Chadd 			free(dp->buf, M_USBDEV);
1085a9fcb51fSAdrian Chadd 			dp->buf = NULL;
1086a9fcb51fSAdrian Chadd 		}
1087a9fcb51fSAdrian Chadd 		if (dp->ni != NULL) {
1088a9fcb51fSAdrian Chadd 			ieee80211_free_node(dp->ni);
1089a9fcb51fSAdrian Chadd 			dp->ni = NULL;
1090a9fcb51fSAdrian Chadd 		}
1091a9fcb51fSAdrian Chadd 	}
1092a9fcb51fSAdrian Chadd }
1093a9fcb51fSAdrian Chadd 
1094a9fcb51fSAdrian Chadd static struct otus_data *
_otus_getbuf(struct otus_softc * sc)1095a9fcb51fSAdrian Chadd _otus_getbuf(struct otus_softc *sc)
1096a9fcb51fSAdrian Chadd {
1097a9fcb51fSAdrian Chadd 	struct otus_data *bf;
1098a9fcb51fSAdrian Chadd 
1099a9fcb51fSAdrian Chadd 	bf = STAILQ_FIRST(&sc->sc_tx_inactive);
1100a9fcb51fSAdrian Chadd 	if (bf != NULL)
1101a9fcb51fSAdrian Chadd 		STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
1102a9fcb51fSAdrian Chadd 	else
1103a9fcb51fSAdrian Chadd 		bf = NULL;
1104b35978d0SAdrian Chadd 	/* XXX bzero? */
1105a9fcb51fSAdrian Chadd 	return (bf);
1106a9fcb51fSAdrian Chadd }
1107a9fcb51fSAdrian Chadd 
1108a9fcb51fSAdrian Chadd static struct otus_data *
otus_getbuf(struct otus_softc * sc)1109a9fcb51fSAdrian Chadd otus_getbuf(struct otus_softc *sc)
1110a9fcb51fSAdrian Chadd {
1111a9fcb51fSAdrian Chadd 	struct otus_data *bf;
1112a9fcb51fSAdrian Chadd 
1113a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1114a9fcb51fSAdrian Chadd 
1115a9fcb51fSAdrian Chadd 	bf = _otus_getbuf(sc);
1116a9fcb51fSAdrian Chadd 	return (bf);
1117a9fcb51fSAdrian Chadd }
1118a9fcb51fSAdrian Chadd 
1119a9fcb51fSAdrian Chadd static void
otus_freebuf(struct otus_softc * sc,struct otus_data * bf)1120a9fcb51fSAdrian Chadd otus_freebuf(struct otus_softc *sc, struct otus_data *bf)
1121a9fcb51fSAdrian Chadd {
1122a9fcb51fSAdrian Chadd 
1123a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1124a9fcb51fSAdrian Chadd 	STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next);
1125a9fcb51fSAdrian Chadd }
1126a9fcb51fSAdrian Chadd 
1127a9fcb51fSAdrian Chadd static struct otus_tx_cmd *
_otus_get_txcmd(struct otus_softc * sc)1128a9fcb51fSAdrian Chadd _otus_get_txcmd(struct otus_softc *sc)
1129a9fcb51fSAdrian Chadd {
1130a9fcb51fSAdrian Chadd 	struct otus_tx_cmd *bf;
1131a9fcb51fSAdrian Chadd 
1132a9fcb51fSAdrian Chadd 	bf = STAILQ_FIRST(&sc->sc_cmd_inactive);
1133a9fcb51fSAdrian Chadd 	if (bf != NULL)
1134a9fcb51fSAdrian Chadd 		STAILQ_REMOVE_HEAD(&sc->sc_cmd_inactive, next_cmd);
1135a9fcb51fSAdrian Chadd 	else
1136a9fcb51fSAdrian Chadd 		bf = NULL;
1137a9fcb51fSAdrian Chadd 	return (bf);
1138a9fcb51fSAdrian Chadd }
1139a9fcb51fSAdrian Chadd 
1140a9fcb51fSAdrian Chadd static struct otus_tx_cmd *
otus_get_txcmd(struct otus_softc * sc)1141a9fcb51fSAdrian Chadd otus_get_txcmd(struct otus_softc *sc)
1142a9fcb51fSAdrian Chadd {
1143a9fcb51fSAdrian Chadd 	struct otus_tx_cmd *bf;
1144a9fcb51fSAdrian Chadd 
1145a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1146a9fcb51fSAdrian Chadd 
1147a9fcb51fSAdrian Chadd 	bf = _otus_get_txcmd(sc);
1148a9fcb51fSAdrian Chadd 	if (bf == NULL) {
1149a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev, "%s: no tx cmd buffers\n",
1150a9fcb51fSAdrian Chadd 		    __func__);
1151a9fcb51fSAdrian Chadd 	}
1152a9fcb51fSAdrian Chadd 	return (bf);
1153a9fcb51fSAdrian Chadd }
1154a9fcb51fSAdrian Chadd 
1155a9fcb51fSAdrian Chadd static void
otus_free_txcmd(struct otus_softc * sc,struct otus_tx_cmd * bf)1156a9fcb51fSAdrian Chadd otus_free_txcmd(struct otus_softc *sc, struct otus_tx_cmd *bf)
1157a9fcb51fSAdrian Chadd {
1158a9fcb51fSAdrian Chadd 
1159a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1160a9fcb51fSAdrian Chadd 	STAILQ_INSERT_TAIL(&sc->sc_cmd_inactive, bf, next_cmd);
1161a9fcb51fSAdrian Chadd }
1162a9fcb51fSAdrian Chadd 
1163a9fcb51fSAdrian Chadd void
otus_next_scan(void * arg,int pending)1164a9fcb51fSAdrian Chadd otus_next_scan(void *arg, int pending)
1165a9fcb51fSAdrian Chadd {
1166a9fcb51fSAdrian Chadd #if 0
1167a9fcb51fSAdrian Chadd 	struct otus_softc *sc = arg;
1168a9fcb51fSAdrian Chadd 
1169a9fcb51fSAdrian Chadd 	if (usbd_is_dying(sc->sc_udev))
1170a9fcb51fSAdrian Chadd 		return;
1171a9fcb51fSAdrian Chadd 
1172a9fcb51fSAdrian Chadd 	usbd_ref_incr(sc->sc_udev);
1173a9fcb51fSAdrian Chadd 
1174a9fcb51fSAdrian Chadd 	if (sc->sc_ic.ic_state == IEEE80211_S_SCAN)
1175a9fcb51fSAdrian Chadd 		ieee80211_next_scan(&sc->sc_ic.ic_if);
1176a9fcb51fSAdrian Chadd 
1177a9fcb51fSAdrian Chadd 	usbd_ref_decr(sc->sc_udev);
1178a9fcb51fSAdrian Chadd #endif
1179a9fcb51fSAdrian Chadd }
1180a9fcb51fSAdrian Chadd 
1181a9fcb51fSAdrian Chadd int
otus_newstate(struct ieee80211vap * vap,enum ieee80211_state nstate,int arg)1182a9fcb51fSAdrian Chadd otus_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1183a9fcb51fSAdrian Chadd {
1184a9fcb51fSAdrian Chadd 	struct otus_vap *uvp = OTUS_VAP(vap);
1185a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = vap->iv_ic;
1186a9fcb51fSAdrian Chadd 	struct otus_softc *sc = ic->ic_softc;
1187a9fcb51fSAdrian Chadd 	enum ieee80211_state ostate;
1188a9fcb51fSAdrian Chadd 
1189a9fcb51fSAdrian Chadd 	ostate = vap->iv_state;
1190a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1191a9fcb51fSAdrian Chadd 	    ieee80211_state_name[ostate],
1192a9fcb51fSAdrian Chadd 	    ieee80211_state_name[nstate]);
1193a9fcb51fSAdrian Chadd 
1194a9fcb51fSAdrian Chadd 	IEEE80211_UNLOCK(ic);
1195a9fcb51fSAdrian Chadd 
1196a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
1197a9fcb51fSAdrian Chadd 
1198a9fcb51fSAdrian Chadd 	/* XXX TODO: more fleshing out! */
1199a9fcb51fSAdrian Chadd 
1200a9fcb51fSAdrian Chadd 	switch (nstate) {
1201b35978d0SAdrian Chadd 	case IEEE80211_S_INIT:
1202b35978d0SAdrian Chadd 		otus_set_operating_mode(sc);
1203b35978d0SAdrian Chadd 		otus_set_rx_filter(sc);
1204b35978d0SAdrian Chadd 		break;
1205a9fcb51fSAdrian Chadd 	case IEEE80211_S_RUN:
1206a9fcb51fSAdrian Chadd 		if (ic->ic_opmode == IEEE80211_M_STA) {
1207a9fcb51fSAdrian Chadd 			otus_updateslot(sc);
1208b35978d0SAdrian Chadd 			otus_set_operating_mode(sc);
1209b35978d0SAdrian Chadd 			otus_set_rx_filter(sc);
1210a9fcb51fSAdrian Chadd 
1211a9fcb51fSAdrian Chadd 			/* Start calibration timer. */
1212a9fcb51fSAdrian Chadd 			taskqueue_enqueue_timeout(taskqueue_thread,
1213a9fcb51fSAdrian Chadd 			    &sc->calib_to, hz);
1214a9fcb51fSAdrian Chadd 		}
1215a9fcb51fSAdrian Chadd 		break;
1216a9fcb51fSAdrian Chadd 	default:
1217a9fcb51fSAdrian Chadd 		break;
1218a9fcb51fSAdrian Chadd 	}
1219a9fcb51fSAdrian Chadd 
1220a9fcb51fSAdrian Chadd 	/* XXX TODO: calibration? */
1221a9fcb51fSAdrian Chadd 
1222a9fcb51fSAdrian Chadd 	sc->sc_led_newstate(sc);
1223a9fcb51fSAdrian Chadd 
1224a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
1225a9fcb51fSAdrian Chadd 	IEEE80211_LOCK(ic);
1226a9fcb51fSAdrian Chadd 	return (uvp->newstate(vap, nstate, arg));
1227a9fcb51fSAdrian Chadd }
1228a9fcb51fSAdrian Chadd 
1229a9fcb51fSAdrian Chadd int
otus_cmd(struct otus_softc * sc,uint8_t code,const void * idata,int ilen,void * odata,int odatalen)1230a9fcb51fSAdrian Chadd otus_cmd(struct otus_softc *sc, uint8_t code, const void *idata, int ilen,
1231c4dabdf7SAdrian Chadd     void *odata, int odatalen)
1232a9fcb51fSAdrian Chadd {
1233a9fcb51fSAdrian Chadd 	struct otus_tx_cmd *cmd;
1234a9fcb51fSAdrian Chadd 	struct ar_cmd_hdr *hdr;
1235a9fcb51fSAdrian Chadd 	int xferlen, error;
1236a9fcb51fSAdrian Chadd 
1237a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1238a9fcb51fSAdrian Chadd 
1239a9fcb51fSAdrian Chadd 	/* Always bulk-out a multiple of 4 bytes. */
1240a9fcb51fSAdrian Chadd 	xferlen = (sizeof (*hdr) + ilen + 3) & ~3;
1241436ed6b5SAdrian Chadd 	if (xferlen > OTUS_MAX_TXCMDSZ) {
1242436ed6b5SAdrian Chadd 		device_printf(sc->sc_dev, "%s: command (0x%02x) size (%d) > %d\n",
1243436ed6b5SAdrian Chadd 		    __func__,
1244436ed6b5SAdrian Chadd 		    code,
1245436ed6b5SAdrian Chadd 		    xferlen,
1246436ed6b5SAdrian Chadd 		    OTUS_MAX_TXCMDSZ);
1247436ed6b5SAdrian Chadd 		return (EIO);
1248436ed6b5SAdrian Chadd 	}
1249a9fcb51fSAdrian Chadd 
1250a9fcb51fSAdrian Chadd 	cmd = otus_get_txcmd(sc);
1251a9fcb51fSAdrian Chadd 	if (cmd == NULL) {
1252a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev, "%s: failed to get buf\n",
1253a9fcb51fSAdrian Chadd 		    __func__);
1254a9fcb51fSAdrian Chadd 		return (EIO);
1255a9fcb51fSAdrian Chadd 	}
1256a9fcb51fSAdrian Chadd 
1257a9fcb51fSAdrian Chadd 	hdr = (struct ar_cmd_hdr *)cmd->buf;
1258a9fcb51fSAdrian Chadd 	hdr->code  = code;
1259a9fcb51fSAdrian Chadd 	hdr->len   = ilen;
1260a9fcb51fSAdrian Chadd 	hdr->token = ++sc->token;	/* Don't care about endianness. */
1261a9fcb51fSAdrian Chadd 	cmd->token = hdr->token;
1262a9fcb51fSAdrian Chadd 	/* XXX TODO: check max cmd length? */
1263a9fcb51fSAdrian Chadd 	memcpy((uint8_t *)&hdr[1], idata, ilen);
1264a9fcb51fSAdrian Chadd 
1265a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_CMD,
1266a9fcb51fSAdrian Chadd 	    "%s: sending command code=0x%02x len=%d token=%d\n",
1267a9fcb51fSAdrian Chadd 	    __func__, code, ilen, hdr->token);
1268a9fcb51fSAdrian Chadd 
1269a9fcb51fSAdrian Chadd 	cmd->odata = odata;
1270c4dabdf7SAdrian Chadd 	cmd->odatalen = odatalen;
1271a9fcb51fSAdrian Chadd 	cmd->buflen = xferlen;
1272a9fcb51fSAdrian Chadd 
1273a9fcb51fSAdrian Chadd 	/* Queue the command to the endpoint */
1274a9fcb51fSAdrian Chadd 	STAILQ_INSERT_TAIL(&sc->sc_cmd_pending, cmd, next_cmd);
1275a9fcb51fSAdrian Chadd 	usbd_transfer_start(sc->sc_xfer[OTUS_BULK_CMD]);
1276a9fcb51fSAdrian Chadd 
1277a9fcb51fSAdrian Chadd 	/* Sleep on the command; wait for it to complete */
1278a9fcb51fSAdrian Chadd 	error = msleep(cmd, &sc->sc_mtx, PCATCH, "otuscmd", hz);
1279a9fcb51fSAdrian Chadd 
1280a9fcb51fSAdrian Chadd 	/*
1281a9fcb51fSAdrian Chadd 	 * At this point we don't own cmd any longer; it'll be
1282a9fcb51fSAdrian Chadd 	 * freed by the cmd bulk path or the RX notification
1283a9fcb51fSAdrian Chadd 	 * path.  If the data is made available then it'll be copied
1284a9fcb51fSAdrian Chadd 	 * to the caller.  All that is left to do is communicate
1285a9fcb51fSAdrian Chadd 	 * status back to the caller.
1286a9fcb51fSAdrian Chadd 	 */
1287a9fcb51fSAdrian Chadd 	if (error != 0) {
1288a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
1289a9fcb51fSAdrian Chadd 		    "%s: timeout waiting for command 0x%02x reply\n",
1290a9fcb51fSAdrian Chadd 		    __func__, code);
1291a9fcb51fSAdrian Chadd 	}
1292a9fcb51fSAdrian Chadd 	return error;
1293a9fcb51fSAdrian Chadd }
1294a9fcb51fSAdrian Chadd 
1295a9fcb51fSAdrian Chadd void
otus_write(struct otus_softc * sc,uint32_t reg,uint32_t val)1296a9fcb51fSAdrian Chadd otus_write(struct otus_softc *sc, uint32_t reg, uint32_t val)
1297a9fcb51fSAdrian Chadd {
1298a9fcb51fSAdrian Chadd 
1299a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1300a9fcb51fSAdrian Chadd 
1301a9fcb51fSAdrian Chadd 	sc->write_buf[sc->write_idx].reg = htole32(reg);
1302a9fcb51fSAdrian Chadd 	sc->write_buf[sc->write_idx].val = htole32(val);
1303a9fcb51fSAdrian Chadd 
1304436ed6b5SAdrian Chadd 	if (++sc->write_idx > (AR_MAX_WRITE_IDX-1))
1305a9fcb51fSAdrian Chadd 		(void)otus_write_barrier(sc);
1306a9fcb51fSAdrian Chadd }
1307a9fcb51fSAdrian Chadd 
1308a9fcb51fSAdrian Chadd int
otus_write_barrier(struct otus_softc * sc)1309a9fcb51fSAdrian Chadd otus_write_barrier(struct otus_softc *sc)
1310a9fcb51fSAdrian Chadd {
1311a9fcb51fSAdrian Chadd 	int error;
1312a9fcb51fSAdrian Chadd 
1313a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1314a9fcb51fSAdrian Chadd 
1315a9fcb51fSAdrian Chadd 	if (sc->write_idx == 0)
1316a9fcb51fSAdrian Chadd 		return 0;	/* Nothing to flush. */
1317a9fcb51fSAdrian Chadd 
1318a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_REGIO, "%s: called; %d updates\n",
1319a9fcb51fSAdrian Chadd 	    __func__,
1320a9fcb51fSAdrian Chadd 	    sc->write_idx);
1321a9fcb51fSAdrian Chadd 
1322a9fcb51fSAdrian Chadd 	error = otus_cmd(sc, AR_CMD_WREG, sc->write_buf,
1323c4dabdf7SAdrian Chadd 	    sizeof (sc->write_buf[0]) * sc->write_idx, NULL, 0);
1324a9fcb51fSAdrian Chadd 	sc->write_idx = 0;
1325a9fcb51fSAdrian Chadd 	return error;
1326a9fcb51fSAdrian Chadd }
1327a9fcb51fSAdrian Chadd 
132802b3773aSAdrian Chadd static struct ieee80211_node *
otus_node_alloc(struct ieee80211vap * vap,const uint8_t mac[IEEE80211_ADDR_LEN])132902b3773aSAdrian Chadd otus_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
1330a9fcb51fSAdrian Chadd {
133102b3773aSAdrian Chadd 
133202b3773aSAdrian Chadd 	return malloc(sizeof (struct otus_node), M_80211_NODE,
133302b3773aSAdrian Chadd 	    M_NOWAIT | M_ZERO);
1334a9fcb51fSAdrian Chadd }
1335a9fcb51fSAdrian Chadd 
1336a9fcb51fSAdrian Chadd int
otus_read_eeprom(struct otus_softc * sc)1337a9fcb51fSAdrian Chadd otus_read_eeprom(struct otus_softc *sc)
1338a9fcb51fSAdrian Chadd {
1339a9fcb51fSAdrian Chadd 	uint32_t regs[8], reg;
1340a9fcb51fSAdrian Chadd 	uint8_t *eep;
1341a9fcb51fSAdrian Chadd 	int i, j, error;
1342a9fcb51fSAdrian Chadd 
1343a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1344a9fcb51fSAdrian Chadd 
1345a9fcb51fSAdrian Chadd 	/* Read EEPROM by blocks of 32 bytes. */
1346a9fcb51fSAdrian Chadd 	eep = (uint8_t *)&sc->eeprom;
1347a9fcb51fSAdrian Chadd 	reg = AR_EEPROM_OFFSET;
1348a9fcb51fSAdrian Chadd 	for (i = 0; i < sizeof (sc->eeprom) / 32; i++) {
1349a9fcb51fSAdrian Chadd 		for (j = 0; j < 8; j++, reg += 4)
1350a9fcb51fSAdrian Chadd 			regs[j] = htole32(reg);
1351c4dabdf7SAdrian Chadd 		error = otus_cmd(sc, AR_CMD_RREG, regs, sizeof regs, eep, 32);
1352a9fcb51fSAdrian Chadd 		if (error != 0)
1353a9fcb51fSAdrian Chadd 			break;
1354a9fcb51fSAdrian Chadd 		eep += 32;
1355a9fcb51fSAdrian Chadd 	}
1356a9fcb51fSAdrian Chadd 	return error;
1357a9fcb51fSAdrian Chadd }
1358a9fcb51fSAdrian Chadd 
1359a9fcb51fSAdrian Chadd void
otus_newassoc(struct ieee80211_node * ni,int isnew)1360a9fcb51fSAdrian Chadd otus_newassoc(struct ieee80211_node *ni, int isnew)
1361a9fcb51fSAdrian Chadd {
1362a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = ni->ni_ic;
1363a9fcb51fSAdrian Chadd 	struct otus_softc *sc = ic->ic_softc;
1364a9fcb51fSAdrian Chadd 	struct otus_node *on = OTUS_NODE(ni);
1365a9fcb51fSAdrian Chadd 
1366a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_STATE, "new assoc isnew=%d addr=%s\n",
1367a9fcb51fSAdrian Chadd 	    isnew, ether_sprintf(ni->ni_macaddr));
1368a9fcb51fSAdrian Chadd 
1369a9fcb51fSAdrian Chadd 	on->tx_done = 0;
1370a9fcb51fSAdrian Chadd 	on->tx_err = 0;
1371a9fcb51fSAdrian Chadd 	on->tx_retries = 0;
1372a9fcb51fSAdrian Chadd }
1373a9fcb51fSAdrian Chadd 
1374a9fcb51fSAdrian Chadd static void
otus_cmd_handle_response(struct otus_softc * sc,struct ar_cmd_hdr * hdr)1375a9fcb51fSAdrian Chadd otus_cmd_handle_response(struct otus_softc *sc, struct ar_cmd_hdr *hdr)
1376a9fcb51fSAdrian Chadd {
1377a9fcb51fSAdrian Chadd 	struct otus_tx_cmd *cmd;
1378a9fcb51fSAdrian Chadd 
1379a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1380a9fcb51fSAdrian Chadd 
1381a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1382a9fcb51fSAdrian Chadd 	    "%s: received reply code=0x%02x len=%d token=%d\n",
1383a9fcb51fSAdrian Chadd 	    __func__,
1384a9fcb51fSAdrian Chadd 	    hdr->code, hdr->len, hdr->token);
1385a9fcb51fSAdrian Chadd 
1386a9fcb51fSAdrian Chadd 	/*
1387a9fcb51fSAdrian Chadd 	 * Walk the list, freeing items that aren't ours,
1388a9fcb51fSAdrian Chadd 	 * stopping when we hit our token.
1389a9fcb51fSAdrian Chadd 	 */
1390a9fcb51fSAdrian Chadd 	while ((cmd = STAILQ_FIRST(&sc->sc_cmd_waiting)) != NULL) {
1391a9fcb51fSAdrian Chadd 		STAILQ_REMOVE_HEAD(&sc->sc_cmd_waiting, next_cmd);
1392a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1393a9fcb51fSAdrian Chadd 		    "%s: cmd=%p; hdr.token=%d, cmd.token=%d\n",
1394a9fcb51fSAdrian Chadd 		    __func__,
1395a9fcb51fSAdrian Chadd 		    cmd,
1396a9fcb51fSAdrian Chadd 		    (int) hdr->token,
1397a9fcb51fSAdrian Chadd 		    (int) cmd->token);
1398a9fcb51fSAdrian Chadd 		if (hdr->token == cmd->token) {
1399a9fcb51fSAdrian Chadd 			/* Copy answer into caller's supplied buffer. */
1400c4dabdf7SAdrian Chadd 			if (cmd->odata != NULL) {
1401c4dabdf7SAdrian Chadd 				if (hdr->len != cmd->odatalen) {
1402c4dabdf7SAdrian Chadd 					device_printf(sc->sc_dev,
1403c4dabdf7SAdrian Chadd 					    "%s: code 0x%02x, len=%d, olen=%d\n",
1404c4dabdf7SAdrian Chadd 					    __func__,
1405c4dabdf7SAdrian Chadd 					    (int) hdr->code,
1406c4dabdf7SAdrian Chadd 					    (int) hdr->len,
1407c4dabdf7SAdrian Chadd 					    (int) cmd->odatalen);
1408c4dabdf7SAdrian Chadd 				}
1409c4dabdf7SAdrian Chadd 				memcpy(cmd->odata, &hdr[1],
1410c4dabdf7SAdrian Chadd 				    MIN(cmd->odatalen, hdr->len));
1411c4dabdf7SAdrian Chadd 			}
1412a9fcb51fSAdrian Chadd 			wakeup(cmd);
1413a9fcb51fSAdrian Chadd 		}
1414a9fcb51fSAdrian Chadd 
1415a9fcb51fSAdrian Chadd 		STAILQ_INSERT_TAIL(&sc->sc_cmd_inactive, cmd, next_cmd);
1416a9fcb51fSAdrian Chadd 	}
1417a9fcb51fSAdrian Chadd }
1418a9fcb51fSAdrian Chadd 
1419a9fcb51fSAdrian Chadd void
otus_cmd_rxeof(struct otus_softc * sc,uint8_t * buf,int len)1420a9fcb51fSAdrian Chadd otus_cmd_rxeof(struct otus_softc *sc, uint8_t *buf, int len)
1421a9fcb51fSAdrian Chadd {
1422a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
1423a9fcb51fSAdrian Chadd 	struct ar_cmd_hdr *hdr;
1424a9fcb51fSAdrian Chadd 
1425a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1426a9fcb51fSAdrian Chadd 
1427a9fcb51fSAdrian Chadd 	if (__predict_false(len < sizeof (*hdr))) {
1428a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1429a9fcb51fSAdrian Chadd 		    "cmd too small %d\n", len);
1430a9fcb51fSAdrian Chadd 		return;
1431a9fcb51fSAdrian Chadd 	}
1432a9fcb51fSAdrian Chadd 	hdr = (struct ar_cmd_hdr *)buf;
1433a9fcb51fSAdrian Chadd 	if (__predict_false(sizeof (*hdr) + hdr->len > len ||
1434a9fcb51fSAdrian Chadd 	    sizeof (*hdr) + hdr->len > 64)) {
1435a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1436a9fcb51fSAdrian Chadd 		    "cmd too large %d\n", hdr->len);
1437a9fcb51fSAdrian Chadd 		return;
1438a9fcb51fSAdrian Chadd 	}
1439a9fcb51fSAdrian Chadd 
1440a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1441a9fcb51fSAdrian Chadd 	    "%s: code=%.02x\n",
1442a9fcb51fSAdrian Chadd 	    __func__,
1443a9fcb51fSAdrian Chadd 	    hdr->code);
1444a9fcb51fSAdrian Chadd 
1445a9fcb51fSAdrian Chadd 	/*
1446c4dabdf7SAdrian Chadd 	 * This has to reach into the cmd queue "waiting for
1447a9fcb51fSAdrian Chadd 	 * an RX response" list, grab the head entry and check
1448c4dabdf7SAdrian Chadd 	 * if we need to wake anyone up.
1449a9fcb51fSAdrian Chadd 	 */
1450a9fcb51fSAdrian Chadd 	if ((hdr->code & 0xc0) != 0xc0) {
1451a9fcb51fSAdrian Chadd 		otus_cmd_handle_response(sc, hdr);
1452a9fcb51fSAdrian Chadd 		return;
1453a9fcb51fSAdrian Chadd 	}
1454a9fcb51fSAdrian Chadd 
1455a9fcb51fSAdrian Chadd 	/* Received unsolicited notification. */
1456a9fcb51fSAdrian Chadd 	switch (hdr->code & 0x3f) {
1457a9fcb51fSAdrian Chadd 	case AR_EVT_BEACON:
1458a9fcb51fSAdrian Chadd 		break;
1459a9fcb51fSAdrian Chadd 	case AR_EVT_TX_COMP:
1460a9fcb51fSAdrian Chadd 	{
1461a9fcb51fSAdrian Chadd 		struct ar_evt_tx_comp *tx = (struct ar_evt_tx_comp *)&hdr[1];
1462a9fcb51fSAdrian Chadd 		struct ieee80211_node *ni;
1463a9fcb51fSAdrian Chadd 
1464a9fcb51fSAdrian Chadd 		ni = ieee80211_find_node(&ic->ic_sta, tx->macaddr);
1465a9fcb51fSAdrian Chadd 		if (ni == NULL) {
1466a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev,
1467a9fcb51fSAdrian Chadd 			    "%s: txcomp on unknown node (%s)\n",
1468a9fcb51fSAdrian Chadd 			    __func__,
1469a9fcb51fSAdrian Chadd 			    ether_sprintf(tx->macaddr));
1470a9fcb51fSAdrian Chadd 			break;
1471a9fcb51fSAdrian Chadd 		}
1472a9fcb51fSAdrian Chadd 
1473a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_TXCOMP,
1474a9fcb51fSAdrian Chadd 		    "tx completed %s status=%d phy=0x%x\n",
1475a9fcb51fSAdrian Chadd 		    ether_sprintf(tx->macaddr), le16toh(tx->status),
1476a9fcb51fSAdrian Chadd 		    le32toh(tx->phy));
1477a9fcb51fSAdrian Chadd 
1478a9fcb51fSAdrian Chadd 		switch (le16toh(tx->status)) {
1479a9fcb51fSAdrian Chadd 		case AR_TX_STATUS_COMP:
1480a9fcb51fSAdrian Chadd #if 0
1481a9fcb51fSAdrian Chadd 			ackfailcnt = 0;
1482a9fcb51fSAdrian Chadd 			ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
1483a9fcb51fSAdrian Chadd 			    IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
1484a9fcb51fSAdrian Chadd #endif
1485a9fcb51fSAdrian Chadd 			/*
1486a9fcb51fSAdrian Chadd 			 * We don't get the above; only error notifications.
1487a9fcb51fSAdrian Chadd 			 * Sigh.  So, don't worry about this.
1488a9fcb51fSAdrian Chadd 			 */
1489a9fcb51fSAdrian Chadd 			break;
1490a9fcb51fSAdrian Chadd 		case AR_TX_STATUS_RETRY_COMP:
1491a9fcb51fSAdrian Chadd 			OTUS_NODE(ni)->tx_retries++;
1492a9fcb51fSAdrian Chadd 			break;
1493a9fcb51fSAdrian Chadd 		case AR_TX_STATUS_FAILED:
1494a9fcb51fSAdrian Chadd 			OTUS_NODE(ni)->tx_err++;
1495a9fcb51fSAdrian Chadd 			break;
1496a9fcb51fSAdrian Chadd 		}
1497a9fcb51fSAdrian Chadd 		ieee80211_free_node(ni);
1498a9fcb51fSAdrian Chadd 		break;
1499a9fcb51fSAdrian Chadd 	}
1500a9fcb51fSAdrian Chadd 	case AR_EVT_TBTT:
1501a9fcb51fSAdrian Chadd 		break;
1502a9fcb51fSAdrian Chadd 	case AR_EVT_DO_BB_RESET:
1503a9fcb51fSAdrian Chadd 		/*
1504a9fcb51fSAdrian Chadd 		 * This is "tell driver to reset baseband" from ar9170-fw.
1505a9fcb51fSAdrian Chadd 		 *
1506a9fcb51fSAdrian Chadd 		 * I'm not sure what we should do here, so I'm going to
1507a9fcb51fSAdrian Chadd 		 * fall through; it gets generated when RTSRetryCnt internally
1508a9fcb51fSAdrian Chadd 		 * reaches '5' - I guess the firmware authors thought that
1509a9fcb51fSAdrian Chadd 		 * meant that the BB may have gone deaf or something.
1510a9fcb51fSAdrian Chadd 		 */
1511a9fcb51fSAdrian Chadd 	default:
1512a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
1513a9fcb51fSAdrian Chadd 		    "%s: received notification code=0x%02x len=%d\n",
1514a9fcb51fSAdrian Chadd 		    __func__,
1515a9fcb51fSAdrian Chadd 		    hdr->code, hdr->len);
1516a9fcb51fSAdrian Chadd 	}
1517a9fcb51fSAdrian Chadd }
1518a9fcb51fSAdrian Chadd 
151953652fb9SAdrian Chadd /*
152053652fb9SAdrian Chadd  * Handle a single MPDU.
152153652fb9SAdrian Chadd  *
152253652fb9SAdrian Chadd  * This may be a single MPDU, or it may be a sub-frame from an A-MPDU.
152353652fb9SAdrian Chadd  * In the latter case some of the header details need to be adjusted.
152453652fb9SAdrian Chadd  */
1525a9fcb51fSAdrian Chadd void
otus_sub_rxeof(struct otus_softc * sc,uint8_t * buf,int len,struct mbufq * rxq)1526a9fcb51fSAdrian Chadd otus_sub_rxeof(struct otus_softc *sc, uint8_t *buf, int len, struct mbufq *rxq)
1527a9fcb51fSAdrian Chadd {
1528a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
1529a9fcb51fSAdrian Chadd 	struct ieee80211_rx_stats rxs;
1530a9fcb51fSAdrian Chadd #if 0
1531a9fcb51fSAdrian Chadd 	struct ieee80211_node *ni;
1532a9fcb51fSAdrian Chadd #endif
153353652fb9SAdrian Chadd 	struct ar_rx_macstatus *mac_status = NULL;
153453652fb9SAdrian Chadd 	struct ar_rx_phystatus *phy_status = NULL;
1535a9fcb51fSAdrian Chadd 	struct ieee80211_frame *wh;
1536a9fcb51fSAdrian Chadd 	struct mbuf *m;
1537a9fcb51fSAdrian Chadd //	int s;
1538a9fcb51fSAdrian Chadd 
153953652fb9SAdrian Chadd 	if (otus_debug & OTUS_DEBUG_RX_BUFFER) {
154053652fb9SAdrian Chadd 		device_printf(sc->sc_dev, "%s: %*D\n",
154153652fb9SAdrian Chadd 		    __func__, len, buf, "-");
1542a9fcb51fSAdrian Chadd 	}
1543a9fcb51fSAdrian Chadd 
154453652fb9SAdrian Chadd 	/*
154553652fb9SAdrian Chadd 	 * Before any data path stuff - check to see if this is a command
154653652fb9SAdrian Chadd 	 * response.
154753652fb9SAdrian Chadd 	 *
154853652fb9SAdrian Chadd 	 * All bits in the PLCP header are set to 1 for non-MPDU.
154953652fb9SAdrian Chadd 	 */
155053652fb9SAdrian Chadd 	if ((len >= AR_PLCP_HDR_LEN) &&
155153652fb9SAdrian Chadd 	    memcmp(buf, AR_PLCP_HDR_INTR, AR_PLCP_HDR_LEN) == 0) {
155253652fb9SAdrian Chadd 		otus_cmd_rxeof(sc, buf + AR_PLCP_HDR_LEN,
1553a9fcb51fSAdrian Chadd 		    len - AR_PLCP_HDR_LEN);
1554a9fcb51fSAdrian Chadd 		return;
1555a9fcb51fSAdrian Chadd 	}
1556a9fcb51fSAdrian Chadd 
155753652fb9SAdrian Chadd 	/*
155853652fb9SAdrian Chadd 	 * First step - get the status for the given frame.
155953652fb9SAdrian Chadd 	 * This will tell us whether it's a single MPDU or
156053652fb9SAdrian Chadd 	 * an A-MPDU subframe.
156153652fb9SAdrian Chadd 	 */
156253652fb9SAdrian Chadd 	if (len < sizeof(*mac_status)) {
156353652fb9SAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
156453652fb9SAdrian Chadd 		    "%s: sub-xfer too short (no mac_status) (len %d)\n",
156553652fb9SAdrian Chadd 		    __func__, len);
1566a9fcb51fSAdrian Chadd 		counter_u64_add(ic->ic_ierrors, 1);
1567a9fcb51fSAdrian Chadd 		return;
1568a9fcb51fSAdrian Chadd 	}
156953652fb9SAdrian Chadd 	/*
157053652fb9SAdrian Chadd 	 * Remove the mac_status from the payload length.
157153652fb9SAdrian Chadd 	 *
157253652fb9SAdrian Chadd 	 * Note: cheating, don't reallocate the buffer!
157353652fb9SAdrian Chadd 	 */
157453652fb9SAdrian Chadd 	mac_status = (struct ar_rx_macstatus *)(buf + len - sizeof(*mac_status));
157553652fb9SAdrian Chadd 	len -= sizeof(*mac_status);
1576a9fcb51fSAdrian Chadd 
157753652fb9SAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "%s: mac status=0x%x\n",
157853652fb9SAdrian Chadd 	    __func__, mac_status->status);
157953652fb9SAdrian Chadd 
158053652fb9SAdrian Chadd 	/*
158153652fb9SAdrian Chadd 	 * Next - check the MAC status before doing anything else.
158253652fb9SAdrian Chadd 	 * Extract out the PLCP header for single and first frames;
158353652fb9SAdrian Chadd 	 * since there's a single RX path we can shove PLCP headers
158453652fb9SAdrian Chadd 	 * from both into sc->ar_last_rx_plcp[] so it can be reused.
158553652fb9SAdrian Chadd 	 */
158653652fb9SAdrian Chadd 	if (((mac_status->status & AR_RX_STATUS_MPDU_MASK) == AR_RX_STATUS_MPDU_SINGLE) ||
158753652fb9SAdrian Chadd 	    ((mac_status->status & AR_RX_STATUS_MPDU_MASK) == AR_RX_STATUS_MPDU_FIRST)) {
158853652fb9SAdrian Chadd 		/*
158953652fb9SAdrian Chadd 		 * Ok, we need to at least have a PLCP header at
159053652fb9SAdrian Chadd 		 * this point.
159153652fb9SAdrian Chadd 		 */
159253652fb9SAdrian Chadd 		if (len < AR_PLCP_HDR_LEN) {
159353652fb9SAdrian Chadd 			OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
159453652fb9SAdrian Chadd 			    "%s sub-xfer too short (no mac+plcp) (len %d\n)",
159553652fb9SAdrian Chadd 			    __func__, len);
159653652fb9SAdrian Chadd 			counter_u64_add(ic->ic_ierrors, 1);
159753652fb9SAdrian Chadd 			return;
159853652fb9SAdrian Chadd 		}
159953652fb9SAdrian Chadd 		memcpy(sc->ar_last_rx_plcp, buf, AR_PLCP_HDR_LEN);
160053652fb9SAdrian Chadd 
160153652fb9SAdrian Chadd 		/*
160253652fb9SAdrian Chadd 		 * At this point we can just consume the PLCP header.
160353652fb9SAdrian Chadd 		 * The beginning of the frame should thus be data.
160453652fb9SAdrian Chadd 		 */
160553652fb9SAdrian Chadd 		buf += AR_PLCP_HDR_LEN;
160653652fb9SAdrian Chadd 		len -= AR_PLCP_HDR_LEN;
160753652fb9SAdrian Chadd 	}
160853652fb9SAdrian Chadd 
160953652fb9SAdrian Chadd 	/*
161053652fb9SAdrian Chadd 	 * Next - see if we have a PHY status.
161153652fb9SAdrian Chadd 	 *
161253652fb9SAdrian Chadd 	 * The PHY status is at the end of the final A-MPDU subframe
161353652fb9SAdrian Chadd 	 * or a single MPDU frame.
161453652fb9SAdrian Chadd 	 *
161553652fb9SAdrian Chadd 	 * We'll use this to tag frames with noise floor / RSSI
161653652fb9SAdrian Chadd 	 * if they have valid information.
161753652fb9SAdrian Chadd 	 */
161853652fb9SAdrian Chadd 	if (((mac_status->status & AR_RX_STATUS_MPDU_MASK) == AR_RX_STATUS_MPDU_SINGLE) ||
161953652fb9SAdrian Chadd 	    ((mac_status->status & AR_RX_STATUS_MPDU_MASK) == AR_RX_STATUS_MPDU_LAST)) {
162053652fb9SAdrian Chadd 		if (len < sizeof(*phy_status)) {
162153652fb9SAdrian Chadd 			OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
162253652fb9SAdrian Chadd 			    "%s sub-xfer too short (no phy status) (len %d\n)",
162353652fb9SAdrian Chadd 			    __func__, len);
162453652fb9SAdrian Chadd 			counter_u64_add(ic->ic_ierrors, 1);
162553652fb9SAdrian Chadd 			return;
162653652fb9SAdrian Chadd 		}
162753652fb9SAdrian Chadd 		/*
162853652fb9SAdrian Chadd 		 * Take a pointer to the phy status and remove the length
162953652fb9SAdrian Chadd 		 * from the end of the buffer.
163053652fb9SAdrian Chadd 		 *
163153652fb9SAdrian Chadd 		 * Note: we're cheating here; don't reallocate the buffer!
163253652fb9SAdrian Chadd 		 */
163353652fb9SAdrian Chadd 		phy_status = (struct ar_rx_phystatus *)
163453652fb9SAdrian Chadd 		    (buf + len - sizeof(*phy_status));
163553652fb9SAdrian Chadd 		len -= sizeof(*phy_status);
163653652fb9SAdrian Chadd 	}
163753652fb9SAdrian Chadd 
163853652fb9SAdrian Chadd 	/*
163953652fb9SAdrian Chadd 	 * Middle frames just have a MAC status (stripped above.)
164053652fb9SAdrian Chadd 	 * No PHY status, and PLCP is from ar_last_rx_plcp.
164153652fb9SAdrian Chadd 	 */
164253652fb9SAdrian Chadd 
164353652fb9SAdrian Chadd 	/*
164453652fb9SAdrian Chadd 	 * Discard error frames; don't discard BAD_RA (eg monitor mode);
164553652fb9SAdrian Chadd 	 * let net80211 do that
164653652fb9SAdrian Chadd 	 */
164753652fb9SAdrian Chadd 	if (__predict_false((mac_status->error & ~AR_RX_ERROR_BAD_RA) != 0)) {
164853652fb9SAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "error frame 0x%02x\n", mac_status->error);
164953652fb9SAdrian Chadd 		if (mac_status->error & AR_RX_ERROR_FCS) {
1650a9fcb51fSAdrian Chadd 			OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "bad FCS\n");
165153652fb9SAdrian Chadd 		} else if (mac_status->error & AR_RX_ERROR_MMIC) {
1652a9fcb51fSAdrian Chadd 			/* Report Michael MIC failures to net80211. */
1653a9fcb51fSAdrian Chadd #if 0
1654a9fcb51fSAdrian Chadd 			ieee80211_notify_michael_failure(ni->ni_vap, wh, keyidx);
1655a9fcb51fSAdrian Chadd #endif
1656a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev, "%s: MIC failure\n", __func__);
1657a9fcb51fSAdrian Chadd 		}
1658a9fcb51fSAdrian Chadd 		counter_u64_add(ic->ic_ierrors, 1);
1659a9fcb51fSAdrian Chadd 		return;
1660a9fcb51fSAdrian Chadd 	}
166153652fb9SAdrian Chadd 
166253652fb9SAdrian Chadd 	/*
166353652fb9SAdrian Chadd 	 * Make sure there's room for an 802.11 header + FCS.
166453652fb9SAdrian Chadd 	 *
166553652fb9SAdrian Chadd 	 * Note: a CTS/ACK is 14 bytes (FC, DUR, RA, FCS).
166653652fb9SAdrian Chadd 	 * Making it IEEE80211_MIN_LEN misses CTS/ACKs.
166753652fb9SAdrian Chadd 	 *
166853652fb9SAdrian Chadd 	 * This won't be tossed at this point; eventually once
166953652fb9SAdrian Chadd 	 * rx radiotap is implemented this will allow for
167053652fb9SAdrian Chadd 	 * CTS/ACK frames.  Passing them up to net80211 will
167153652fb9SAdrian Chadd 	 * currently make it angry (too short packets.)
167253652fb9SAdrian Chadd 	 */
167353652fb9SAdrian Chadd 	if (len < 2 + 2 + IEEE80211_ADDR_LEN + IEEE80211_CRC_LEN) {
167453652fb9SAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
167553652fb9SAdrian Chadd 		    "%s: too short for 802.11 (len %d)\n",
167653652fb9SAdrian Chadd 		    __func__, len);
1677a9fcb51fSAdrian Chadd 		counter_u64_add(ic->ic_ierrors, 1);
1678a9fcb51fSAdrian Chadd 		return;
1679a9fcb51fSAdrian Chadd 	}
1680a9fcb51fSAdrian Chadd 
168153652fb9SAdrian Chadd 	len -= IEEE80211_CRC_LEN;	/* strip 802.11 FCS */
168253652fb9SAdrian Chadd 	wh = (struct ieee80211_frame *) buf;
1683a9fcb51fSAdrian Chadd 
1684a181f63fSAdrian Chadd 	/*
168553652fb9SAdrian Chadd 	 * The firmware does seem to spit out a bunch of frames
168653652fb9SAdrian Chadd 	 * with invalid frame control values here.  Just toss them
168753652fb9SAdrian Chadd 	 * rather than letting net80211 get angry and log.
1688a181f63fSAdrian Chadd 	 */
1689c249cc38SAdrian Chadd 	if (!IEEE80211_IS_FC0_CHECK_VER(wh, IEEE80211_FC0_VERSION_0)) {
169053652fb9SAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
169153652fb9SAdrian Chadd 		    "%s: invalid 802.11 fc version (firmware bug?)\n",
169253652fb9SAdrian Chadd 		        __func__);
169353652fb9SAdrian Chadd 		counter_u64_add(ic->ic_ierrors, 1);
169453652fb9SAdrian Chadd 		return;
169553652fb9SAdrian Chadd 	}
169653652fb9SAdrian Chadd 
169753652fb9SAdrian Chadd 	m = m_get2(len, M_NOWAIT, MT_DATA, M_PKTHDR);
1698a9fcb51fSAdrian Chadd 	if (m == NULL) {
169953652fb9SAdrian Chadd 		device_printf(sc->sc_dev, "%s: failed m_get2() (len=%d)\n",
170053652fb9SAdrian Chadd 		    __func__, len);
1701a9fcb51fSAdrian Chadd 		counter_u64_add(ic->ic_ierrors, 1);
1702a181f63fSAdrian Chadd 		return;
1703a9fcb51fSAdrian Chadd 	}
1704a9fcb51fSAdrian Chadd 
1705a9fcb51fSAdrian Chadd 	/* Finalize mbuf. */
170653652fb9SAdrian Chadd 	memcpy(mtod(m, uint8_t *), wh, len);
170753652fb9SAdrian Chadd 	m->m_pkthdr.len = m->m_len = len;
1708a9fcb51fSAdrian Chadd 
170953652fb9SAdrian Chadd 	/* XXX TODO: add setting rx radiotap fields here */
1710a9fcb51fSAdrian Chadd 
171153652fb9SAdrian Chadd 	/*
171253652fb9SAdrian Chadd 	 * Ok, check the frame length and toss if it's too short
171353652fb9SAdrian Chadd 	 * for net80211.  This will toss ACK/CTS.
171453652fb9SAdrian Chadd 	 */
171553652fb9SAdrian Chadd 	if (m->m_len < IEEE80211_MIN_LEN) {
171653652fb9SAdrian Chadd 		/* XXX TODO: add radiotap receive here */
171753652fb9SAdrian Chadd 		m_free(m); m = NULL;
171853652fb9SAdrian Chadd 		return;
1719a9fcb51fSAdrian Chadd 	}
1720a9fcb51fSAdrian Chadd 
172153652fb9SAdrian Chadd 	/* Add RSSI to this mbuf if we have a PHY header */
1722a9fcb51fSAdrian Chadd 	bzero(&rxs, sizeof(rxs));
172353652fb9SAdrian Chadd 	rxs.r_flags = IEEE80211_R_NF;
1724e97796e2SAdrian Chadd 	rxs.c_nf = sc->sc_nf[0];	/* XXX chain 0 != combined rssi/nf */
172553652fb9SAdrian Chadd 	if (phy_status != NULL) {
172653652fb9SAdrian Chadd 		rxs.r_flags |= IEEE80211_R_RSSI;
172753652fb9SAdrian Chadd 		rxs.c_rssi = phy_status->rssi;
172853652fb9SAdrian Chadd 	}
1729a9fcb51fSAdrian Chadd 	/* XXX TODO: add MIMO RSSI/NF as well */
1730bdc7291eSAndriy Voskoboinyk 	if (ieee80211_add_rx_params(m, &rxs) == 0) {
1731bdc7291eSAndriy Voskoboinyk 		counter_u64_add(ic->ic_ierrors, 1);
1732bdc7291eSAndriy Voskoboinyk 		return;
1733bdc7291eSAndriy Voskoboinyk 	}
1734a9fcb51fSAdrian Chadd 
1735a9fcb51fSAdrian Chadd 	/* XXX make a method */
1736a9fcb51fSAdrian Chadd 	STAILQ_INSERT_TAIL(&rxq->mq_head, m, m_stailqpkt);
1737a9fcb51fSAdrian Chadd 
1738a9fcb51fSAdrian Chadd #if 0
1739a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
1740a9fcb51fSAdrian Chadd 	ni = ieee80211_find_rxnode(ic, wh);
1741a9fcb51fSAdrian Chadd 	rxi.rxi_flags = 0;
1742a9fcb51fSAdrian Chadd 	rxi.rxi_rssi = tail->rssi;
1743a9fcb51fSAdrian Chadd 	rxi.rxi_tstamp = 0;	/* unused */
1744a9fcb51fSAdrian Chadd 	ieee80211_input(ifp, m, ni, &rxi);
1745a9fcb51fSAdrian Chadd 
1746a9fcb51fSAdrian Chadd 	/* Node is no longer needed. */
1747a9fcb51fSAdrian Chadd 	ieee80211_release_node(ic, ni);
1748a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
1749a9fcb51fSAdrian Chadd #endif
1750a9fcb51fSAdrian Chadd }
1751a9fcb51fSAdrian Chadd 
1752a9fcb51fSAdrian Chadd static void
otus_rxeof(struct usb_xfer * xfer,struct otus_data * data,struct mbufq * rxq)1753a9fcb51fSAdrian Chadd otus_rxeof(struct usb_xfer *xfer, struct otus_data *data, struct mbufq *rxq)
1754a9fcb51fSAdrian Chadd {
1755a9fcb51fSAdrian Chadd 	struct otus_softc *sc = usbd_xfer_softc(xfer);
1756a9fcb51fSAdrian Chadd 	caddr_t buf = data->buf;
1757a9fcb51fSAdrian Chadd 	struct ar_rx_head *head;
1758a9fcb51fSAdrian Chadd 	uint16_t hlen;
175953652fb9SAdrian Chadd 	int len, offset = 0;
1760a9fcb51fSAdrian Chadd 
1761a9fcb51fSAdrian Chadd 	usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
1762a9fcb51fSAdrian Chadd 
176353652fb9SAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
176453652fb9SAdrian Chadd 	    "%s: transfer completed; len=%d\n",
176553652fb9SAdrian Chadd 	    __func__, len);
176653652fb9SAdrian Chadd 	if (otus_debug & OTUS_DEBUG_RX_BUFFER) {
176753652fb9SAdrian Chadd 		device_printf(sc->sc_dev, "%s: %*D\n",
176853652fb9SAdrian Chadd 		    __func__, len, buf, "-");
176953652fb9SAdrian Chadd 	}
177053652fb9SAdrian Chadd 
1771a9fcb51fSAdrian Chadd 	while (len >= sizeof (*head)) {
1772a9fcb51fSAdrian Chadd 		head = (struct ar_rx_head *)buf;
1773a9fcb51fSAdrian Chadd 		if (__predict_false(head->tag != htole16(AR_RX_HEAD_TAG))) {
1774a9fcb51fSAdrian Chadd 			OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1775a9fcb51fSAdrian Chadd 			    "tag not valid 0x%x\n", le16toh(head->tag));
1776a9fcb51fSAdrian Chadd 			break;
1777a9fcb51fSAdrian Chadd 		}
1778a9fcb51fSAdrian Chadd 		hlen = le16toh(head->len);
177953652fb9SAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "%s: hlen=%d\n",
178053652fb9SAdrian Chadd 		    __func__, hlen);
1781a9fcb51fSAdrian Chadd 		if (__predict_false(sizeof (*head) + hlen > len)) {
1782a9fcb51fSAdrian Chadd 			OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1783a9fcb51fSAdrian Chadd 			    "xfer too short %d/%d\n", len, hlen);
1784a9fcb51fSAdrian Chadd 			break;
1785a9fcb51fSAdrian Chadd 		}
1786a9fcb51fSAdrian Chadd 		/* Process sub-xfer. */
178753652fb9SAdrian Chadd 		otus_sub_rxeof(sc, (uint8_t *) (((uint8_t *) buf) + 4), hlen, rxq);
1788a9fcb51fSAdrian Chadd 
1789a9fcb51fSAdrian Chadd 		/* Next sub-xfer is aligned on a 32-bit boundary. */
1790a9fcb51fSAdrian Chadd 		hlen = (sizeof (*head) + hlen + 3) & ~3;
179153652fb9SAdrian Chadd 		offset += hlen;
179253652fb9SAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
179353652fb9SAdrian Chadd 		    "%s: rounded size is %d, next packet starts at %d\n",
179453652fb9SAdrian Chadd 		    __func__, hlen, offset);
1795a9fcb51fSAdrian Chadd 		buf += hlen;
1796a9fcb51fSAdrian Chadd 		len -= hlen;
1797a9fcb51fSAdrian Chadd 	}
179853652fb9SAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "%s: done!\n", __func__);
1799a9fcb51fSAdrian Chadd }
1800a9fcb51fSAdrian Chadd 
1801a9fcb51fSAdrian Chadd static void
otus_bulk_rx_callback(struct usb_xfer * xfer,usb_error_t error)1802a9fcb51fSAdrian Chadd otus_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
1803a9fcb51fSAdrian Chadd {
1804a9fcb51fSAdrian Chadd 	struct otus_softc *sc = usbd_xfer_softc(xfer);
1805a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
1806a9fcb51fSAdrian Chadd 	struct ieee80211_frame *wh;
1807a9fcb51fSAdrian Chadd 	struct ieee80211_node *ni;
1808a9fcb51fSAdrian Chadd 	struct mbuf *m;
1809a9fcb51fSAdrian Chadd 	struct mbufq scrx;
1810a9fcb51fSAdrian Chadd 	struct otus_data *data;
1811a9fcb51fSAdrian Chadd 
1812a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1813a9fcb51fSAdrian Chadd 
1814a9fcb51fSAdrian Chadd 	mbufq_init(&scrx, 1024);
1815a9fcb51fSAdrian Chadd 
1816a9fcb51fSAdrian Chadd #if 0
1817a9fcb51fSAdrian Chadd 	device_printf(sc->sc_dev, "%s: called; state=%d; error=%d\n",
1818a9fcb51fSAdrian Chadd 	    __func__,
1819a9fcb51fSAdrian Chadd 	    USB_GET_STATE(xfer),
1820a9fcb51fSAdrian Chadd 	    error);
1821a9fcb51fSAdrian Chadd #endif
1822a9fcb51fSAdrian Chadd 
1823a9fcb51fSAdrian Chadd 	switch (USB_GET_STATE(xfer)) {
1824a9fcb51fSAdrian Chadd 	case USB_ST_TRANSFERRED:
1825a9fcb51fSAdrian Chadd 		data = STAILQ_FIRST(&sc->sc_rx_active);
1826a9fcb51fSAdrian Chadd 		if (data == NULL)
1827a9fcb51fSAdrian Chadd 			goto tr_setup;
1828a9fcb51fSAdrian Chadd 		STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1829a9fcb51fSAdrian Chadd 		otus_rxeof(xfer, data, &scrx);
1830a9fcb51fSAdrian Chadd 		STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1831a9fcb51fSAdrian Chadd 		/* FALLTHROUGH */
1832a9fcb51fSAdrian Chadd 	case USB_ST_SETUP:
1833a9fcb51fSAdrian Chadd tr_setup:
1834a9fcb51fSAdrian Chadd 		/*
1835a9fcb51fSAdrian Chadd 		 * XXX TODO: what if sc_rx isn't empty, but data
1836a9fcb51fSAdrian Chadd 		 * is empty?  Then we leak mbufs.
1837a9fcb51fSAdrian Chadd 		 */
1838a9fcb51fSAdrian Chadd 		data = STAILQ_FIRST(&sc->sc_rx_inactive);
1839a9fcb51fSAdrian Chadd 		if (data == NULL) {
1840a9fcb51fSAdrian Chadd 			//KASSERT(m == NULL, ("mbuf isn't NULL"));
1841a9fcb51fSAdrian Chadd 			return;
1842a9fcb51fSAdrian Chadd 		}
1843a9fcb51fSAdrian Chadd 		STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
1844a9fcb51fSAdrian Chadd 		STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
1845a9fcb51fSAdrian Chadd 		usbd_xfer_set_frame_data(xfer, 0, data->buf,
1846a9fcb51fSAdrian Chadd 		    usbd_xfer_max_len(xfer));
1847a9fcb51fSAdrian Chadd 		usbd_transfer_submit(xfer);
1848a9fcb51fSAdrian Chadd 		/*
1849a9fcb51fSAdrian Chadd 		 * To avoid LOR we should unlock our private mutex here to call
1850a9fcb51fSAdrian Chadd 		 * ieee80211_input() because here is at the end of a USB
1851a9fcb51fSAdrian Chadd 		 * callback and safe to unlock.
1852a9fcb51fSAdrian Chadd 		 */
1853a9fcb51fSAdrian Chadd 		OTUS_UNLOCK(sc);
1854a9fcb51fSAdrian Chadd 		while ((m = mbufq_dequeue(&scrx)) != NULL) {
1855a9fcb51fSAdrian Chadd 			wh = mtod(m, struct ieee80211_frame *);
1856a9fcb51fSAdrian Chadd 			ni = ieee80211_find_rxnode(ic,
1857a9fcb51fSAdrian Chadd 			    (struct ieee80211_frame_min *)wh);
1858a9fcb51fSAdrian Chadd 			if (ni != NULL) {
1859a9fcb51fSAdrian Chadd 				if (ni->ni_flags & IEEE80211_NODE_HT)
1860a9fcb51fSAdrian Chadd 					m->m_flags |= M_AMPDU;
1861bdc7291eSAndriy Voskoboinyk 				(void)ieee80211_input_mimo(ni, m);
1862a9fcb51fSAdrian Chadd 				ieee80211_free_node(ni);
1863a9fcb51fSAdrian Chadd 			} else
1864bdc7291eSAndriy Voskoboinyk 				(void)ieee80211_input_mimo_all(ic, m);
1865a9fcb51fSAdrian Chadd 		}
1866c74d4747SAdrian Chadd #ifdef	IEEE80211_SUPPORT_SUPERG
1867c74d4747SAdrian Chadd 		ieee80211_ff_age_all(ic, 100);
1868c74d4747SAdrian Chadd #endif
1869a9fcb51fSAdrian Chadd 		OTUS_LOCK(sc);
1870a9fcb51fSAdrian Chadd 		break;
1871a9fcb51fSAdrian Chadd 	default:
1872a9fcb51fSAdrian Chadd 		/* needs it to the inactive queue due to a error. */
1873a9fcb51fSAdrian Chadd 		data = STAILQ_FIRST(&sc->sc_rx_active);
1874a9fcb51fSAdrian Chadd 		if (data != NULL) {
1875a9fcb51fSAdrian Chadd 			STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1876a9fcb51fSAdrian Chadd 			STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1877a9fcb51fSAdrian Chadd 		}
1878a9fcb51fSAdrian Chadd 		if (error != USB_ERR_CANCELLED) {
1879a9fcb51fSAdrian Chadd 			usbd_xfer_set_stall(xfer);
1880a9fcb51fSAdrian Chadd 			counter_u64_add(ic->ic_ierrors, 1);
1881a9fcb51fSAdrian Chadd 			goto tr_setup;
1882a9fcb51fSAdrian Chadd 		}
1883a9fcb51fSAdrian Chadd 		break;
1884a9fcb51fSAdrian Chadd 	}
1885a9fcb51fSAdrian Chadd }
1886a9fcb51fSAdrian Chadd 
1887a9fcb51fSAdrian Chadd static void
otus_txeof(struct usb_xfer * xfer,struct otus_data * data)1888a9fcb51fSAdrian Chadd otus_txeof(struct usb_xfer *xfer, struct otus_data *data)
1889a9fcb51fSAdrian Chadd {
1890a9fcb51fSAdrian Chadd 	struct otus_softc *sc = usbd_xfer_softc(xfer);
1891a9fcb51fSAdrian Chadd 
1892a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_TXDONE,
1893a9fcb51fSAdrian Chadd 	    "%s: called; data=%p\n", __func__, data);
1894a9fcb51fSAdrian Chadd 
1895a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1896a9fcb51fSAdrian Chadd 
1897c74d4747SAdrian Chadd 	if (sc->sc_tx_n_active == 0) {
1898c74d4747SAdrian Chadd 		device_printf(sc->sc_dev,
1899c74d4747SAdrian Chadd 		    "%s: completed but tx_active=0\n",
1900c74d4747SAdrian Chadd 		    __func__);
1901c74d4747SAdrian Chadd 	} else {
1902c74d4747SAdrian Chadd 		sc->sc_tx_n_active--;
1903c74d4747SAdrian Chadd 	}
1904c74d4747SAdrian Chadd 
1905a9fcb51fSAdrian Chadd 	if (data->m) {
1906a9fcb51fSAdrian Chadd 		/* XXX status? */
1907a9fcb51fSAdrian Chadd 		/* XXX we get TX status via the RX path.. */
1908a9fcb51fSAdrian Chadd 		ieee80211_tx_complete(data->ni, data->m, 0);
1909a9fcb51fSAdrian Chadd 		data->m = NULL;
1910a9fcb51fSAdrian Chadd 		data->ni = NULL;
1911a9fcb51fSAdrian Chadd 	}
1912a9fcb51fSAdrian Chadd }
1913a9fcb51fSAdrian Chadd 
1914a9fcb51fSAdrian Chadd static void
otus_txcmdeof(struct usb_xfer * xfer,struct otus_tx_cmd * cmd)1915a9fcb51fSAdrian Chadd otus_txcmdeof(struct usb_xfer *xfer, struct otus_tx_cmd *cmd)
1916a9fcb51fSAdrian Chadd {
1917a9fcb51fSAdrian Chadd 	struct otus_softc *sc = usbd_xfer_softc(xfer);
1918a9fcb51fSAdrian Chadd 
1919a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1920a9fcb51fSAdrian Chadd 
1921a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1922a9fcb51fSAdrian Chadd 	    "%s: called; data=%p; odata=%p\n",
1923a9fcb51fSAdrian Chadd 	    __func__, cmd, cmd->odata);
1924a9fcb51fSAdrian Chadd 
1925a9fcb51fSAdrian Chadd 	/*
1926a9fcb51fSAdrian Chadd 	 * Non-response commands still need wakeup so the caller
1927a9fcb51fSAdrian Chadd 	 * knows it was submitted and completed OK; response commands should
1928a9fcb51fSAdrian Chadd 	 * wait until they're ACKed by the firmware with a response.
1929a9fcb51fSAdrian Chadd 	 */
1930a9fcb51fSAdrian Chadd 	if (cmd->odata) {
1931a9fcb51fSAdrian Chadd 		STAILQ_INSERT_TAIL(&sc->sc_cmd_waiting, cmd, next_cmd);
1932a9fcb51fSAdrian Chadd 	} else {
1933a9fcb51fSAdrian Chadd 		wakeup(cmd);
1934a9fcb51fSAdrian Chadd 		otus_free_txcmd(sc, cmd);
1935a9fcb51fSAdrian Chadd 	}
1936a9fcb51fSAdrian Chadd }
1937a9fcb51fSAdrian Chadd 
1938a9fcb51fSAdrian Chadd static void
otus_bulk_tx_callback(struct usb_xfer * xfer,usb_error_t error)1939a9fcb51fSAdrian Chadd otus_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error)
1940a9fcb51fSAdrian Chadd {
1941a9fcb51fSAdrian Chadd 	uint8_t which = OTUS_BULK_TX;
1942a9fcb51fSAdrian Chadd 	struct otus_softc *sc = usbd_xfer_softc(xfer);
1943a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
1944a9fcb51fSAdrian Chadd 	struct otus_data *data;
1945a9fcb51fSAdrian Chadd 
1946a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
1947a9fcb51fSAdrian Chadd 
1948a9fcb51fSAdrian Chadd 	switch (USB_GET_STATE(xfer)) {
1949a9fcb51fSAdrian Chadd 	case USB_ST_TRANSFERRED:
1950a9fcb51fSAdrian Chadd 		data = STAILQ_FIRST(&sc->sc_tx_active[which]);
1951a9fcb51fSAdrian Chadd 		if (data == NULL)
1952a9fcb51fSAdrian Chadd 			goto tr_setup;
1953a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_TXDONE,
1954a9fcb51fSAdrian Chadd 		    "%s: transfer done %p\n", __func__, data);
1955a9fcb51fSAdrian Chadd 		STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
1956a9fcb51fSAdrian Chadd 		otus_txeof(xfer, data);
1957a9fcb51fSAdrian Chadd 		otus_freebuf(sc, data);
1958a9fcb51fSAdrian Chadd 		/* FALLTHROUGH */
1959a9fcb51fSAdrian Chadd 	case USB_ST_SETUP:
1960a9fcb51fSAdrian Chadd tr_setup:
1961a9fcb51fSAdrian Chadd 		data = STAILQ_FIRST(&sc->sc_tx_pending[which]);
1962a9fcb51fSAdrian Chadd 		if (data == NULL) {
1963a9fcb51fSAdrian Chadd 			OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
1964a9fcb51fSAdrian Chadd 			    "%s: empty pending queue sc %p\n", __func__, sc);
1965c74d4747SAdrian Chadd 			sc->sc_tx_n_active = 0;
1966a9fcb51fSAdrian Chadd 			goto finish;
1967a9fcb51fSAdrian Chadd 		}
1968a9fcb51fSAdrian Chadd 		STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next);
1969a9fcb51fSAdrian Chadd 		STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next);
1970a9fcb51fSAdrian Chadd 		usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
1971a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
1972a9fcb51fSAdrian Chadd 		    "%s: submitting transfer %p\n", __func__, data);
1973a9fcb51fSAdrian Chadd 		usbd_transfer_submit(xfer);
1974c74d4747SAdrian Chadd 		sc->sc_tx_n_active++;
1975a9fcb51fSAdrian Chadd 		break;
1976a9fcb51fSAdrian Chadd 	default:
1977a9fcb51fSAdrian Chadd 		data = STAILQ_FIRST(&sc->sc_tx_active[which]);
1978a9fcb51fSAdrian Chadd 		if (data != NULL) {
1979a9fcb51fSAdrian Chadd 			STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
1980a9fcb51fSAdrian Chadd 			otus_txeof(xfer, data);
1981a9fcb51fSAdrian Chadd 			otus_freebuf(sc, data);
1982a9fcb51fSAdrian Chadd 		}
1983a9fcb51fSAdrian Chadd 		counter_u64_add(ic->ic_oerrors, 1);
1984a9fcb51fSAdrian Chadd 
1985a9fcb51fSAdrian Chadd 		if (error != USB_ERR_CANCELLED) {
1986a9fcb51fSAdrian Chadd 			usbd_xfer_set_stall(xfer);
1987a9fcb51fSAdrian Chadd 			goto tr_setup;
1988a9fcb51fSAdrian Chadd 		}
1989a9fcb51fSAdrian Chadd 		break;
1990a9fcb51fSAdrian Chadd 	}
1991a9fcb51fSAdrian Chadd 
1992a9fcb51fSAdrian Chadd finish:
1993c74d4747SAdrian Chadd #ifdef	IEEE80211_SUPPORT_SUPERG
1994c74d4747SAdrian Chadd 	/*
1995c74d4747SAdrian Chadd 	 * If the TX active queue drops below a certain
1996c74d4747SAdrian Chadd 	 * threshold, ensure we age fast-frames out so they're
1997c74d4747SAdrian Chadd 	 * transmitted.
1998c74d4747SAdrian Chadd 	 */
1999c74d4747SAdrian Chadd 	if (sc->sc_tx_n_active < 2) {
2000c74d4747SAdrian Chadd 		/* XXX ew - net80211 should defer this for us! */
2001c74d4747SAdrian Chadd 		OTUS_UNLOCK(sc);
2002c74d4747SAdrian Chadd 		ieee80211_ff_flush(ic, WME_AC_VO);
2003c74d4747SAdrian Chadd 		ieee80211_ff_flush(ic, WME_AC_VI);
2004c74d4747SAdrian Chadd 		ieee80211_ff_flush(ic, WME_AC_BE);
2005c74d4747SAdrian Chadd 		ieee80211_ff_flush(ic, WME_AC_BK);
2006c74d4747SAdrian Chadd 		OTUS_LOCK(sc);
2007c74d4747SAdrian Chadd 	}
2008c74d4747SAdrian Chadd #endif
2009a9fcb51fSAdrian Chadd 	/* Kick TX */
2010a9fcb51fSAdrian Chadd 	otus_tx_start(sc);
2011a9fcb51fSAdrian Chadd }
2012a9fcb51fSAdrian Chadd 
2013a9fcb51fSAdrian Chadd static void
otus_bulk_cmd_callback(struct usb_xfer * xfer,usb_error_t error)2014a9fcb51fSAdrian Chadd otus_bulk_cmd_callback(struct usb_xfer *xfer, usb_error_t error)
2015a9fcb51fSAdrian Chadd {
2016a9fcb51fSAdrian Chadd 	struct otus_softc *sc = usbd_xfer_softc(xfer);
2017a9fcb51fSAdrian Chadd #if 0
2018a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
2019a9fcb51fSAdrian Chadd #endif
2020a9fcb51fSAdrian Chadd 	struct otus_tx_cmd *cmd;
2021a9fcb51fSAdrian Chadd 
2022a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
2023a9fcb51fSAdrian Chadd 
2024a9fcb51fSAdrian Chadd 	switch (USB_GET_STATE(xfer)) {
2025a9fcb51fSAdrian Chadd 	case USB_ST_TRANSFERRED:
2026a9fcb51fSAdrian Chadd 		cmd = STAILQ_FIRST(&sc->sc_cmd_active);
2027a9fcb51fSAdrian Chadd 		if (cmd == NULL)
2028a9fcb51fSAdrian Chadd 			goto tr_setup;
2029a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
2030a9fcb51fSAdrian Chadd 		    "%s: transfer done %p\n", __func__, cmd);
2031a9fcb51fSAdrian Chadd 		STAILQ_REMOVE_HEAD(&sc->sc_cmd_active, next_cmd);
2032a9fcb51fSAdrian Chadd 		otus_txcmdeof(xfer, cmd);
2033a9fcb51fSAdrian Chadd 		/* FALLTHROUGH */
2034a9fcb51fSAdrian Chadd 	case USB_ST_SETUP:
2035a9fcb51fSAdrian Chadd tr_setup:
2036a9fcb51fSAdrian Chadd 		cmd = STAILQ_FIRST(&sc->sc_cmd_pending);
2037a9fcb51fSAdrian Chadd 		if (cmd == NULL) {
2038a9fcb51fSAdrian Chadd 			OTUS_DPRINTF(sc, OTUS_DEBUG_CMD,
2039a9fcb51fSAdrian Chadd 			    "%s: empty pending queue sc %p\n", __func__, sc);
2040a9fcb51fSAdrian Chadd 			return;
2041a9fcb51fSAdrian Chadd 		}
2042a9fcb51fSAdrian Chadd 		STAILQ_REMOVE_HEAD(&sc->sc_cmd_pending, next_cmd);
2043a9fcb51fSAdrian Chadd 		STAILQ_INSERT_TAIL(&sc->sc_cmd_active, cmd, next_cmd);
2044a9fcb51fSAdrian Chadd 		usbd_xfer_set_frame_data(xfer, 0, cmd->buf, cmd->buflen);
2045a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_CMD,
2046a9fcb51fSAdrian Chadd 		    "%s: submitting transfer %p; buf=%p, buflen=%d\n", __func__, cmd, cmd->buf, cmd->buflen);
2047a9fcb51fSAdrian Chadd 		usbd_transfer_submit(xfer);
2048a9fcb51fSAdrian Chadd 		break;
2049a9fcb51fSAdrian Chadd 	default:
2050a9fcb51fSAdrian Chadd 		cmd = STAILQ_FIRST(&sc->sc_cmd_active);
2051a9fcb51fSAdrian Chadd 		if (cmd != NULL) {
2052a9fcb51fSAdrian Chadd 			STAILQ_REMOVE_HEAD(&sc->sc_cmd_active, next_cmd);
2053a9fcb51fSAdrian Chadd 			otus_txcmdeof(xfer, cmd);
2054a9fcb51fSAdrian Chadd 		}
2055a9fcb51fSAdrian Chadd 
2056a9fcb51fSAdrian Chadd 		if (error != USB_ERR_CANCELLED) {
2057a9fcb51fSAdrian Chadd 			usbd_xfer_set_stall(xfer);
2058a9fcb51fSAdrian Chadd 			goto tr_setup;
2059a9fcb51fSAdrian Chadd 		}
2060a9fcb51fSAdrian Chadd 		break;
2061a9fcb51fSAdrian Chadd 	}
2062a9fcb51fSAdrian Chadd }
2063a9fcb51fSAdrian Chadd 
2064a9fcb51fSAdrian Chadd /*
2065a9fcb51fSAdrian Chadd  * This isn't used by carl9170; it however may be used by the
2066a9fcb51fSAdrian Chadd  * initial bootloader.
2067a9fcb51fSAdrian Chadd  */
2068a9fcb51fSAdrian Chadd static void
otus_bulk_irq_callback(struct usb_xfer * xfer,usb_error_t error)2069a9fcb51fSAdrian Chadd otus_bulk_irq_callback(struct usb_xfer *xfer, usb_error_t error)
2070a9fcb51fSAdrian Chadd {
2071a9fcb51fSAdrian Chadd 	struct otus_softc *sc = usbd_xfer_softc(xfer);
2072a9fcb51fSAdrian Chadd 	int actlen;
2073a9fcb51fSAdrian Chadd 	int sumlen;
2074a9fcb51fSAdrian Chadd 
2075a9fcb51fSAdrian Chadd 	usbd_xfer_status(xfer, &actlen, &sumlen, NULL, NULL);
2076a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ,
2077a9fcb51fSAdrian Chadd 	    "%s: called; state=%d\n", __func__, USB_GET_STATE(xfer));
2078a9fcb51fSAdrian Chadd 
2079a9fcb51fSAdrian Chadd 	switch (USB_GET_STATE(xfer)) {
2080a9fcb51fSAdrian Chadd 	case USB_ST_TRANSFERRED:
2081a9fcb51fSAdrian Chadd 		/*
2082a9fcb51fSAdrian Chadd 		 * Read usb frame data, if any.
2083a9fcb51fSAdrian Chadd 		 * "actlen" has the total length for all frames
2084a9fcb51fSAdrian Chadd 		 * transferred.
2085a9fcb51fSAdrian Chadd 		 */
2086a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ,
2087a9fcb51fSAdrian Chadd 		    "%s: comp; %d bytes\n",
2088a9fcb51fSAdrian Chadd 		    __func__,
2089a9fcb51fSAdrian Chadd 		    actlen);
2090a9fcb51fSAdrian Chadd #if 0
2091a9fcb51fSAdrian Chadd 		pc = usbd_xfer_get_frame(xfer, 0);
2092a9fcb51fSAdrian Chadd 		otus_dump_usb_rx_page(sc, pc, actlen);
2093a9fcb51fSAdrian Chadd #endif
2094a9fcb51fSAdrian Chadd 		/* XXX fallthrough */
2095a9fcb51fSAdrian Chadd 	case USB_ST_SETUP:
2096a9fcb51fSAdrian Chadd 		/*
2097a9fcb51fSAdrian Chadd 		 * Setup xfer frame lengths/count and data
2098a9fcb51fSAdrian Chadd 		 */
2099a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ, "%s: setup\n", __func__);
2100a9fcb51fSAdrian Chadd 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
2101a9fcb51fSAdrian Chadd 		usbd_transfer_submit(xfer);
2102a9fcb51fSAdrian Chadd 		break;
2103a9fcb51fSAdrian Chadd 
2104a9fcb51fSAdrian Chadd 	default: /* Error */
2105a9fcb51fSAdrian Chadd 		/*
2106a9fcb51fSAdrian Chadd 		 * Print error message and clear stall
2107a9fcb51fSAdrian Chadd 		 * for example.
2108a9fcb51fSAdrian Chadd 		 */
2109a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ, "%s: ERROR?\n", __func__);
2110a9fcb51fSAdrian Chadd 		break;
2111a9fcb51fSAdrian Chadd 	}
2112a9fcb51fSAdrian Chadd }
2113a9fcb51fSAdrian Chadd 
2114a9fcb51fSAdrian Chadd /*
2115a9fcb51fSAdrian Chadd  * Map net80211 rate to hw rate for otus MAC/PHY.
2116a9fcb51fSAdrian Chadd  */
2117a9fcb51fSAdrian Chadd static uint8_t
otus_rate_to_hw_rate(struct otus_softc * sc,uint8_t rate)2118a9fcb51fSAdrian Chadd otus_rate_to_hw_rate(struct otus_softc *sc, uint8_t rate)
2119a9fcb51fSAdrian Chadd {
2120a9fcb51fSAdrian Chadd 	int is_2ghz;
2121a9fcb51fSAdrian Chadd 
2122a9fcb51fSAdrian Chadd 	is_2ghz = !! (IEEE80211_IS_CHAN_2GHZ(sc->sc_ic.ic_curchan));
2123a9fcb51fSAdrian Chadd 
212453652fb9SAdrian Chadd 	/* MCS check */
212553652fb9SAdrian Chadd 	if (rate & 0x80) {
212653652fb9SAdrian Chadd 		return rate;
212753652fb9SAdrian Chadd 	}
212853652fb9SAdrian Chadd 
2129a9fcb51fSAdrian Chadd 	switch (rate) {
2130a9fcb51fSAdrian Chadd 	/* CCK */
2131a9fcb51fSAdrian Chadd 	case 2:
2132a9fcb51fSAdrian Chadd 		return (0x0);
2133a9fcb51fSAdrian Chadd 	case 4:
2134a9fcb51fSAdrian Chadd 		return (0x1);
2135a9fcb51fSAdrian Chadd 	case 11:
2136a9fcb51fSAdrian Chadd 		return (0x2);
2137a9fcb51fSAdrian Chadd 	case 22:
2138a9fcb51fSAdrian Chadd 		return (0x3);
2139a9fcb51fSAdrian Chadd 	/* OFDM */
2140a9fcb51fSAdrian Chadd 	case 12:
2141a9fcb51fSAdrian Chadd 		return (0xb);
2142a9fcb51fSAdrian Chadd 	case 18:
2143a9fcb51fSAdrian Chadd 		return (0xf);
2144a9fcb51fSAdrian Chadd 	case 24:
2145a9fcb51fSAdrian Chadd 		return (0xa);
2146a9fcb51fSAdrian Chadd 	case 36:
2147a9fcb51fSAdrian Chadd 		return (0xe);
2148a9fcb51fSAdrian Chadd 	case 48:
2149a9fcb51fSAdrian Chadd 		return (0x9);
2150a9fcb51fSAdrian Chadd 	case 72:
2151a9fcb51fSAdrian Chadd 		return (0xd);
2152a9fcb51fSAdrian Chadd 	case 96:
2153a9fcb51fSAdrian Chadd 		return (0x8);
2154a9fcb51fSAdrian Chadd 	case 108:
2155a9fcb51fSAdrian Chadd 		return (0xc);
2156a9fcb51fSAdrian Chadd 	default:
2157a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev, "%s: unknown rate '%d'\n",
2158a9fcb51fSAdrian Chadd 		    __func__, (int) rate);
2159a9fcb51fSAdrian Chadd 	case 0:
2160a9fcb51fSAdrian Chadd 		if (is_2ghz)
2161a9fcb51fSAdrian Chadd 			return (0x0);	/* 1MB CCK */
2162a9fcb51fSAdrian Chadd 		else
2163a9fcb51fSAdrian Chadd 			return (0xb);	/* 6MB OFDM */
2164a9fcb51fSAdrian Chadd 	}
2165a9fcb51fSAdrian Chadd }
2166a9fcb51fSAdrian Chadd 
2167a9fcb51fSAdrian Chadd static int
otus_hw_rate_is_ht(struct otus_softc * sc,uint8_t hw_rate)216853652fb9SAdrian Chadd otus_hw_rate_is_ht(struct otus_softc *sc, uint8_t hw_rate)
216953652fb9SAdrian Chadd {
217053652fb9SAdrian Chadd 
217153652fb9SAdrian Chadd 	return !! (hw_rate & 0x80);
217253652fb9SAdrian Chadd }
217353652fb9SAdrian Chadd 
217453652fb9SAdrian Chadd static int
otus_hw_rate_is_ofdm(struct otus_softc * sc,uint8_t hw_rate)2175a9fcb51fSAdrian Chadd otus_hw_rate_is_ofdm(struct otus_softc *sc, uint8_t hw_rate)
2176a9fcb51fSAdrian Chadd {
2177a9fcb51fSAdrian Chadd 
2178a9fcb51fSAdrian Chadd 	switch (hw_rate) {
2179a9fcb51fSAdrian Chadd 	case 0x0:
2180a9fcb51fSAdrian Chadd 	case 0x1:
2181a9fcb51fSAdrian Chadd 	case 0x2:
2182a9fcb51fSAdrian Chadd 	case 0x3:
2183a9fcb51fSAdrian Chadd 		return (0);
2184a9fcb51fSAdrian Chadd 	default:
2185a9fcb51fSAdrian Chadd 		return (1);
2186a9fcb51fSAdrian Chadd 	}
2187a9fcb51fSAdrian Chadd }
2188a9fcb51fSAdrian Chadd 
2189a9fcb51fSAdrian Chadd static void
otus_tx_update_ratectl(struct otus_softc * sc,struct ieee80211_node * ni)2190a9fcb51fSAdrian Chadd otus_tx_update_ratectl(struct otus_softc *sc, struct ieee80211_node *ni)
2191a9fcb51fSAdrian Chadd {
2192f6930becSAndriy Voskoboinyk 	struct ieee80211_ratectl_tx_stats *txs = &sc->sc_txs;
2193f6930becSAndriy Voskoboinyk 	struct otus_node *on = OTUS_NODE(ni);
2194a9fcb51fSAdrian Chadd 
2195f6930becSAndriy Voskoboinyk 	txs->flags = IEEE80211_RATECTL_TX_STATS_NODE |
2196f6930becSAndriy Voskoboinyk 		     IEEE80211_RATECTL_TX_STATS_RETRIES;
2197f6930becSAndriy Voskoboinyk 	txs->ni = ni;
2198f6930becSAndriy Voskoboinyk 	txs->nframes = on->tx_done;
2199f6930becSAndriy Voskoboinyk 	txs->nsuccess = on->tx_done - on->tx_err;
2200f6930becSAndriy Voskoboinyk 	txs->nretries = on->tx_retries;
2201a9fcb51fSAdrian Chadd 
2202f6930becSAndriy Voskoboinyk 	ieee80211_ratectl_tx_update(ni->ni_vap, txs);
2203f6930becSAndriy Voskoboinyk 	on->tx_done = on->tx_err = on->tx_retries = 0;
2204a9fcb51fSAdrian Chadd }
2205a9fcb51fSAdrian Chadd 
2206a9fcb51fSAdrian Chadd /*
2207a9fcb51fSAdrian Chadd  * XXX TODO: support tx bpf parameters for configuration!
22085433f357SAdrian Chadd  *
22095433f357SAdrian Chadd  * Relevant pieces:
22105433f357SAdrian Chadd  *
22115433f357SAdrian Chadd  * ac = params->ibp_pri & 3;
22125433f357SAdrian Chadd  * rate = params->ibp_rate0;
22135433f357SAdrian Chadd  * params->ibp_flags & IEEE80211_BPF_NOACK
22145433f357SAdrian Chadd  * params->ibp_flags & IEEE80211_BPF_RTS
22155433f357SAdrian Chadd  * params->ibp_flags & IEEE80211_BPF_CTS
22165433f357SAdrian Chadd  * tx->rts_ntries = params->ibp_try1;
22175433f357SAdrian Chadd  * tx->data_ntries = params->ibp_try0;
2218a9fcb51fSAdrian Chadd  */
2219a9fcb51fSAdrian Chadd static int
otus_tx(struct otus_softc * sc,struct ieee80211_node * ni,struct mbuf * m,struct otus_data * data,const struct ieee80211_bpf_params * params)2220a9fcb51fSAdrian Chadd otus_tx(struct otus_softc *sc, struct ieee80211_node *ni, struct mbuf *m,
22215433f357SAdrian Chadd     struct otus_data *data, const struct ieee80211_bpf_params *params)
2222a9fcb51fSAdrian Chadd {
2223cf268a83SAndriy Voskoboinyk 	const struct ieee80211_txparam *tp = ni->ni_txparms;
2224a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
2225a9fcb51fSAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
2226a9fcb51fSAdrian Chadd 	struct ieee80211_frame *wh;
2227a9fcb51fSAdrian Chadd 	struct ieee80211_key *k;
2228a9fcb51fSAdrian Chadd 	struct ar_tx_head *head;
2229a9fcb51fSAdrian Chadd 	uint32_t phyctl;
2230a9fcb51fSAdrian Chadd 	uint16_t macctl, qos;
2231a9fcb51fSAdrian Chadd 	uint8_t qid, rate;
2232cf268a83SAndriy Voskoboinyk 	int hasqos, xferlen, type, ismcast;
2233a9fcb51fSAdrian Chadd 
2234a9fcb51fSAdrian Chadd 	wh = mtod(m, struct ieee80211_frame *);
2235a9fcb51fSAdrian Chadd 	if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
2236a9fcb51fSAdrian Chadd 		k = ieee80211_crypto_encap(ni, m);
2237a9fcb51fSAdrian Chadd 		if (k == NULL) {
2238a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev,
2239a9fcb51fSAdrian Chadd 			    "%s: m=%p: ieee80211_crypto_encap returns NULL\n",
2240a9fcb51fSAdrian Chadd 			    __func__,
2241a9fcb51fSAdrian Chadd 			    m);
2242a9fcb51fSAdrian Chadd 			return (ENOBUFS);
2243a9fcb51fSAdrian Chadd 		}
2244a9fcb51fSAdrian Chadd 		wh = mtod(m, struct ieee80211_frame *);
2245a9fcb51fSAdrian Chadd 	}
2246a9fcb51fSAdrian Chadd 
2247a9fcb51fSAdrian Chadd 	/* Calculate transfer length; ensure data buffer is large enough */
2248a9fcb51fSAdrian Chadd 	xferlen = sizeof (*head) + m->m_pkthdr.len;
2249a9fcb51fSAdrian Chadd 	if (xferlen > OTUS_TXBUFSZ) {
2250a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
2251a9fcb51fSAdrian Chadd 		    "%s: 802.11 TX frame is %d bytes, max %d bytes\n",
2252a9fcb51fSAdrian Chadd 		    __func__,
2253a9fcb51fSAdrian Chadd 		    xferlen,
2254a9fcb51fSAdrian Chadd 		    OTUS_TXBUFSZ);
2255a9fcb51fSAdrian Chadd 		return (ENOBUFS);
2256a9fcb51fSAdrian Chadd 	}
2257a9fcb51fSAdrian Chadd 
2258a9fcb51fSAdrian Chadd 	hasqos = !! IEEE80211_QOS_HAS_SEQ(wh);
2259a9fcb51fSAdrian Chadd 
2260a9fcb51fSAdrian Chadd 	if (hasqos) {
2261a9fcb51fSAdrian Chadd 		uint8_t tid;
2262a9fcb51fSAdrian Chadd 		qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
2263a9fcb51fSAdrian Chadd 		tid = qos & IEEE80211_QOS_TID;
2264a9fcb51fSAdrian Chadd 		qid = TID_TO_WME_AC(tid);
2265a9fcb51fSAdrian Chadd 	} else {
2266a9fcb51fSAdrian Chadd 		qos = 0;
2267a9fcb51fSAdrian Chadd 		qid = WME_AC_BE;
2268a9fcb51fSAdrian Chadd 	}
2269a9fcb51fSAdrian Chadd 
2270cf268a83SAndriy Voskoboinyk 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2271cf268a83SAndriy Voskoboinyk 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
2272cf268a83SAndriy Voskoboinyk 
2273a9fcb51fSAdrian Chadd 	/* Pickup a rate index. */
2274cf268a83SAndriy Voskoboinyk 	if (params != NULL)
22755433f357SAdrian Chadd 		rate = otus_rate_to_hw_rate(sc, params->ibp_rate0);
2276cf268a83SAndriy Voskoboinyk 	else if (!!(m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA)
2277cf268a83SAndriy Voskoboinyk 		rate = otus_rate_to_hw_rate(sc, tp->mgmtrate);
2278cf268a83SAndriy Voskoboinyk 	else if (ismcast)
2279cf268a83SAndriy Voskoboinyk 		rate = otus_rate_to_hw_rate(sc, tp->mcastrate);
2280cf268a83SAndriy Voskoboinyk 	else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
2281cf268a83SAndriy Voskoboinyk 		rate = otus_rate_to_hw_rate(sc, tp->ucastrate);
2282cf268a83SAndriy Voskoboinyk 	else {
2283a9fcb51fSAdrian Chadd 		(void) ieee80211_ratectl_rate(ni, NULL, 0);
2284*70674500SAdrian Chadd 		rate = otus_rate_to_hw_rate(sc,
2285*70674500SAdrian Chadd 		    ieee80211_node_get_txrate_dot11rate(ni));
2286a9fcb51fSAdrian Chadd 	}
2287a9fcb51fSAdrian Chadd 
2288a9fcb51fSAdrian Chadd 	phyctl = 0;
2289a9fcb51fSAdrian Chadd 	macctl = AR_TX_MAC_BACKOFF | AR_TX_MAC_HW_DUR | AR_TX_MAC_QID(qid);
2290a9fcb51fSAdrian Chadd 
22915433f357SAdrian Chadd 	/*
22925433f357SAdrian Chadd 	 * XXX TODO: params for NOACK, ACK, RTS, CTS, etc
22935433f357SAdrian Chadd 	 */
2294cf268a83SAndriy Voskoboinyk 	if (ismcast ||
2295a9fcb51fSAdrian Chadd 	    (hasqos && ((qos & IEEE80211_QOS_ACKPOLICY) ==
2296a9fcb51fSAdrian Chadd 	     IEEE80211_QOS_ACKPOLICY_NOACK)))
2297a9fcb51fSAdrian Chadd 		macctl |= AR_TX_MAC_NOACK;
2298a9fcb51fSAdrian Chadd 
2299cf268a83SAndriy Voskoboinyk 	if (!ismcast) {
2300a9fcb51fSAdrian Chadd 		if (m->m_pkthdr.len + IEEE80211_CRC_LEN >= vap->iv_rtsthreshold)
2301a9fcb51fSAdrian Chadd 			macctl |= AR_TX_MAC_RTS;
230253652fb9SAdrian Chadd 		else if (otus_hw_rate_is_ht(sc, rate)) {
230353652fb9SAdrian Chadd 			if (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)
230453652fb9SAdrian Chadd 				macctl |= AR_TX_MAC_RTS;
230553652fb9SAdrian Chadd 		} else if (ic->ic_flags & IEEE80211_F_USEPROT) {
2306a9fcb51fSAdrian Chadd 			if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
2307a9fcb51fSAdrian Chadd 				macctl |= AR_TX_MAC_CTS;
2308a9fcb51fSAdrian Chadd 			else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
2309a9fcb51fSAdrian Chadd 				macctl |= AR_TX_MAC_RTS;
2310a9fcb51fSAdrian Chadd 		}
2311a9fcb51fSAdrian Chadd 	}
2312a9fcb51fSAdrian Chadd 
231353652fb9SAdrian Chadd 	phyctl |= AR_TX_PHY_MCS(rate & 0x7f); /* Note: MCS rates are 0x80 and above */
231453652fb9SAdrian Chadd 	if (otus_hw_rate_is_ht(sc, rate)) {
231553652fb9SAdrian Chadd 		phyctl |= AR_TX_PHY_MT_HT;
231653652fb9SAdrian Chadd 		/* Always use all tx antennas for now, just to be safe */
231753652fb9SAdrian Chadd 		phyctl |= AR_TX_PHY_ANTMSK(sc->txmask);
231853652fb9SAdrian Chadd 
231953652fb9SAdrian Chadd 		/* Heavy clip */
232053652fb9SAdrian Chadd 		phyctl |= (rate & 0x7) << AR_TX_PHY_TX_HEAVY_CLIP_SHIFT;
232153652fb9SAdrian Chadd 	} else if (otus_hw_rate_is_ofdm(sc, rate)) {
2322a9fcb51fSAdrian Chadd 		phyctl |= AR_TX_PHY_MT_OFDM;
2323a9fcb51fSAdrian Chadd 		/* Always use all tx antennas for now, just to be safe */
2324a9fcb51fSAdrian Chadd 		phyctl |= AR_TX_PHY_ANTMSK(sc->txmask);
2325a9fcb51fSAdrian Chadd 	} else {	/* CCK */
2326a9fcb51fSAdrian Chadd 		phyctl |= AR_TX_PHY_MT_CCK;
2327a9fcb51fSAdrian Chadd 		phyctl |= AR_TX_PHY_ANTMSK(sc->txmask);
2328a9fcb51fSAdrian Chadd 	}
2329a9fcb51fSAdrian Chadd 
2330a9fcb51fSAdrian Chadd 	/* Update net80211 with the current counters */
2331a9fcb51fSAdrian Chadd 	otus_tx_update_ratectl(sc, ni);
2332a9fcb51fSAdrian Chadd 
2333a9fcb51fSAdrian Chadd 	/* Update rate control stats for frames that are ACK'ed. */
2334a9fcb51fSAdrian Chadd 	if (!(macctl & AR_TX_MAC_NOACK))
2335a9fcb51fSAdrian Chadd 		OTUS_NODE(ni)->tx_done++;
2336a9fcb51fSAdrian Chadd 
2337a9fcb51fSAdrian Chadd 	/* Fill Tx descriptor. */
2338a9fcb51fSAdrian Chadd 	head = (struct ar_tx_head *)data->buf;
2339a9fcb51fSAdrian Chadd 	head->len = htole16(m->m_pkthdr.len + IEEE80211_CRC_LEN);
2340a9fcb51fSAdrian Chadd 	head->macctl = htole16(macctl);
2341a9fcb51fSAdrian Chadd 	head->phyctl = htole32(phyctl);
2342a9fcb51fSAdrian Chadd 
2343a9fcb51fSAdrian Chadd 	m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&head[1]);
2344a9fcb51fSAdrian Chadd 
2345a9fcb51fSAdrian Chadd 	data->buflen = xferlen;
2346a9fcb51fSAdrian Chadd 	data->ni = ni;
2347a9fcb51fSAdrian Chadd 	data->m = m;
2348a9fcb51fSAdrian Chadd 
2349a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
2350*70674500SAdrian Chadd 	    "%s: tx: m=%p; data=%p; len=%d mac=0x%04x phy=0x%08x "
2351*70674500SAdrian Chadd 	    "rate=0x%02x, dot11rate=%d\n",
23525433f357SAdrian Chadd 	    __func__, m, data, le16toh(head->len), macctl, phyctl,
2353*70674500SAdrian Chadd 	    (int) rate,
2354*70674500SAdrian Chadd 	    (int) ieee80211_node_get_txrate_dot11rate(ni));
2355a9fcb51fSAdrian Chadd 
2356a9fcb51fSAdrian Chadd 	/* Submit transfer */
2357a9fcb51fSAdrian Chadd 	STAILQ_INSERT_TAIL(&sc->sc_tx_pending[OTUS_BULK_TX], data, next);
2358a9fcb51fSAdrian Chadd 	usbd_transfer_start(sc->sc_xfer[OTUS_BULK_TX]);
2359a9fcb51fSAdrian Chadd 
2360a9fcb51fSAdrian Chadd 	return 0;
2361a9fcb51fSAdrian Chadd }
2362a9fcb51fSAdrian Chadd 
23632066c716SGleb Smirnoff static u_int
otus_hash_maddr(void * arg,struct sockaddr_dl * sdl,u_int cnt)23642066c716SGleb Smirnoff otus_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
2365a9fcb51fSAdrian Chadd {
23662066c716SGleb Smirnoff 	uint32_t val, *hashes = arg;
2367a9fcb51fSAdrian Chadd 
23682066c716SGleb Smirnoff 	val = le32dec(LLADDR(sdl) + 4);
2369a9fcb51fSAdrian Chadd 	/* Get address byte 5 */
2370a9fcb51fSAdrian Chadd 	val = val & 0x0000ff00;
2371a9fcb51fSAdrian Chadd 	val = val >> 8;
2372a9fcb51fSAdrian Chadd 
2373a9fcb51fSAdrian Chadd 	/* As per below, shift it >> 2 to get only 6 bits */
2374a9fcb51fSAdrian Chadd 	val = val >> 2;
2375a9fcb51fSAdrian Chadd 	if (val < 32)
23762066c716SGleb Smirnoff 		hashes[0] |= 1 << val;
2377a9fcb51fSAdrian Chadd 	else
23782066c716SGleb Smirnoff 		hashes[1] |= 1 << (val - 32);
23792066c716SGleb Smirnoff 
23802066c716SGleb Smirnoff 	return (1);
2381a9fcb51fSAdrian Chadd }
23822066c716SGleb Smirnoff 
23832066c716SGleb Smirnoff int
otus_set_multi(struct otus_softc * sc)23842066c716SGleb Smirnoff otus_set_multi(struct otus_softc *sc)
23852066c716SGleb Smirnoff {
23862066c716SGleb Smirnoff 	struct ieee80211com *ic = &sc->sc_ic;
23872066c716SGleb Smirnoff 	uint32_t hashes[2];
23882066c716SGleb Smirnoff 	int r;
23892066c716SGleb Smirnoff 
23902066c716SGleb Smirnoff 	if (ic->ic_allmulti > 0 || ic->ic_promisc > 0 ||
23912066c716SGleb Smirnoff 	    ic->ic_opmode == IEEE80211_M_MONITOR) {
23922066c716SGleb Smirnoff 		hashes[0] = 0xffffffff;
23932066c716SGleb Smirnoff 		hashes[1] = 0xffffffff;
23942066c716SGleb Smirnoff 	} else {
23952066c716SGleb Smirnoff 		struct ieee80211vap *vap;
23962066c716SGleb Smirnoff 
23972066c716SGleb Smirnoff 		hashes[0] = hashes[1] = 0;
23982066c716SGleb Smirnoff 		TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next)
23992066c716SGleb Smirnoff 			if_foreach_llmaddr(vap->iv_ifp, otus_hash_maddr,
24002066c716SGleb Smirnoff 			    hashes);
2401a9fcb51fSAdrian Chadd 	}
2402a9fcb51fSAdrian Chadd #if 0
2403a9fcb51fSAdrian Chadd 	/* XXX openbsd code */
2404a9fcb51fSAdrian Chadd 	while (enm != NULL) {
2405a9fcb51fSAdrian Chadd 		bit = enm->enm_addrlo[5] >> 2;
2406a9fcb51fSAdrian Chadd 		if (bit < 32)
24072066c716SGleb Smirnoff 			hashes[0] |= 1 << bit;
2408a9fcb51fSAdrian Chadd 		else
24092066c716SGleb Smirnoff 			hashes[1] |= 1 << (bit - 32);
2410a9fcb51fSAdrian Chadd 		ETHER_NEXT_MULTI(step, enm);
2411a9fcb51fSAdrian Chadd 	}
2412a9fcb51fSAdrian Chadd #endif
2413a9fcb51fSAdrian Chadd 
24142066c716SGleb Smirnoff 	hashes[1] |= 1U << 31;	/* Make sure the broadcast bit is set. */
2415a9fcb51fSAdrian Chadd 
2416a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
24172066c716SGleb Smirnoff 	otus_write(sc, AR_MAC_REG_GROUP_HASH_TBL_L, hashes[0]);
24182066c716SGleb Smirnoff 	otus_write(sc, AR_MAC_REG_GROUP_HASH_TBL_H, hashes[1]);
2419a9fcb51fSAdrian Chadd 	r = otus_write_barrier(sc);
2420b35978d0SAdrian Chadd 	/* XXX operating mode? filter? */
2421a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
2422a9fcb51fSAdrian Chadd 	return (r);
2423a9fcb51fSAdrian Chadd }
2424a9fcb51fSAdrian Chadd 
2425a14954c5SAndriy Voskoboinyk static int
otus_updateedca(struct ieee80211com * ic)2426a14954c5SAndriy Voskoboinyk otus_updateedca(struct ieee80211com *ic)
2427a14954c5SAndriy Voskoboinyk {
2428a14954c5SAndriy Voskoboinyk 	struct otus_softc *sc = ic->ic_softc;
2429a14954c5SAndriy Voskoboinyk 
2430a14954c5SAndriy Voskoboinyk 	OTUS_LOCK(sc);
2431a14954c5SAndriy Voskoboinyk 	/*
2432a14954c5SAndriy Voskoboinyk 	 * XXX TODO: take temporary copy of EDCA information
2433a14954c5SAndriy Voskoboinyk 	 * when scheduling this so we have a more time-correct view
2434a14954c5SAndriy Voskoboinyk 	 * of things.
2435a14954c5SAndriy Voskoboinyk 	 * XXX TODO: this can be done on the net80211 level
2436a14954c5SAndriy Voskoboinyk 	 */
2437a14954c5SAndriy Voskoboinyk 	otus_updateedca_locked(sc);
2438a14954c5SAndriy Voskoboinyk 	OTUS_UNLOCK(sc);
2439a14954c5SAndriy Voskoboinyk 	return (0);
2440a14954c5SAndriy Voskoboinyk }
2441a14954c5SAndriy Voskoboinyk 
2442a9fcb51fSAdrian Chadd static void
otus_updateedca_locked(struct otus_softc * sc)2443a14954c5SAndriy Voskoboinyk otus_updateedca_locked(struct otus_softc *sc)
2444a9fcb51fSAdrian Chadd {
2445a9fcb51fSAdrian Chadd #define EXP2(val)	((1 << (val)) - 1)
2446a9fcb51fSAdrian Chadd #define AIFS(val)	((val) * 9 + 10)
24479fbe631aSAdrian Chadd 	struct chanAccParams chp;
2448a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
2449a9fcb51fSAdrian Chadd 	const struct wmeParams *edca;
2450a9fcb51fSAdrian Chadd 
24519fbe631aSAdrian Chadd 	ieee80211_wme_ic_getparams(ic, &chp);
24529fbe631aSAdrian Chadd 
2453a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
2454a9fcb51fSAdrian Chadd 
24559fbe631aSAdrian Chadd 	edca = chp.cap_wmeParams;
2456a9fcb51fSAdrian Chadd 
2457a9fcb51fSAdrian Chadd 	/* Set CWmin/CWmax values. */
2458a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_AC0_CW,
2459a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_BE].wmep_logcwmax) << 16 |
2460a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_BE].wmep_logcwmin));
2461a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_AC1_CW,
2462a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_BK].wmep_logcwmax) << 16 |
2463a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_BK].wmep_logcwmin));
2464a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_AC2_CW,
2465a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_VI].wmep_logcwmax) << 16 |
2466a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_VI].wmep_logcwmin));
2467a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_AC3_CW,
2468a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_VO].wmep_logcwmax) << 16 |
2469a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_VO].wmep_logcwmin));
2470a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_AC4_CW,		/* Special TXQ. */
2471a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_VO].wmep_logcwmax) << 16 |
2472a9fcb51fSAdrian Chadd 	    EXP2(edca[WME_AC_VO].wmep_logcwmin));
2473a9fcb51fSAdrian Chadd 
2474a9fcb51fSAdrian Chadd 	/* Set AIFSN values. */
2475a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_AC1_AC0_AIFS,
2476a9fcb51fSAdrian Chadd 	    AIFS(edca[WME_AC_VI].wmep_aifsn) << 24 |
2477a9fcb51fSAdrian Chadd 	    AIFS(edca[WME_AC_BK].wmep_aifsn) << 12 |
2478a9fcb51fSAdrian Chadd 	    AIFS(edca[WME_AC_BE].wmep_aifsn));
2479a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_AC3_AC2_AIFS,
2480a9fcb51fSAdrian Chadd 	    AIFS(edca[WME_AC_VO].wmep_aifsn) << 16 |	/* Special TXQ. */
2481a9fcb51fSAdrian Chadd 	    AIFS(edca[WME_AC_VO].wmep_aifsn) <<  4 |
2482a9fcb51fSAdrian Chadd 	    AIFS(edca[WME_AC_VI].wmep_aifsn) >>  8);
2483a9fcb51fSAdrian Chadd 
2484a9fcb51fSAdrian Chadd 	/* Set TXOP limit. */
2485a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_AC1_AC0_TXOP,
2486a9fcb51fSAdrian Chadd 	    edca[WME_AC_BK].wmep_txopLimit << 16 |
2487a9fcb51fSAdrian Chadd 	    edca[WME_AC_BE].wmep_txopLimit);
2488a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_AC3_AC2_TXOP,
2489a9fcb51fSAdrian Chadd 	    edca[WME_AC_VO].wmep_txopLimit << 16 |
2490a9fcb51fSAdrian Chadd 	    edca[WME_AC_VI].wmep_txopLimit);
2491a9fcb51fSAdrian Chadd 
2492a9fcb51fSAdrian Chadd 	/* XXX ACK policy? */
2493a9fcb51fSAdrian Chadd 
2494a9fcb51fSAdrian Chadd 	(void)otus_write_barrier(sc);
2495a9fcb51fSAdrian Chadd 
2496a9fcb51fSAdrian Chadd #undef AIFS
2497a9fcb51fSAdrian Chadd #undef EXP2
2498a9fcb51fSAdrian Chadd }
2499a9fcb51fSAdrian Chadd 
2500a9fcb51fSAdrian Chadd static void
otus_updateslot(struct otus_softc * sc)2501a9fcb51fSAdrian Chadd otus_updateslot(struct otus_softc *sc)
2502a9fcb51fSAdrian Chadd {
2503a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
2504a9fcb51fSAdrian Chadd 	uint32_t slottime;
2505a9fcb51fSAdrian Chadd 
2506a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
2507a9fcb51fSAdrian Chadd 
2508bdfff33fSAndriy Voskoboinyk 	slottime = IEEE80211_GET_SLOTTIME(ic);
2509a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_SLOT_TIME, slottime << 10);
2510a9fcb51fSAdrian Chadd 	(void)otus_write_barrier(sc);
2511a9fcb51fSAdrian Chadd }
2512a9fcb51fSAdrian Chadd 
251353652fb9SAdrian Chadd /*
251453652fb9SAdrian Chadd  * Things to do based on 2GHz or 5GHz:
251553652fb9SAdrian Chadd  *
251653652fb9SAdrian Chadd  * + slottime
251753652fb9SAdrian Chadd  * + dyn_sifs_ack
251853652fb9SAdrian Chadd  * + rts_cts_rate
251953652fb9SAdrian Chadd  * + slot time
252053652fb9SAdrian Chadd  * + mac_rates
252153652fb9SAdrian Chadd  * + mac_tpc
252253652fb9SAdrian Chadd  *
252353652fb9SAdrian Chadd  * And in the transmit path
252453652fb9SAdrian Chadd  * + tpc: carl9170_tx_rate_tpc_chains
252553652fb9SAdrian Chadd  * + carl9170_tx_physet()
252653652fb9SAdrian Chadd  * + disable short premable tx
252753652fb9SAdrian Chadd  */
252853652fb9SAdrian Chadd 
2529a9fcb51fSAdrian Chadd int
otus_init_mac(struct otus_softc * sc)2530a9fcb51fSAdrian Chadd otus_init_mac(struct otus_softc *sc)
2531a9fcb51fSAdrian Chadd {
2532a9fcb51fSAdrian Chadd 	int error;
2533a9fcb51fSAdrian Chadd 
2534a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
2535a9fcb51fSAdrian Chadd 
2536a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_ACK_EXTENSION, 0x40);
2537a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_RETRY_MAX, 0);
2538a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_RX_THRESHOLD, 0xc1f80);
2539a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_RX_PE_DELAY, 0x70);
2540a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_EIFS_AND_SIFS, 0xa144000);
2541a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_SLOT_TIME, 9 << 10);
2542b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_TID_CFACK_CFEND_RATE, 0x19000000);
2543a9fcb51fSAdrian Chadd 	/* NAV protects ACK only (in TXOP). */
2544b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_TXOP_DURATION, 0x201);
2545a9fcb51fSAdrian Chadd 	/* Set beacon Tx power to 0x7. */
2546a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_BCN_HT1, 0x8000170);
2547a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_BACKOFF_PROTECT, 0x105);
2548b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_AMPDU_FACTOR, 0x10000a);
2549b35978d0SAdrian Chadd 
2550b35978d0SAdrian Chadd 	otus_set_rx_filter(sc);
2551b35978d0SAdrian Chadd 
2552a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_BASIC_RATE, 0x150f);
2553a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_MANDATORY_RATE, 0x150f);
2554a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_RTS_CTS_RATE, 0x10b01bb);
2555b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_ACK_TPC, 0x4003c1e);
2556b35978d0SAdrian Chadd 
2557a9fcb51fSAdrian Chadd 	/* Enable LED0 and LED1. */
2558b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_GPIO_REG_PORT_TYPE, 0x3);
2559b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_GPIO_REG_PORT_DATA, 0x3);
2560a9fcb51fSAdrian Chadd 	/* Switch MAC to OTUS interface. */
2561a9fcb51fSAdrian Chadd 	otus_write(sc, 0x1c3600, 0x3);
2562b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_AMPDU_RX_THRESH, 0xffff);
2563b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_MISC_680, 0xf00008);
2564a9fcb51fSAdrian Chadd 	/* Disable Rx timeout (workaround). */
2565b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_RX_TIMEOUT, 0);
2566a9fcb51fSAdrian Chadd 
2567a9fcb51fSAdrian Chadd 	/* Set USB Rx stream mode maximum frame number to 2. */
2568a9fcb51fSAdrian Chadd 	otus_write(sc, 0x1e1110, 0x4);
2569a9fcb51fSAdrian Chadd 	/* Set USB Rx stream mode timeout to 10us. */
2570a9fcb51fSAdrian Chadd 	otus_write(sc, 0x1e1114, 0x80);
2571a9fcb51fSAdrian Chadd 
2572a9fcb51fSAdrian Chadd 	/* Set clock frequency to 88/80MHz. */
2573b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_PWR_REG_CLOCK_SEL, 0x73);
2574a9fcb51fSAdrian Chadd 	/* Set WLAN DMA interrupt mode: generate intr per packet. */
2575b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_TXRX_MPI, 0x110011);
2576b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_FCS_SELECT, 0x4);
2577a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_TXOP_NOT_ENOUGH_INDICATION, 0x141e0f48);
2578a9fcb51fSAdrian Chadd 
2579a9fcb51fSAdrian Chadd 	/* Disable HW decryption for now. */
2580b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_ENCRYPTION, 0x78);
2581a9fcb51fSAdrian Chadd 
2582a9fcb51fSAdrian Chadd 	if ((error = otus_write_barrier(sc)) != 0)
2583a9fcb51fSAdrian Chadd 		return error;
2584a9fcb51fSAdrian Chadd 
2585a9fcb51fSAdrian Chadd 	/* Set default EDCA parameters. */
2586a14954c5SAndriy Voskoboinyk 	otus_updateedca_locked(sc);
2587a9fcb51fSAdrian Chadd 
2588a9fcb51fSAdrian Chadd 	return 0;
2589a9fcb51fSAdrian Chadd }
2590a9fcb51fSAdrian Chadd 
2591a9fcb51fSAdrian Chadd /*
2592a9fcb51fSAdrian Chadd  * Return default value for PHY register based on current operating mode.
2593a9fcb51fSAdrian Chadd  */
2594a9fcb51fSAdrian Chadd uint32_t
otus_phy_get_def(struct otus_softc * sc,uint32_t reg)2595a9fcb51fSAdrian Chadd otus_phy_get_def(struct otus_softc *sc, uint32_t reg)
2596a9fcb51fSAdrian Chadd {
2597a9fcb51fSAdrian Chadd 	int i;
2598a9fcb51fSAdrian Chadd 
2599a9fcb51fSAdrian Chadd 	for (i = 0; i < nitems(ar5416_phy_regs); i++)
2600a9fcb51fSAdrian Chadd 		if (AR_PHY(ar5416_phy_regs[i]) == reg)
2601a9fcb51fSAdrian Chadd 			return sc->phy_vals[i];
2602a9fcb51fSAdrian Chadd 	return 0;	/* Register not found. */
2603a9fcb51fSAdrian Chadd }
2604a9fcb51fSAdrian Chadd 
2605a9fcb51fSAdrian Chadd /*
2606a9fcb51fSAdrian Chadd  * Update PHY's programming based on vendor-specific data stored in EEPROM.
2607a9fcb51fSAdrian Chadd  * This is for FEM-type devices only.
2608a9fcb51fSAdrian Chadd  */
2609a9fcb51fSAdrian Chadd int
otus_set_board_values(struct otus_softc * sc,struct ieee80211_channel * c)2610a9fcb51fSAdrian Chadd otus_set_board_values(struct otus_softc *sc, struct ieee80211_channel *c)
2611a9fcb51fSAdrian Chadd {
2612a9fcb51fSAdrian Chadd 	const struct ModalEepHeader *eep;
2613a9fcb51fSAdrian Chadd 	uint32_t tmp, offset;
2614a9fcb51fSAdrian Chadd 
2615a9fcb51fSAdrian Chadd 	if (IEEE80211_IS_CHAN_5GHZ(c))
2616a9fcb51fSAdrian Chadd 		eep = &sc->eeprom.modalHeader[0];
2617a9fcb51fSAdrian Chadd 	else
2618a9fcb51fSAdrian Chadd 		eep = &sc->eeprom.modalHeader[1];
2619a9fcb51fSAdrian Chadd 
2620a9fcb51fSAdrian Chadd 	/* Offset of chain 2. */
2621a9fcb51fSAdrian Chadd 	offset = 2 * 0x1000;
2622a9fcb51fSAdrian Chadd 
2623a9fcb51fSAdrian Chadd 	tmp = le32toh(eep->antCtrlCommon);
2624a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_SWITCH_COM, tmp);
2625a9fcb51fSAdrian Chadd 
2626a9fcb51fSAdrian Chadd 	tmp = le32toh(eep->antCtrlChain[0]);
2627a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_SWITCH_CHAIN_0, tmp);
2628a9fcb51fSAdrian Chadd 
2629a9fcb51fSAdrian Chadd 	tmp = le32toh(eep->antCtrlChain[1]);
2630a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_SWITCH_CHAIN_0 + offset, tmp);
2631a9fcb51fSAdrian Chadd 
2632a9fcb51fSAdrian Chadd 	if (1 /* sc->sc_sco == AR_SCO_SCN */) {
2633a9fcb51fSAdrian Chadd 		tmp = otus_phy_get_def(sc, AR_PHY_SETTLING);
2634a9fcb51fSAdrian Chadd 		tmp &= ~(0x7f << 7);
2635a9fcb51fSAdrian Chadd 		tmp |= (eep->switchSettling & 0x7f) << 7;
2636a9fcb51fSAdrian Chadd 		otus_write(sc, AR_PHY_SETTLING, tmp);
2637a9fcb51fSAdrian Chadd 	}
2638a9fcb51fSAdrian Chadd 
2639a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_DESIRED_SZ);
2640a9fcb51fSAdrian Chadd 	tmp &= ~0xffff;
2641a9fcb51fSAdrian Chadd 	tmp |= eep->pgaDesiredSize << 8 | eep->adcDesiredSize;
2642a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_DESIRED_SZ, tmp);
2643a9fcb51fSAdrian Chadd 
2644a9fcb51fSAdrian Chadd 	tmp = eep->txEndToXpaOff << 24 | eep->txEndToXpaOff << 16 |
2645a9fcb51fSAdrian Chadd 	      eep->txFrameToXpaOn << 8 | eep->txFrameToXpaOn;
2646a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_RF_CTL4, tmp);
2647a9fcb51fSAdrian Chadd 
2648a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_RF_CTL3);
2649a9fcb51fSAdrian Chadd 	tmp &= ~(0xff << 16);
2650a9fcb51fSAdrian Chadd 	tmp |= eep->txEndToRxOn << 16;
2651a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_RF_CTL3, tmp);
2652a9fcb51fSAdrian Chadd 
2653a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_CCA);
2654a9fcb51fSAdrian Chadd 	tmp &= ~(0x7f << 12);
2655a9fcb51fSAdrian Chadd 	tmp |= (eep->thresh62 & 0x7f) << 12;
2656a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_CCA, tmp);
2657a9fcb51fSAdrian Chadd 
2658a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_RXGAIN);
2659a9fcb51fSAdrian Chadd 	tmp &= ~(0x3f << 12);
2660a9fcb51fSAdrian Chadd 	tmp |= (eep->txRxAttenCh[0] & 0x3f) << 12;
2661a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_RXGAIN, tmp);
2662a9fcb51fSAdrian Chadd 
2663a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_RXGAIN + offset);
2664a9fcb51fSAdrian Chadd 	tmp &= ~(0x3f << 12);
2665a9fcb51fSAdrian Chadd 	tmp |= (eep->txRxAttenCh[1] & 0x3f) << 12;
2666a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_RXGAIN + offset, tmp);
2667a9fcb51fSAdrian Chadd 
2668a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_GAIN_2GHZ);
2669a9fcb51fSAdrian Chadd 	tmp &= ~(0x3f << 18);
2670a9fcb51fSAdrian Chadd 	tmp |= (eep->rxTxMarginCh[0] & 0x3f) << 18;
2671a9fcb51fSAdrian Chadd 	if (IEEE80211_IS_CHAN_5GHZ(c)) {
2672a9fcb51fSAdrian Chadd 		tmp &= ~(0xf << 10);
2673a9fcb51fSAdrian Chadd 		tmp |= (eep->bswMargin[0] & 0xf) << 10;
2674a9fcb51fSAdrian Chadd 	}
2675a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_GAIN_2GHZ, tmp);
2676a9fcb51fSAdrian Chadd 
2677a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_GAIN_2GHZ + offset);
2678a9fcb51fSAdrian Chadd 	tmp &= ~(0x3f << 18);
2679a9fcb51fSAdrian Chadd 	tmp |= (eep->rxTxMarginCh[1] & 0x3f) << 18;
2680a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_GAIN_2GHZ + offset, tmp);
2681a9fcb51fSAdrian Chadd 
2682a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_TIMING_CTRL4);
2683a9fcb51fSAdrian Chadd 	tmp &= ~(0x3f << 5 | 0x1f);
2684a9fcb51fSAdrian Chadd 	tmp |= (eep->iqCalICh[0] & 0x3f) << 5 | (eep->iqCalQCh[0] & 0x1f);
2685a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_TIMING_CTRL4, tmp);
2686a9fcb51fSAdrian Chadd 
2687a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_TIMING_CTRL4 + offset);
2688a9fcb51fSAdrian Chadd 	tmp &= ~(0x3f << 5 | 0x1f);
2689a9fcb51fSAdrian Chadd 	tmp |= (eep->iqCalICh[1] & 0x3f) << 5 | (eep->iqCalQCh[1] & 0x1f);
2690a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_TIMING_CTRL4 + offset, tmp);
2691a9fcb51fSAdrian Chadd 
2692a9fcb51fSAdrian Chadd 	tmp = otus_phy_get_def(sc, AR_PHY_TPCRG1);
2693a9fcb51fSAdrian Chadd 	tmp &= ~(0xf << 16);
2694a9fcb51fSAdrian Chadd 	tmp |= (eep->xpd & 0xf) << 16;
2695a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_TPCRG1, tmp);
2696a9fcb51fSAdrian Chadd 
2697a9fcb51fSAdrian Chadd 	return otus_write_barrier(sc);
2698a9fcb51fSAdrian Chadd }
2699a9fcb51fSAdrian Chadd 
2700a9fcb51fSAdrian Chadd int
otus_program_phy(struct otus_softc * sc,struct ieee80211_channel * c)2701a9fcb51fSAdrian Chadd otus_program_phy(struct otus_softc *sc, struct ieee80211_channel *c)
2702a9fcb51fSAdrian Chadd {
2703a9fcb51fSAdrian Chadd 	const uint32_t *vals;
2704a9fcb51fSAdrian Chadd 	int error, i;
2705a9fcb51fSAdrian Chadd 
2706a9fcb51fSAdrian Chadd 	/* Select PHY programming based on band and bandwidth. */
270753652fb9SAdrian Chadd 	if (IEEE80211_IS_CHAN_2GHZ(c)) {
270853652fb9SAdrian Chadd 		if (IEEE80211_IS_CHAN_HT40(c))
270953652fb9SAdrian Chadd 			vals = ar5416_phy_vals_2ghz_40mhz;
271053652fb9SAdrian Chadd 		else
2711a9fcb51fSAdrian Chadd 			vals = ar5416_phy_vals_2ghz_20mhz;
271253652fb9SAdrian Chadd 	} else {
271353652fb9SAdrian Chadd 		if (IEEE80211_IS_CHAN_HT40(c))
271453652fb9SAdrian Chadd 			vals = ar5416_phy_vals_5ghz_40mhz;
2715a9fcb51fSAdrian Chadd 		else
2716a9fcb51fSAdrian Chadd 			vals = ar5416_phy_vals_5ghz_20mhz;
271753652fb9SAdrian Chadd 	}
2718a9fcb51fSAdrian Chadd 	for (i = 0; i < nitems(ar5416_phy_regs); i++)
2719a9fcb51fSAdrian Chadd 		otus_write(sc, AR_PHY(ar5416_phy_regs[i]), vals[i]);
2720a9fcb51fSAdrian Chadd 	sc->phy_vals = vals;
2721a9fcb51fSAdrian Chadd 
2722a9fcb51fSAdrian Chadd 	if (sc->eeprom.baseEepHeader.deviceType == 0x80)	/* FEM */
2723a9fcb51fSAdrian Chadd 		if ((error = otus_set_board_values(sc, c)) != 0)
2724a9fcb51fSAdrian Chadd 			return error;
2725a9fcb51fSAdrian Chadd 
2726a9fcb51fSAdrian Chadd 	/* Initial Tx power settings. */
2727a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE_MAX, 0x7f);
2728a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE1, 0x3f3f3f3f);
2729a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE2, 0x3f3f3f3f);
2730a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE3, 0x3f3f3f3f);
2731a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE4, 0x3f3f3f3f);
2732a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE5, 0x3f3f3f3f);
2733a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE6, 0x3f3f3f3f);
2734a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE7, 0x3f3f3f3f);
2735a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE8, 0x3f3f3f3f);
2736a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_POWER_TX_RATE9, 0x3f3f3f3f);
2737a9fcb51fSAdrian Chadd 
2738a9fcb51fSAdrian Chadd 	if (IEEE80211_IS_CHAN_2GHZ(c))
2739b0f4d8f0SAdrian Chadd 		otus_write(sc, AR_PWR_REG_PLL_ADDAC, 0x5163);
2740a9fcb51fSAdrian Chadd 	else
2741b0f4d8f0SAdrian Chadd 		otus_write(sc, AR_PWR_REG_PLL_ADDAC, 0x5143);
2742a9fcb51fSAdrian Chadd 
2743a9fcb51fSAdrian Chadd 	return otus_write_barrier(sc);
2744a9fcb51fSAdrian Chadd }
2745a9fcb51fSAdrian Chadd 
2746a9fcb51fSAdrian Chadd static __inline uint8_t
otus_reverse_bits(uint8_t v)2747a9fcb51fSAdrian Chadd otus_reverse_bits(uint8_t v)
2748a9fcb51fSAdrian Chadd {
2749a9fcb51fSAdrian Chadd 	v = ((v >> 1) & 0x55) | ((v & 0x55) << 1);
2750a9fcb51fSAdrian Chadd 	v = ((v >> 2) & 0x33) | ((v & 0x33) << 2);
2751a9fcb51fSAdrian Chadd 	v = ((v >> 4) & 0x0f) | ((v & 0x0f) << 4);
2752a9fcb51fSAdrian Chadd 	return v;
2753a9fcb51fSAdrian Chadd }
2754a9fcb51fSAdrian Chadd 
2755a9fcb51fSAdrian Chadd int
otus_set_rf_bank4(struct otus_softc * sc,struct ieee80211_channel * c)2756a9fcb51fSAdrian Chadd otus_set_rf_bank4(struct otus_softc *sc, struct ieee80211_channel *c)
2757a9fcb51fSAdrian Chadd {
2758a9fcb51fSAdrian Chadd 	uint8_t chansel, d0, d1;
2759a9fcb51fSAdrian Chadd 	uint16_t data;
2760a9fcb51fSAdrian Chadd 	int error;
2761a9fcb51fSAdrian Chadd 
2762a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
2763a9fcb51fSAdrian Chadd 
2764a9fcb51fSAdrian Chadd 	d0 = 0;
2765a9fcb51fSAdrian Chadd 	if (IEEE80211_IS_CHAN_5GHZ(c)) {
2766a9fcb51fSAdrian Chadd 		chansel = (c->ic_freq - 4800) / 5;
2767a9fcb51fSAdrian Chadd 		if (chansel & 1)
2768a9fcb51fSAdrian Chadd 			d0 |= AR_BANK4_AMODE_REFSEL(2);
2769a9fcb51fSAdrian Chadd 		else
2770a9fcb51fSAdrian Chadd 			d0 |= AR_BANK4_AMODE_REFSEL(1);
2771a9fcb51fSAdrian Chadd 	} else {
2772a9fcb51fSAdrian Chadd 		d0 |= AR_BANK4_AMODE_REFSEL(2);
2773a9fcb51fSAdrian Chadd 		if (c->ic_freq == 2484) {	/* CH 14 */
2774a9fcb51fSAdrian Chadd 			d0 |= AR_BANK4_BMODE_LF_SYNTH_FREQ;
2775a9fcb51fSAdrian Chadd 			chansel = 10 + (c->ic_freq - 2274) / 5;
2776a9fcb51fSAdrian Chadd 		} else
2777a9fcb51fSAdrian Chadd 			chansel = 16 + (c->ic_freq - 2272) / 5;
2778a9fcb51fSAdrian Chadd 		chansel <<= 2;
2779a9fcb51fSAdrian Chadd 	}
2780a9fcb51fSAdrian Chadd 	d0 |= AR_BANK4_ADDR(1) | AR_BANK4_CHUP;
2781a9fcb51fSAdrian Chadd 	d1 = otus_reverse_bits(chansel);
2782a9fcb51fSAdrian Chadd 
2783a9fcb51fSAdrian Chadd 	/* Write bits 0-4 of d0 and d1. */
2784a9fcb51fSAdrian Chadd 	data = (d1 & 0x1f) << 5 | (d0 & 0x1f);
2785a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY(44), data);
2786a9fcb51fSAdrian Chadd 	/* Write bits 5-7 of d0 and d1. */
2787a9fcb51fSAdrian Chadd 	data = (d1 >> 5) << 5 | (d0 >> 5);
2788a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY(58), data);
2789a9fcb51fSAdrian Chadd 
2790a9fcb51fSAdrian Chadd 	if ((error = otus_write_barrier(sc)) == 0)
2791a9fcb51fSAdrian Chadd 		otus_delay_ms(sc, 10);
2792a9fcb51fSAdrian Chadd 	return error;
2793a9fcb51fSAdrian Chadd }
2794a9fcb51fSAdrian Chadd 
2795a9fcb51fSAdrian Chadd void
otus_get_delta_slope(uint32_t coeff,uint32_t * exponent,uint32_t * mantissa)2796a9fcb51fSAdrian Chadd otus_get_delta_slope(uint32_t coeff, uint32_t *exponent, uint32_t *mantissa)
2797a9fcb51fSAdrian Chadd {
2798a9fcb51fSAdrian Chadd #define COEFF_SCALE_SHIFT	24
2799a9fcb51fSAdrian Chadd 	uint32_t exp, man;
2800a9fcb51fSAdrian Chadd 
2801a9fcb51fSAdrian Chadd 	/* exponent = 14 - floor(log2(coeff)) */
2802a9fcb51fSAdrian Chadd 	for (exp = 31; exp > 0; exp--)
2803a9fcb51fSAdrian Chadd 		if (coeff & (1 << exp))
2804a9fcb51fSAdrian Chadd 			break;
2805a9fcb51fSAdrian Chadd 	KASSERT(exp != 0, ("exp"));
2806a9fcb51fSAdrian Chadd 	exp = 14 - (exp - COEFF_SCALE_SHIFT);
2807a9fcb51fSAdrian Chadd 
2808a9fcb51fSAdrian Chadd 	/* mantissa = floor(coeff * 2^exponent + 0.5) */
2809a9fcb51fSAdrian Chadd 	man = coeff + (1 << (COEFF_SCALE_SHIFT - exp - 1));
2810a9fcb51fSAdrian Chadd 
2811a9fcb51fSAdrian Chadd 	*mantissa = man >> (COEFF_SCALE_SHIFT - exp);
2812a9fcb51fSAdrian Chadd 	*exponent = exp - 16;
2813a9fcb51fSAdrian Chadd #undef COEFF_SCALE_SHIFT
2814a9fcb51fSAdrian Chadd }
2815a9fcb51fSAdrian Chadd 
2816a9fcb51fSAdrian Chadd static int
otus_set_chan(struct otus_softc * sc,struct ieee80211_channel * c,int assoc)2817a9fcb51fSAdrian Chadd otus_set_chan(struct otus_softc *sc, struct ieee80211_channel *c, int assoc)
2818a9fcb51fSAdrian Chadd {
2819a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
2820a9fcb51fSAdrian Chadd 	struct ar_cmd_frequency cmd;
2821a9fcb51fSAdrian Chadd 	struct ar_rsp_frequency rsp;
2822a9fcb51fSAdrian Chadd 	const uint32_t *vals;
2823a9fcb51fSAdrian Chadd 	uint32_t coeff, exp, man, tmp;
2824a9fcb51fSAdrian Chadd 	uint8_t code;
2825a9fcb51fSAdrian Chadd 	int error, chan, i;
2826a9fcb51fSAdrian Chadd 
2827a9fcb51fSAdrian Chadd 	error = 0;
2828a9fcb51fSAdrian Chadd 	chan = ieee80211_chan2ieee(ic, c);
2829a9fcb51fSAdrian Chadd 
2830a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2831a9fcb51fSAdrian Chadd 	    "setting channel %d (%dMHz)\n", chan, c->ic_freq);
2832a9fcb51fSAdrian Chadd 
2833a9fcb51fSAdrian Chadd 	tmp = IEEE80211_IS_CHAN_2GHZ(c) ? 0x105 : 0x104;
2834a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_DYNAMIC_SIFS_ACK, tmp);
2835a9fcb51fSAdrian Chadd 	if ((error = otus_write_barrier(sc)) != 0)
2836a9fcb51fSAdrian Chadd 		goto finish;
2837a9fcb51fSAdrian Chadd 
2838a9fcb51fSAdrian Chadd 	/* Disable BB Heavy Clip. */
2839a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_HEAVY_CLIP_ENABLE, 0x200);
2840a9fcb51fSAdrian Chadd 	if ((error = otus_write_barrier(sc)) != 0)
2841a9fcb51fSAdrian Chadd 		goto finish;
2842a9fcb51fSAdrian Chadd 
2843a9fcb51fSAdrian Chadd 	/* XXX Is that FREQ_START ? */
2844c4dabdf7SAdrian Chadd 	error = otus_cmd(sc, AR_CMD_FREQ_STRAT, NULL, 0, NULL, 0);
2845a9fcb51fSAdrian Chadd 	if (error != 0)
2846a9fcb51fSAdrian Chadd 		goto finish;
2847a9fcb51fSAdrian Chadd 
2848a9fcb51fSAdrian Chadd 	/* Reprogram PHY and RF on channel band or bandwidth changes. */
2849a9fcb51fSAdrian Chadd 	if (sc->bb_reset || c->ic_flags != sc->sc_curchan->ic_flags) {
2850a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_RESET, "band switch\n");
2851a9fcb51fSAdrian Chadd 
2852a9fcb51fSAdrian Chadd 		/* Cold/Warm reset BB/ADDA. */
2853b0f4d8f0SAdrian Chadd 		otus_write(sc, AR_PWR_REG_RESET, sc->bb_reset ? 0x800 : 0x400);
2854a9fcb51fSAdrian Chadd 		if ((error = otus_write_barrier(sc)) != 0)
2855a9fcb51fSAdrian Chadd 			goto finish;
2856b0f4d8f0SAdrian Chadd 		otus_write(sc, AR_PWR_REG_RESET, 0);
2857a9fcb51fSAdrian Chadd 		if ((error = otus_write_barrier(sc)) != 0)
2858a9fcb51fSAdrian Chadd 			goto finish;
2859a9fcb51fSAdrian Chadd 		sc->bb_reset = 0;
2860a9fcb51fSAdrian Chadd 
2861a9fcb51fSAdrian Chadd 		if ((error = otus_program_phy(sc, c)) != 0) {
2862a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev,
2863a9fcb51fSAdrian Chadd 			    "%s: could not program PHY\n",
2864a9fcb51fSAdrian Chadd 			    __func__);
2865a9fcb51fSAdrian Chadd 			goto finish;
2866a9fcb51fSAdrian Chadd 		}
2867a9fcb51fSAdrian Chadd 
2868a9fcb51fSAdrian Chadd 		/* Select RF programming based on band. */
2869a9fcb51fSAdrian Chadd 		if (IEEE80211_IS_CHAN_5GHZ(c))
2870a9fcb51fSAdrian Chadd 			vals = ar5416_banks_vals_5ghz;
2871a9fcb51fSAdrian Chadd 		else
2872a9fcb51fSAdrian Chadd 			vals = ar5416_banks_vals_2ghz;
2873a9fcb51fSAdrian Chadd 		for (i = 0; i < nitems(ar5416_banks_regs); i++)
2874a9fcb51fSAdrian Chadd 			otus_write(sc, AR_PHY(ar5416_banks_regs[i]), vals[i]);
2875a9fcb51fSAdrian Chadd 		if ((error = otus_write_barrier(sc)) != 0) {
2876a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev,
2877a9fcb51fSAdrian Chadd 			    "%s: could not program RF\n",
2878a9fcb51fSAdrian Chadd 			    __func__);
2879a9fcb51fSAdrian Chadd 			goto finish;
2880a9fcb51fSAdrian Chadd 		}
2881a9fcb51fSAdrian Chadd 		code = AR_CMD_RF_INIT;
2882a9fcb51fSAdrian Chadd 	} else {
2883a9fcb51fSAdrian Chadd 		code = AR_CMD_FREQUENCY;
2884a9fcb51fSAdrian Chadd 	}
2885a9fcb51fSAdrian Chadd 
2886a9fcb51fSAdrian Chadd 	if ((error = otus_set_rf_bank4(sc, c)) != 0)
2887a9fcb51fSAdrian Chadd 		goto finish;
2888a9fcb51fSAdrian Chadd 
2889a9fcb51fSAdrian Chadd 	tmp = (sc->txmask == 0x5) ? 0x340 : 0x240;
2890a9fcb51fSAdrian Chadd 	otus_write(sc, AR_PHY_TURBO, tmp);
2891a9fcb51fSAdrian Chadd 	if ((error = otus_write_barrier(sc)) != 0)
2892a9fcb51fSAdrian Chadd 		goto finish;
2893a9fcb51fSAdrian Chadd 
2894a9fcb51fSAdrian Chadd 	/* Send firmware command to set channel. */
2895a9fcb51fSAdrian Chadd 	cmd.freq = htole32((uint32_t)c->ic_freq * 1000);
2896a9fcb51fSAdrian Chadd 	cmd.dynht2040 = htole32(0);
2897a9fcb51fSAdrian Chadd 	cmd.htena = htole32(1);
2898a9fcb51fSAdrian Chadd 	/* Set Delta Slope (exponent and mantissa). */
2899a9fcb51fSAdrian Chadd 	coeff = (100 << 24) / c->ic_freq;
2900a9fcb51fSAdrian Chadd 	otus_get_delta_slope(coeff, &exp, &man);
2901a9fcb51fSAdrian Chadd 	cmd.dsc_exp = htole32(exp);
2902a9fcb51fSAdrian Chadd 	cmd.dsc_man = htole32(man);
2903a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2904a9fcb51fSAdrian Chadd 	    "ds coeff=%u exp=%u man=%u\n", coeff, exp, man);
2905a9fcb51fSAdrian Chadd 	/* For Short GI, coeff is 9/10 that of normal coeff. */
2906a9fcb51fSAdrian Chadd 	coeff = (9 * coeff) / 10;
2907a9fcb51fSAdrian Chadd 	otus_get_delta_slope(coeff, &exp, &man);
2908a9fcb51fSAdrian Chadd 	cmd.dsc_shgi_exp = htole32(exp);
2909a9fcb51fSAdrian Chadd 	cmd.dsc_shgi_man = htole32(man);
2910a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2911a9fcb51fSAdrian Chadd 	    "ds shgi coeff=%u exp=%u man=%u\n", coeff, exp, man);
2912a9fcb51fSAdrian Chadd 	/* Set wait time for AGC and noise calibration (100 or 200ms). */
2913a9fcb51fSAdrian Chadd 	cmd.check_loop_count = assoc ? htole32(2000) : htole32(1000);
2914a9fcb51fSAdrian Chadd 	OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2915a9fcb51fSAdrian Chadd 	    "%s\n", (code == AR_CMD_RF_INIT) ? "RF_INIT" : "FREQUENCY");
2916c4dabdf7SAdrian Chadd 	error = otus_cmd(sc, code, &cmd, sizeof cmd, &rsp, sizeof(rsp));
2917a9fcb51fSAdrian Chadd 	if (error != 0)
2918a9fcb51fSAdrian Chadd 		goto finish;
2919a9fcb51fSAdrian Chadd 	if ((rsp.status & htole32(AR_CAL_ERR_AGC | AR_CAL_ERR_NF_VAL)) != 0) {
2920a9fcb51fSAdrian Chadd 		OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2921a9fcb51fSAdrian Chadd 		    "status=0x%x\n", le32toh(rsp.status));
2922a9fcb51fSAdrian Chadd 		/* Force cold reset on next channel. */
2923a9fcb51fSAdrian Chadd 		sc->bb_reset = 1;
2924a9fcb51fSAdrian Chadd 	}
2925a9fcb51fSAdrian Chadd #ifdef USB_DEBUG
2926a9fcb51fSAdrian Chadd 	if (otus_debug & OTUS_DEBUG_RESET) {
2927a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev, "calibration status=0x%x\n",
2928a9fcb51fSAdrian Chadd 		    le32toh(rsp.status));
2929a9fcb51fSAdrian Chadd 		for (i = 0; i < 2; i++) {	/* 2 Rx chains */
2930a9fcb51fSAdrian Chadd 			/* Sign-extend 9-bit NF values. */
2931a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev,
2932a9fcb51fSAdrian Chadd 			    "noisefloor chain %d=%d\n", i,
2933a9fcb51fSAdrian Chadd 			    (((int32_t)le32toh(rsp.nf[i])) << 4) >> 23);
2934a9fcb51fSAdrian Chadd 			device_printf(sc->sc_dev,
2935a9fcb51fSAdrian Chadd 			    "noisefloor ext chain %d=%d\n", i,
2936a9fcb51fSAdrian Chadd 			    ((int32_t)le32toh(rsp.nf_ext[i])) >> 23);
2937a9fcb51fSAdrian Chadd 		}
2938a9fcb51fSAdrian Chadd 	}
2939a9fcb51fSAdrian Chadd #endif
2940a9fcb51fSAdrian Chadd 	for (i = 0; i < OTUS_NUM_CHAINS; i++) {
2941a9fcb51fSAdrian Chadd 		sc->sc_nf[i] = ((((int32_t)le32toh(rsp.nf[i])) << 4) >> 23);
2942a9fcb51fSAdrian Chadd 	}
2943a9fcb51fSAdrian Chadd 	sc->sc_curchan = c;
2944a9fcb51fSAdrian Chadd finish:
2945a9fcb51fSAdrian Chadd 	return (error);
2946a9fcb51fSAdrian Chadd }
2947a9fcb51fSAdrian Chadd 
2948a9fcb51fSAdrian Chadd #ifdef notyet
2949a9fcb51fSAdrian Chadd int
otus_set_key(struct ieee80211com * ic,struct ieee80211_node * ni,struct ieee80211_key * k)2950a9fcb51fSAdrian Chadd otus_set_key(struct ieee80211com *ic, struct ieee80211_node *ni,
2951a9fcb51fSAdrian Chadd     struct ieee80211_key *k)
2952a9fcb51fSAdrian Chadd {
2953a9fcb51fSAdrian Chadd 	struct otus_softc *sc = ic->ic_softc;
2954a9fcb51fSAdrian Chadd 	struct otus_cmd_key cmd;
2955a9fcb51fSAdrian Chadd 
2956a9fcb51fSAdrian Chadd 	/* Defer setting of WEP keys until interface is brought up. */
2957a9fcb51fSAdrian Chadd 	if ((ic->ic_if.if_flags & (IFF_UP | IFF_RUNNING)) !=
2958a9fcb51fSAdrian Chadd 	    (IFF_UP | IFF_RUNNING))
2959a9fcb51fSAdrian Chadd 		return 0;
2960a9fcb51fSAdrian Chadd 
2961a9fcb51fSAdrian Chadd 	/* Do it in a process context. */
2962a9fcb51fSAdrian Chadd 	cmd.key = *k;
2963a9fcb51fSAdrian Chadd 	cmd.associd = (ni != NULL) ? ni->ni_associd : 0;
2964a9fcb51fSAdrian Chadd 	otus_do_async(sc, otus_set_key_cb, &cmd, sizeof cmd);
2965a9fcb51fSAdrian Chadd 	return 0;
2966a9fcb51fSAdrian Chadd }
2967a9fcb51fSAdrian Chadd 
2968a9fcb51fSAdrian Chadd void
otus_set_key_cb(struct otus_softc * sc,void * arg)2969a9fcb51fSAdrian Chadd otus_set_key_cb(struct otus_softc *sc, void *arg)
2970a9fcb51fSAdrian Chadd {
2971a9fcb51fSAdrian Chadd 	struct otus_cmd_key *cmd = arg;
2972a9fcb51fSAdrian Chadd 	struct ieee80211_key *k = &cmd->key;
2973a9fcb51fSAdrian Chadd 	struct ar_cmd_ekey key;
2974a9fcb51fSAdrian Chadd 	uint16_t cipher;
2975a9fcb51fSAdrian Chadd 	int error;
2976a9fcb51fSAdrian Chadd 
2977a9fcb51fSAdrian Chadd 	memset(&key, 0, sizeof key);
2978a9fcb51fSAdrian Chadd 	if (k->k_flags & IEEE80211_KEY_GROUP) {
2979a9fcb51fSAdrian Chadd 		key.uid = htole16(k->k_id);
2980a9fcb51fSAdrian Chadd 		IEEE80211_ADDR_COPY(key.macaddr, sc->sc_ic.ic_myaddr);
2981a9fcb51fSAdrian Chadd 		key.macaddr[0] |= 0x80;
2982a9fcb51fSAdrian Chadd 	} else {
2983a9fcb51fSAdrian Chadd 		key.uid = htole16(OTUS_UID(cmd->associd));
2984a9fcb51fSAdrian Chadd 		IEEE80211_ADDR_COPY(key.macaddr, ni->ni_macaddr);
2985a9fcb51fSAdrian Chadd 	}
2986a9fcb51fSAdrian Chadd 	key.kix = htole16(0);
2987a9fcb51fSAdrian Chadd 	/* Map net80211 cipher to hardware. */
2988a9fcb51fSAdrian Chadd 	switch (k->k_cipher) {
2989a9fcb51fSAdrian Chadd 	case IEEE80211_CIPHER_WEP40:
2990a9fcb51fSAdrian Chadd 		cipher = AR_CIPHER_WEP64;
2991a9fcb51fSAdrian Chadd 		break;
2992a9fcb51fSAdrian Chadd 	case IEEE80211_CIPHER_WEP104:
2993a9fcb51fSAdrian Chadd 		cipher = AR_CIPHER_WEP128;
2994a9fcb51fSAdrian Chadd 		break;
2995a9fcb51fSAdrian Chadd 	case IEEE80211_CIPHER_TKIP:
2996a9fcb51fSAdrian Chadd 		cipher = AR_CIPHER_TKIP;
2997a9fcb51fSAdrian Chadd 		break;
2998a9fcb51fSAdrian Chadd 	case IEEE80211_CIPHER_CCMP:
2999a9fcb51fSAdrian Chadd 		cipher = AR_CIPHER_AES;
3000a9fcb51fSAdrian Chadd 		break;
3001a9fcb51fSAdrian Chadd 	default:
3002a9fcb51fSAdrian Chadd 		return;
3003a9fcb51fSAdrian Chadd 	}
3004a9fcb51fSAdrian Chadd 	key.cipher = htole16(cipher);
3005a9fcb51fSAdrian Chadd 	memcpy(key.key, k->k_key, MIN(k->k_len, 16));
3006c4dabdf7SAdrian Chadd 	error = otus_cmd(sc, AR_CMD_EKEY, &key, sizeof key, NULL, 0);
3007a9fcb51fSAdrian Chadd 	if (error != 0 || k->k_cipher != IEEE80211_CIPHER_TKIP)
3008a9fcb51fSAdrian Chadd 		return;
3009a9fcb51fSAdrian Chadd 
3010a9fcb51fSAdrian Chadd 	/* TKIP: set Tx/Rx MIC Key. */
3011a9fcb51fSAdrian Chadd 	key.kix = htole16(1);
3012a9fcb51fSAdrian Chadd 	memcpy(key.key, k->k_key + 16, 16);
3013c4dabdf7SAdrian Chadd 	(void)otus_cmd(sc, AR_CMD_EKEY, &key, sizeof key, NULL, 0);
3014a9fcb51fSAdrian Chadd }
3015a9fcb51fSAdrian Chadd 
3016a9fcb51fSAdrian Chadd void
otus_delete_key(struct ieee80211com * ic,struct ieee80211_node * ni,struct ieee80211_key * k)3017a9fcb51fSAdrian Chadd otus_delete_key(struct ieee80211com *ic, struct ieee80211_node *ni,
3018a9fcb51fSAdrian Chadd     struct ieee80211_key *k)
3019a9fcb51fSAdrian Chadd {
3020a9fcb51fSAdrian Chadd 	struct otus_softc *sc = ic->ic_softc;
3021a9fcb51fSAdrian Chadd 	struct otus_cmd_key cmd;
3022a9fcb51fSAdrian Chadd 
3023a9fcb51fSAdrian Chadd 	if (!(ic->ic_if.if_flags & IFF_RUNNING) ||
3024a9fcb51fSAdrian Chadd 	    ic->ic_state != IEEE80211_S_RUN)
3025a9fcb51fSAdrian Chadd 		return;	/* Nothing to do. */
3026a9fcb51fSAdrian Chadd 
3027a9fcb51fSAdrian Chadd 	/* Do it in a process context. */
3028a9fcb51fSAdrian Chadd 	cmd.key = *k;
3029a9fcb51fSAdrian Chadd 	cmd.associd = (ni != NULL) ? ni->ni_associd : 0;
3030a9fcb51fSAdrian Chadd 	otus_do_async(sc, otus_delete_key_cb, &cmd, sizeof cmd);
3031a9fcb51fSAdrian Chadd }
3032a9fcb51fSAdrian Chadd 
3033a9fcb51fSAdrian Chadd void
otus_delete_key_cb(struct otus_softc * sc,void * arg)3034a9fcb51fSAdrian Chadd otus_delete_key_cb(struct otus_softc *sc, void *arg)
3035a9fcb51fSAdrian Chadd {
3036a9fcb51fSAdrian Chadd 	struct otus_cmd_key *cmd = arg;
3037a9fcb51fSAdrian Chadd 	struct ieee80211_key *k = &cmd->key;
3038a9fcb51fSAdrian Chadd 	uint32_t uid;
3039a9fcb51fSAdrian Chadd 
3040a9fcb51fSAdrian Chadd 	if (k->k_flags & IEEE80211_KEY_GROUP)
3041a9fcb51fSAdrian Chadd 		uid = htole32(k->k_id);
3042a9fcb51fSAdrian Chadd 	else
3043a9fcb51fSAdrian Chadd 		uid = htole32(OTUS_UID(cmd->associd));
3044c4dabdf7SAdrian Chadd 	(void)otus_cmd(sc, AR_CMD_DKEY, &uid, sizeof uid, NULL, 0);
3045a9fcb51fSAdrian Chadd }
3046a9fcb51fSAdrian Chadd #endif
3047a9fcb51fSAdrian Chadd 
3048a9fcb51fSAdrian Chadd /*
3049a9fcb51fSAdrian Chadd  * XXX TODO: check if we have to be doing any calibration in the host
3050a9fcb51fSAdrian Chadd  * or whether it's purely a firmware thing.
3051a9fcb51fSAdrian Chadd  */
3052a9fcb51fSAdrian Chadd void
otus_calibrate_to(void * arg,int pending)3053a9fcb51fSAdrian Chadd otus_calibrate_to(void *arg, int pending)
3054a9fcb51fSAdrian Chadd {
3055a9fcb51fSAdrian Chadd #if 0
3056a9fcb51fSAdrian Chadd 	struct otus_softc *sc = arg;
3057a9fcb51fSAdrian Chadd 
3058a9fcb51fSAdrian Chadd 	device_printf(sc->sc_dev, "%s: called\n", __func__);
3059a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
3060a9fcb51fSAdrian Chadd 	struct ieee80211_node *ni;
3061a9fcb51fSAdrian Chadd 
3062a9fcb51fSAdrian Chadd 	if (usbd_is_dying(sc->sc_udev))
3063a9fcb51fSAdrian Chadd 		return;
3064a9fcb51fSAdrian Chadd 
3065a9fcb51fSAdrian Chadd 	usbd_ref_incr(sc->sc_udev);
3066a9fcb51fSAdrian Chadd 
3067a9fcb51fSAdrian Chadd 	ni = ic->ic_bss;
3068a9fcb51fSAdrian Chadd 	ieee80211_amrr_choose(&sc->amrr, ni, &((struct otus_node *)ni)->amn);
3069a9fcb51fSAdrian Chadd 
3070a9fcb51fSAdrian Chadd 	if (!usbd_is_dying(sc->sc_udev))
3071a9fcb51fSAdrian Chadd 		timeout_add_sec(&sc->calib_to, 1);
3072a9fcb51fSAdrian Chadd 
3073a9fcb51fSAdrian Chadd 	usbd_ref_decr(sc->sc_udev);
3074a9fcb51fSAdrian Chadd #endif
3075a9fcb51fSAdrian Chadd }
3076a9fcb51fSAdrian Chadd 
3077a9fcb51fSAdrian Chadd int
otus_set_bssid(struct otus_softc * sc,const uint8_t * bssid)3078a9fcb51fSAdrian Chadd otus_set_bssid(struct otus_softc *sc, const uint8_t *bssid)
3079a9fcb51fSAdrian Chadd {
3080a9fcb51fSAdrian Chadd 
3081a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
3082a9fcb51fSAdrian Chadd 
3083a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_BSSID_L,
3084a9fcb51fSAdrian Chadd 	    bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24);
3085a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_BSSID_H,
3086a9fcb51fSAdrian Chadd 	    bssid[4] | bssid[5] << 8);
3087a9fcb51fSAdrian Chadd 	return otus_write_barrier(sc);
3088a9fcb51fSAdrian Chadd }
3089a9fcb51fSAdrian Chadd 
3090a9fcb51fSAdrian Chadd int
otus_set_macaddr(struct otus_softc * sc,const uint8_t * addr)3091a9fcb51fSAdrian Chadd otus_set_macaddr(struct otus_softc *sc, const uint8_t *addr)
3092a9fcb51fSAdrian Chadd {
3093a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
3094a9fcb51fSAdrian Chadd 
3095a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_MAC_ADDR_L,
3096a9fcb51fSAdrian Chadd 	    addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24);
3097a9fcb51fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_MAC_ADDR_H,
3098a9fcb51fSAdrian Chadd 	    addr[4] | addr[5] << 8);
3099a9fcb51fSAdrian Chadd 	return otus_write_barrier(sc);
3100a9fcb51fSAdrian Chadd }
3101a9fcb51fSAdrian Chadd 
3102a9fcb51fSAdrian Chadd /* Default single-LED. */
3103a9fcb51fSAdrian Chadd void
otus_led_newstate_type1(struct otus_softc * sc)3104a9fcb51fSAdrian Chadd otus_led_newstate_type1(struct otus_softc *sc)
3105a9fcb51fSAdrian Chadd {
3106a9fcb51fSAdrian Chadd 	/* TBD */
3107a9fcb51fSAdrian Chadd 	device_printf(sc->sc_dev, "%s: TODO\n", __func__);
3108a9fcb51fSAdrian Chadd }
3109a9fcb51fSAdrian Chadd 
3110a9fcb51fSAdrian Chadd /* NETGEAR, dual-LED. */
3111a9fcb51fSAdrian Chadd void
otus_led_newstate_type2(struct otus_softc * sc)3112a9fcb51fSAdrian Chadd otus_led_newstate_type2(struct otus_softc *sc)
3113a9fcb51fSAdrian Chadd {
3114a9fcb51fSAdrian Chadd 	/* TBD */
3115a9fcb51fSAdrian Chadd 	device_printf(sc->sc_dev, "%s: TODO\n", __func__);
3116a9fcb51fSAdrian Chadd }
3117a9fcb51fSAdrian Chadd 
3118a9fcb51fSAdrian Chadd /* NETGEAR, single-LED/3 colors (blue, red, purple.) */
3119a9fcb51fSAdrian Chadd void
otus_led_newstate_type3(struct otus_softc * sc)3120a9fcb51fSAdrian Chadd otus_led_newstate_type3(struct otus_softc *sc)
3121a9fcb51fSAdrian Chadd {
3122a9fcb51fSAdrian Chadd #if 0
3123a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
3124a9fcb51fSAdrian Chadd 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3125a9fcb51fSAdrian Chadd 
3126a9fcb51fSAdrian Chadd 	uint32_t state = sc->led_state;
3127a9fcb51fSAdrian Chadd 
3128a9fcb51fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
3129a9fcb51fSAdrian Chadd 
3130a9fcb51fSAdrian Chadd 	if (!vap) {
3131a9fcb51fSAdrian Chadd 		state = 0;	/* led off */
3132a9fcb51fSAdrian Chadd 	} else if (vap->iv_state == IEEE80211_S_INIT) {
3133a9fcb51fSAdrian Chadd 		state = 0;	/* LED off. */
3134a9fcb51fSAdrian Chadd 	} else if (vap->iv_state == IEEE80211_S_RUN) {
3135a9fcb51fSAdrian Chadd 		/* Associated, LED always on. */
3136a9fcb51fSAdrian Chadd 		if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan))
3137a9fcb51fSAdrian Chadd 			state = AR_LED0_ON;	/* 2GHz=>Red. */
3138a9fcb51fSAdrian Chadd 		else
3139a9fcb51fSAdrian Chadd 			state = AR_LED1_ON;	/* 5GHz=>Blue. */
3140a9fcb51fSAdrian Chadd 	} else {
3141a9fcb51fSAdrian Chadd 		/* Scanning, blink LED. */
3142a9fcb51fSAdrian Chadd 		state ^= AR_LED0_ON | AR_LED1_ON;
3143a9fcb51fSAdrian Chadd 		if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan))
3144a9fcb51fSAdrian Chadd 			state &= ~AR_LED1_ON;
3145a9fcb51fSAdrian Chadd 		else
3146a9fcb51fSAdrian Chadd 			state &= ~AR_LED0_ON;
3147a9fcb51fSAdrian Chadd 	}
3148a9fcb51fSAdrian Chadd 	if (state != sc->led_state) {
3149b0f4d8f0SAdrian Chadd 		otus_write(sc, AR_GPIO_REG_PORT_DATA, state);
3150a9fcb51fSAdrian Chadd 		if (otus_write_barrier(sc) == 0)
3151a9fcb51fSAdrian Chadd 			sc->led_state = state;
3152a9fcb51fSAdrian Chadd 	}
3153a9fcb51fSAdrian Chadd #endif
3154a9fcb51fSAdrian Chadd }
3155a9fcb51fSAdrian Chadd 
3156b35978d0SAdrian Chadd static uint8_t zero_macaddr[IEEE80211_ADDR_LEN] = { 0,0,0,0,0,0 };
3157b35978d0SAdrian Chadd 
3158a181f63fSAdrian Chadd /*
3159b35978d0SAdrian Chadd  * Set up operating mode, MAC/BSS address and RX filter.
3160a181f63fSAdrian Chadd  */
3161b35978d0SAdrian Chadd static void
otus_set_operating_mode(struct otus_softc * sc)3162a181f63fSAdrian Chadd otus_set_operating_mode(struct otus_softc *sc)
3163a181f63fSAdrian Chadd {
3164a181f63fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
3165b35978d0SAdrian Chadd 	struct ieee80211vap *vap;
3166b35978d0SAdrian Chadd 	uint32_t cam_mode = AR_MAC_CAM_DEFAULTS;
3167b35978d0SAdrian Chadd 	uint32_t rx_ctrl = AR_MAC_RX_CTRL_DEAGG | AR_MAC_RX_CTRL_SHORT_FILTER;
3168b35978d0SAdrian Chadd 	uint32_t sniffer = AR_MAC_SNIFFER_DEFAULTS;
3169b35978d0SAdrian Chadd 	uint32_t enc_mode = 0x78; /* XXX */
3170b35978d0SAdrian Chadd 	const uint8_t *macaddr;
3171b35978d0SAdrian Chadd 	uint8_t bssid[IEEE80211_ADDR_LEN];
3172b35978d0SAdrian Chadd 	struct ieee80211_node *ni;
3173a181f63fSAdrian Chadd 
3174a181f63fSAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
3175a181f63fSAdrian Chadd 
3176b35978d0SAdrian Chadd 	/*
3177b35978d0SAdrian Chadd 	 * If we're in sniffer mode or we don't have a MAC
3178b35978d0SAdrian Chadd 	 * address assigned, ensure it gets reset to all-zero.
3179b35978d0SAdrian Chadd 	 */
3180b35978d0SAdrian Chadd 	IEEE80211_ADDR_COPY(bssid, zero_macaddr);
3181b35978d0SAdrian Chadd 	vap = TAILQ_FIRST(&ic->ic_vaps);
318289427621SAndriy Voskoboinyk 	macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
3183a181f63fSAdrian Chadd 
3184a181f63fSAdrian Chadd 	switch (ic->ic_opmode) {
3185a181f63fSAdrian Chadd 	case IEEE80211_M_STA:
3186b35978d0SAdrian Chadd 		if (vap) {
3187b35978d0SAdrian Chadd 			ni = ieee80211_ref_node(vap->iv_bss);
3188b35978d0SAdrian Chadd 			IEEE80211_ADDR_COPY(bssid, ni->ni_bssid);
3189b35978d0SAdrian Chadd 			ieee80211_free_node(ni);
3190b35978d0SAdrian Chadd 		}
3191b35978d0SAdrian Chadd 		cam_mode |= AR_MAC_CAM_STA;
3192b35978d0SAdrian Chadd 		rx_ctrl |= AR_MAC_RX_CTRL_PASS_TO_HOST;
3193a181f63fSAdrian Chadd 		break;
3194a181f63fSAdrian Chadd 	case IEEE80211_M_MONITOR:
3195b35978d0SAdrian Chadd 		/*
3196b35978d0SAdrian Chadd 		 * Note: monitor mode ends up causing the MAC to
3197b35978d0SAdrian Chadd 		 * generate ACK frames for everything it sees.
3198b35978d0SAdrian Chadd 		 * So don't do that; instead just put it in STA mode
3199b35978d0SAdrian Chadd 		 * and disable RX filters.
3200b35978d0SAdrian Chadd 		 */
3201a181f63fSAdrian Chadd 	default:
3202b35978d0SAdrian Chadd 		cam_mode |= AR_MAC_CAM_STA;
3203b35978d0SAdrian Chadd 		rx_ctrl |= AR_MAC_RX_CTRL_PASS_TO_HOST;
3204a181f63fSAdrian Chadd 		break;
3205a181f63fSAdrian Chadd 	}
3206a181f63fSAdrian Chadd 
3207b35978d0SAdrian Chadd 	/*
3208b35978d0SAdrian Chadd 	 * TODO: if/when we do hardware encryption, ensure it's
3209b35978d0SAdrian Chadd 	 * disabled if the NIC is in monitor mode.
3210b35978d0SAdrian Chadd 	 */
3211b35978d0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_SNIFFER, sniffer);
3212a181f63fSAdrian Chadd 	otus_write(sc, AR_MAC_REG_CAM_MODE, cam_mode);
3213b35978d0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_ENCRYPTION, enc_mode);
3214b35978d0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_RX_CONTROL, rx_ctrl);
3215b35978d0SAdrian Chadd 	otus_set_macaddr(sc, macaddr);
3216b35978d0SAdrian Chadd 	otus_set_bssid(sc, bssid);
3217b35978d0SAdrian Chadd 	/* XXX barrier? */
3218b35978d0SAdrian Chadd }
3219a181f63fSAdrian Chadd 
3220b35978d0SAdrian Chadd static void
otus_set_rx_filter(struct otus_softc * sc)3221b35978d0SAdrian Chadd otus_set_rx_filter(struct otus_softc *sc)
3222b35978d0SAdrian Chadd {
3223b35978d0SAdrian Chadd //	struct ieee80211com *ic = &sc->sc_ic;
3224b35978d0SAdrian Chadd 
3225b35978d0SAdrian Chadd 	OTUS_LOCK_ASSERT(sc);
3226b35978d0SAdrian Chadd 
3227b35978d0SAdrian Chadd #if 0
3228b35978d0SAdrian Chadd 	if (ic->ic_allmulti > 0 || ic->ic_promisc > 0 ||
3229b35978d0SAdrian Chadd 	    ic->ic_opmode == IEEE80211_M_MONITOR) {
3230b35978d0SAdrian Chadd 		otus_write(sc, AR_MAC_REG_FRAMETYPE_FILTER, 0xff00ffff);
3231b35978d0SAdrian Chadd 	} else {
3232b35978d0SAdrian Chadd #endif
3233b35978d0SAdrian Chadd 		/* Filter any control frames, BAR is bit 24. */
3234b35978d0SAdrian Chadd 		otus_write(sc, AR_MAC_REG_FRAMETYPE_FILTER, 0x0500ffff);
3235b35978d0SAdrian Chadd #if 0
3236b35978d0SAdrian Chadd 	}
3237b35978d0SAdrian Chadd #endif
3238a181f63fSAdrian Chadd }
3239a181f63fSAdrian Chadd 
3240a9fcb51fSAdrian Chadd int
otus_init(struct otus_softc * sc)3241a9fcb51fSAdrian Chadd otus_init(struct otus_softc *sc)
3242a9fcb51fSAdrian Chadd {
3243a9fcb51fSAdrian Chadd 	struct ieee80211com *ic = &sc->sc_ic;
3244a9fcb51fSAdrian Chadd 	int error;
3245a9fcb51fSAdrian Chadd 
3246a9fcb51fSAdrian Chadd 	OTUS_UNLOCK_ASSERT(sc);
3247a9fcb51fSAdrian Chadd 
3248a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
3249a9fcb51fSAdrian Chadd 
3250a9fcb51fSAdrian Chadd 	/* Drain any pending TX frames */
3251a9fcb51fSAdrian Chadd 	otus_drain_mbufq(sc);
3252a9fcb51fSAdrian Chadd 
3253a9fcb51fSAdrian Chadd 	/* Init MAC */
3254a9fcb51fSAdrian Chadd 	if ((error = otus_init_mac(sc)) != 0) {
3255a9fcb51fSAdrian Chadd 		OTUS_UNLOCK(sc);
3256a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
3257a9fcb51fSAdrian Chadd 		    "%s: could not initialize MAC\n", __func__);
3258a9fcb51fSAdrian Chadd 		return error;
3259a9fcb51fSAdrian Chadd 	}
3260a9fcb51fSAdrian Chadd 
3261b35978d0SAdrian Chadd 	otus_set_operating_mode(sc);
3262b35978d0SAdrian Chadd 	otus_set_rx_filter(sc);
3263a181f63fSAdrian Chadd 	(void) otus_set_operating_mode(sc);
3264a9fcb51fSAdrian Chadd 
3265a9fcb51fSAdrian Chadd 	sc->bb_reset = 1;	/* Force cold reset. */
3266a9fcb51fSAdrian Chadd 
3267a9fcb51fSAdrian Chadd 	if ((error = otus_set_chan(sc, ic->ic_curchan, 0)) != 0) {
3268a9fcb51fSAdrian Chadd 		OTUS_UNLOCK(sc);
3269a9fcb51fSAdrian Chadd 		device_printf(sc->sc_dev,
3270a9fcb51fSAdrian Chadd 		    "%s: could not set channel\n", __func__);
3271a9fcb51fSAdrian Chadd 		return error;
3272a9fcb51fSAdrian Chadd 	}
3273a9fcb51fSAdrian Chadd 
3274a9fcb51fSAdrian Chadd 	/* Start Rx. */
3275b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_DMA_TRIGGER, 0x100);
3276a9fcb51fSAdrian Chadd 	(void)otus_write_barrier(sc);
3277a9fcb51fSAdrian Chadd 
3278a9fcb51fSAdrian Chadd 	sc->sc_running = 1;
3279a9fcb51fSAdrian Chadd 
3280a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
3281a9fcb51fSAdrian Chadd 	return 0;
3282a9fcb51fSAdrian Chadd }
3283a9fcb51fSAdrian Chadd 
3284a9fcb51fSAdrian Chadd void
otus_stop(struct otus_softc * sc)3285a9fcb51fSAdrian Chadd otus_stop(struct otus_softc *sc)
3286a9fcb51fSAdrian Chadd {
3287a9fcb51fSAdrian Chadd #if 0
3288a9fcb51fSAdrian Chadd 	int s;
3289a9fcb51fSAdrian Chadd #endif
3290a9fcb51fSAdrian Chadd 
3291a9fcb51fSAdrian Chadd 	OTUS_UNLOCK_ASSERT(sc);
3292a9fcb51fSAdrian Chadd 
3293a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
3294a9fcb51fSAdrian Chadd 	sc->sc_running = 0;
3295a9fcb51fSAdrian Chadd 	sc->sc_tx_timer = 0;
3296a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
3297a9fcb51fSAdrian Chadd 
3298a9fcb51fSAdrian Chadd 	taskqueue_drain_timeout(taskqueue_thread, &sc->scan_to);
3299a9fcb51fSAdrian Chadd 	taskqueue_drain_timeout(taskqueue_thread, &sc->calib_to);
3300a9fcb51fSAdrian Chadd 	taskqueue_drain(taskqueue_thread, &sc->tx_task);
3301a9fcb51fSAdrian Chadd 
3302a9fcb51fSAdrian Chadd 	OTUS_LOCK(sc);
3303a9fcb51fSAdrian Chadd 	sc->sc_running = 0;
3304a9fcb51fSAdrian Chadd 	/* Stop Rx. */
3305b0f4d8f0SAdrian Chadd 	otus_write(sc, AR_MAC_REG_DMA_TRIGGER, 0);
3306a9fcb51fSAdrian Chadd 	(void)otus_write_barrier(sc);
3307a9fcb51fSAdrian Chadd 
3308a9fcb51fSAdrian Chadd 	/* Drain any pending TX frames */
3309a9fcb51fSAdrian Chadd 	otus_drain_mbufq(sc);
3310a9fcb51fSAdrian Chadd 
3311a9fcb51fSAdrian Chadd 	OTUS_UNLOCK(sc);
3312a9fcb51fSAdrian Chadd }
3313