xref: /freebsd/sys/dev/ath/ath_hal/ar5212/ar2413.c (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1*6e778a7eSPedro F. Giffuni /*-
2*6e778a7eSPedro F. Giffuni  * SPDX-License-Identifier: ISC
3*6e778a7eSPedro F. Giffuni  *
459efa8b5SSam Leffler  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
514779705SSam Leffler  * Copyright (c) 2002-2008 Atheros Communications, Inc.
614779705SSam Leffler  *
714779705SSam Leffler  * Permission to use, copy, modify, and/or distribute this software for any
814779705SSam Leffler  * purpose with or without fee is hereby granted, provided that the above
914779705SSam Leffler  * copyright notice and this permission notice appear in all copies.
1014779705SSam Leffler  *
1114779705SSam Leffler  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
1214779705SSam Leffler  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1314779705SSam Leffler  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1414779705SSam Leffler  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1514779705SSam Leffler  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1614779705SSam Leffler  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
1714779705SSam Leffler  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1814779705SSam Leffler  */
1914779705SSam Leffler #include "opt_ah.h"
2014779705SSam Leffler 
2114779705SSam Leffler #include "ah.h"
2214779705SSam Leffler #include "ah_internal.h"
2314779705SSam Leffler 
2414779705SSam Leffler #include "ar5212/ar5212.h"
2514779705SSam Leffler #include "ar5212/ar5212reg.h"
2614779705SSam Leffler #include "ar5212/ar5212phy.h"
2714779705SSam Leffler 
2814779705SSam Leffler #include "ah_eeprom_v3.h"
2914779705SSam Leffler 
3014779705SSam Leffler #define AH_5212_2413
3114779705SSam Leffler #include "ar5212/ar5212.ini"
3214779705SSam Leffler 
3314779705SSam Leffler #define	N(a)	(sizeof(a)/sizeof(a[0]))
3414779705SSam Leffler 
3514779705SSam Leffler struct ar2413State {
3614779705SSam Leffler 	RF_HAL_FUNCS	base;		/* public state, must be first */
3714779705SSam Leffler 	uint16_t	pcdacTable[PWR_TABLE_SIZE_2413];
3814779705SSam Leffler 
3914779705SSam Leffler 	uint32_t	Bank1Data[N(ar5212Bank1_2413)];
4014779705SSam Leffler 	uint32_t	Bank2Data[N(ar5212Bank2_2413)];
4114779705SSam Leffler 	uint32_t	Bank3Data[N(ar5212Bank3_2413)];
4214779705SSam Leffler 	uint32_t	Bank6Data[N(ar5212Bank6_2413)];
4314779705SSam Leffler 	uint32_t	Bank7Data[N(ar5212Bank7_2413)];
4414779705SSam Leffler 
4514779705SSam Leffler 	/*
4614779705SSam Leffler 	 * Private state for reduced stack usage.
4714779705SSam Leffler 	 */
4814779705SSam Leffler 	/* filled out Vpd table for all pdGains (chanL) */
4914779705SSam Leffler 	uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
5014779705SSam Leffler 			    [MAX_PWR_RANGE_IN_HALF_DB];
5114779705SSam Leffler 	/* filled out Vpd table for all pdGains (chanR) */
5214779705SSam Leffler 	uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
5314779705SSam Leffler 			    [MAX_PWR_RANGE_IN_HALF_DB];
5414779705SSam Leffler 	/* filled out Vpd table for all pdGains (interpolated) */
5514779705SSam Leffler 	uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
5614779705SSam Leffler 			    [MAX_PWR_RANGE_IN_HALF_DB];
5714779705SSam Leffler };
5814779705SSam Leffler #define	AR2413(ah)	((struct ar2413State *) AH5212(ah)->ah_rfHal)
5914779705SSam Leffler 
6014779705SSam Leffler extern	void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
6114779705SSam Leffler 		uint32_t numBits, uint32_t firstBit, uint32_t column);
6214779705SSam Leffler 
6314779705SSam Leffler static void
ar2413WriteRegs(struct ath_hal * ah,u_int modesIndex,u_int freqIndex,int writes)6414779705SSam Leffler ar2413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
6514779705SSam Leffler 	int writes)
6614779705SSam Leffler {
6714779705SSam Leffler 	HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2413, modesIndex, writes);
6814779705SSam Leffler 	HAL_INI_WRITE_ARRAY(ah, ar5212Common_2413, 1, writes);
6914779705SSam Leffler 	HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2413, freqIndex, writes);
7014779705SSam Leffler }
7114779705SSam Leffler 
7214779705SSam Leffler /*
7314779705SSam Leffler  * Take the MHz channel value and set the Channel value
7414779705SSam Leffler  *
7514779705SSam Leffler  * ASSUMES: Writes enabled to analog bus
7614779705SSam Leffler  */
7714779705SSam Leffler static HAL_BOOL
ar2413SetChannel(struct ath_hal * ah,const struct ieee80211_channel * chan)7859efa8b5SSam Leffler ar2413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
7914779705SSam Leffler {
8059efa8b5SSam Leffler 	uint16_t freq = ath_hal_gethwchannel(ah, chan);
8114779705SSam Leffler 	uint32_t channelSel  = 0;
8214779705SSam Leffler 	uint32_t bModeSynth  = 0;
8314779705SSam Leffler 	uint32_t aModeRefSel = 0;
8414779705SSam Leffler 	uint32_t reg32       = 0;
8514779705SSam Leffler 
8659efa8b5SSam Leffler 	OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
8714779705SSam Leffler 
8859efa8b5SSam Leffler 	if (freq < 4800) {
8914779705SSam Leffler 		uint32_t txctl;
9014779705SSam Leffler 
9159efa8b5SSam Leffler 		if (((freq - 2192) % 5) == 0) {
9259efa8b5SSam Leffler 			channelSel = ((freq - 672) * 2 - 3040)/10;
9314779705SSam Leffler 			bModeSynth = 0;
9459efa8b5SSam Leffler 		} else if (((freq - 2224) % 5) == 0) {
9559efa8b5SSam Leffler 			channelSel = ((freq - 704) * 2 - 3040) / 10;
9614779705SSam Leffler 			bModeSynth = 1;
9714779705SSam Leffler 		} else {
9814779705SSam Leffler 			HALDEBUG(ah, HAL_DEBUG_ANY,
9914779705SSam Leffler 			    "%s: invalid channel %u MHz\n",
10059efa8b5SSam Leffler 			    __func__, freq);
10114779705SSam Leffler 			return AH_FALSE;
10214779705SSam Leffler 		}
10314779705SSam Leffler 
10414779705SSam Leffler 		channelSel = (channelSel << 2) & 0xff;
10514779705SSam Leffler 		channelSel = ath_hal_reverseBits(channelSel, 8);
10614779705SSam Leffler 
10714779705SSam Leffler 		txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
10859efa8b5SSam Leffler 		if (freq == 2484) {
10914779705SSam Leffler 			/* Enable channel spreading for channel 14 */
11014779705SSam Leffler 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
11114779705SSam Leffler 				txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
11214779705SSam Leffler 		} else {
11314779705SSam Leffler 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
11414779705SSam Leffler 				txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
11514779705SSam Leffler 		}
11659efa8b5SSam Leffler 	} else if (((freq % 5) == 2) && (freq <= 5435)) {
11759efa8b5SSam Leffler 		freq = freq - 2; /* Align to even 5MHz raster */
11814779705SSam Leffler 		channelSel = ath_hal_reverseBits(
11914779705SSam Leffler 			(uint32_t)(((freq - 4800)*10)/25 + 1), 8);
12014779705SSam Leffler             	aModeRefSel = ath_hal_reverseBits(0, 2);
12159efa8b5SSam Leffler 	} else if ((freq % 20) == 0 && freq >= 5120) {
12214779705SSam Leffler 		channelSel = ath_hal_reverseBits(
12359efa8b5SSam Leffler 			((freq - 4800) / 20 << 2), 8);
12414779705SSam Leffler 		aModeRefSel = ath_hal_reverseBits(3, 2);
12559efa8b5SSam Leffler 	} else if ((freq % 10) == 0) {
12614779705SSam Leffler 		channelSel = ath_hal_reverseBits(
12759efa8b5SSam Leffler 			((freq - 4800) / 10 << 1), 8);
12814779705SSam Leffler 		aModeRefSel = ath_hal_reverseBits(2, 2);
12959efa8b5SSam Leffler 	} else if ((freq % 5) == 0) {
13014779705SSam Leffler 		channelSel = ath_hal_reverseBits(
13159efa8b5SSam Leffler 			(freq - 4800) / 5, 8);
13214779705SSam Leffler 		aModeRefSel = ath_hal_reverseBits(1, 2);
13314779705SSam Leffler 	} else {
13414779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
13559efa8b5SSam Leffler 		    __func__, freq);
13614779705SSam Leffler 		return AH_FALSE;
13714779705SSam Leffler 	}
13814779705SSam Leffler 
13914779705SSam Leffler 	reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
14014779705SSam Leffler 			(1 << 12) | 0x1;
14114779705SSam Leffler 	OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
14214779705SSam Leffler 
14314779705SSam Leffler 	reg32 >>= 8;
14414779705SSam Leffler 	OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
14514779705SSam Leffler 
14614779705SSam Leffler 	AH_PRIVATE(ah)->ah_curchan = chan;
14714779705SSam Leffler 
14814779705SSam Leffler 	return AH_TRUE;
14914779705SSam Leffler }
15014779705SSam Leffler 
15114779705SSam Leffler /*
15214779705SSam Leffler  * Reads EEPROM header info from device structure and programs
15314779705SSam Leffler  * all rf registers
15414779705SSam Leffler  *
15514779705SSam Leffler  * REQUIRES: Access to the analog rf device
15614779705SSam Leffler  */
15714779705SSam Leffler static HAL_BOOL
ar2413SetRfRegs(struct ath_hal * ah,const struct ieee80211_channel * chan,uint16_t modesIndex,uint16_t * rfXpdGain)15859efa8b5SSam Leffler ar2413SetRfRegs(struct ath_hal *ah,
15959efa8b5SSam Leffler 	const struct ieee80211_channel *chan,
16059efa8b5SSam Leffler 	uint16_t modesIndex, uint16_t *rfXpdGain)
16114779705SSam Leffler {
16214779705SSam Leffler #define	RF_BANK_SETUP(_priv, _ix, _col) do {				    \
16314779705SSam Leffler 	int i;								    \
16414779705SSam Leffler 	for (i = 0; i < N(ar5212Bank##_ix##_2413); i++)			    \
16514779705SSam Leffler 		(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2413[i][_col];\
16614779705SSam Leffler } while (0)
16714779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
16814779705SSam Leffler 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
16914779705SSam Leffler 	uint16_t ob2GHz = 0, db2GHz = 0;
17014779705SSam Leffler 	struct ar2413State *priv = AR2413(ah);
17114779705SSam Leffler 	int regWrites = 0;
17214779705SSam Leffler 
17359efa8b5SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
17459efa8b5SSam Leffler 	    __func__, chan->ic_freq, chan->ic_flags, modesIndex);
17514779705SSam Leffler 
17614779705SSam Leffler 	HALASSERT(priv);
17714779705SSam Leffler 
17814779705SSam Leffler 	/* Setup rf parameters */
17959efa8b5SSam Leffler 	if (IEEE80211_IS_CHAN_B(chan)) {
18014779705SSam Leffler 		ob2GHz = ee->ee_obFor24;
18114779705SSam Leffler 		db2GHz = ee->ee_dbFor24;
18259efa8b5SSam Leffler 	} else {
18314779705SSam Leffler 		ob2GHz = ee->ee_obFor24g;
18414779705SSam Leffler 		db2GHz = ee->ee_dbFor24g;
18514779705SSam Leffler 	}
18614779705SSam Leffler 
18714779705SSam Leffler 	/* Bank 1 Write */
18814779705SSam Leffler 	RF_BANK_SETUP(priv, 1, 1);
18914779705SSam Leffler 
19014779705SSam Leffler 	/* Bank 2 Write */
19114779705SSam Leffler 	RF_BANK_SETUP(priv, 2, modesIndex);
19214779705SSam Leffler 
19314779705SSam Leffler 	/* Bank 3 Write */
19414779705SSam Leffler 	RF_BANK_SETUP(priv, 3, modesIndex);
19514779705SSam Leffler 
19614779705SSam Leffler 	/* Bank 6 Write */
19714779705SSam Leffler 	RF_BANK_SETUP(priv, 6, modesIndex);
19814779705SSam Leffler 
19914779705SSam Leffler 	ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz,   3, 168, 0);
20014779705SSam Leffler 	ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz,   3, 165, 0);
20114779705SSam Leffler 
20214779705SSam Leffler 	/* Bank 7 Setup */
20314779705SSam Leffler 	RF_BANK_SETUP(priv, 7, modesIndex);
20414779705SSam Leffler 
20514779705SSam Leffler 	/* Write Analog registers */
20614779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank1_2413, priv->Bank1Data, regWrites);
20714779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank2_2413, priv->Bank2Data, regWrites);
20814779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank3_2413, priv->Bank3Data, regWrites);
20914779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank6_2413, priv->Bank6Data, regWrites);
21014779705SSam Leffler 	HAL_INI_WRITE_BANK(ah, ar5212Bank7_2413, priv->Bank7Data, regWrites);
21114779705SSam Leffler 
21214779705SSam Leffler 	/* Now that we have reprogrammed rfgain value, clear the flag. */
21314779705SSam Leffler 	ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
21414779705SSam Leffler 
21514779705SSam Leffler 	return AH_TRUE;
21614779705SSam Leffler #undef	RF_BANK_SETUP
21714779705SSam Leffler }
21814779705SSam Leffler 
21914779705SSam Leffler /*
22014779705SSam Leffler  * Return a reference to the requested RF Bank.
22114779705SSam Leffler  */
22214779705SSam Leffler static uint32_t *
ar2413GetRfBank(struct ath_hal * ah,int bank)22314779705SSam Leffler ar2413GetRfBank(struct ath_hal *ah, int bank)
22414779705SSam Leffler {
22514779705SSam Leffler 	struct ar2413State *priv = AR2413(ah);
22614779705SSam Leffler 
22714779705SSam Leffler 	HALASSERT(priv != AH_NULL);
22814779705SSam Leffler 	switch (bank) {
22914779705SSam Leffler 	case 1: return priv->Bank1Data;
23014779705SSam Leffler 	case 2: return priv->Bank2Data;
23114779705SSam Leffler 	case 3: return priv->Bank3Data;
23214779705SSam Leffler 	case 6: return priv->Bank6Data;
23314779705SSam Leffler 	case 7: return priv->Bank7Data;
23414779705SSam Leffler 	}
23514779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
23614779705SSam Leffler 	    __func__, bank);
23714779705SSam Leffler 	return AH_NULL;
23814779705SSam Leffler }
23914779705SSam Leffler 
24014779705SSam Leffler /*
24114779705SSam Leffler  * Return indices surrounding the value in sorted integer lists.
24214779705SSam Leffler  *
24314779705SSam Leffler  * NB: the input list is assumed to be sorted in ascending order
24414779705SSam Leffler  */
24514779705SSam Leffler static void
GetLowerUpperIndex(int16_t v,const uint16_t * lp,uint16_t listSize,uint32_t * vlo,uint32_t * vhi)24614779705SSam Leffler GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
24714779705SSam Leffler                           uint32_t *vlo, uint32_t *vhi)
24814779705SSam Leffler {
24914779705SSam Leffler 	int16_t target = v;
25014779705SSam Leffler 	const uint16_t *ep = lp+listSize;
25114779705SSam Leffler 	const uint16_t *tp;
25214779705SSam Leffler 
25314779705SSam Leffler 	/*
25414779705SSam Leffler 	 * Check first and last elements for out-of-bounds conditions.
25514779705SSam Leffler 	 */
25614779705SSam Leffler 	if (target < lp[0]) {
25714779705SSam Leffler 		*vlo = *vhi = 0;
25814779705SSam Leffler 		return;
25914779705SSam Leffler 	}
26014779705SSam Leffler 	if (target >= ep[-1]) {
26114779705SSam Leffler 		*vlo = *vhi = listSize - 1;
26214779705SSam Leffler 		return;
26314779705SSam Leffler 	}
26414779705SSam Leffler 
26514779705SSam Leffler 	/* look for value being near or between 2 values in list */
26614779705SSam Leffler 	for (tp = lp; tp < ep; tp++) {
26714779705SSam Leffler 		/*
26814779705SSam Leffler 		 * If value is close to the current value of the list
26914779705SSam Leffler 		 * then target is not between values, it is one of the values
27014779705SSam Leffler 		 */
27114779705SSam Leffler 		if (*tp == target) {
27214779705SSam Leffler 			*vlo = *vhi = tp - (const uint16_t *) lp;
27314779705SSam Leffler 			return;
27414779705SSam Leffler 		}
27514779705SSam Leffler 		/*
27614779705SSam Leffler 		 * Look for value being between current value and next value
27714779705SSam Leffler 		 * if so return these 2 values
27814779705SSam Leffler 		 */
27914779705SSam Leffler 		if (target < tp[1]) {
28014779705SSam Leffler 			*vlo = tp - (const uint16_t *) lp;
28114779705SSam Leffler 			*vhi = *vlo + 1;
28214779705SSam Leffler 			return;
28314779705SSam Leffler 		}
28414779705SSam Leffler 	}
28514779705SSam Leffler }
28614779705SSam Leffler 
28714779705SSam Leffler /*
28814779705SSam Leffler  * Fill the Vpdlist for indices Pmax-Pmin
28914779705SSam Leffler  */
29014779705SSam Leffler static HAL_BOOL
ar2413FillVpdTable(uint32_t pdGainIdx,int16_t Pmin,int16_t Pmax,const int16_t * pwrList,const uint16_t * VpdList,uint16_t numIntercepts,uint16_t retVpdList[][64])29114779705SSam Leffler ar2413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t  Pmax,
29214779705SSam Leffler 		   const int16_t *pwrList, const uint16_t *VpdList,
29314779705SSam Leffler 		   uint16_t numIntercepts, uint16_t retVpdList[][64])
29414779705SSam Leffler {
29514779705SSam Leffler 	uint16_t ii, jj, kk;
29614779705SSam Leffler 	int16_t currPwr = (int16_t)(2*Pmin);
29714779705SSam Leffler 	/* since Pmin is pwr*2 and pwrList is 4*pwr */
29814779705SSam Leffler 	uint32_t  idxL, idxR;
29914779705SSam Leffler 
30014779705SSam Leffler 	ii = 0;
30114779705SSam Leffler 	jj = 0;
30214779705SSam Leffler 
30314779705SSam Leffler 	if (numIntercepts < 2)
30414779705SSam Leffler 		return AH_FALSE;
30514779705SSam Leffler 
30614779705SSam Leffler 	while (ii <= (uint16_t)(Pmax - Pmin)) {
30714779705SSam Leffler 		GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
30814779705SSam Leffler 				   numIntercepts, &(idxL), &(idxR));
30914779705SSam Leffler 		if (idxR < 1)
31014779705SSam Leffler 			idxR = 1;			/* extrapolate below */
31114779705SSam Leffler 		if (idxL == (uint32_t)(numIntercepts - 1))
31214779705SSam Leffler 			idxL = numIntercepts - 2;	/* extrapolate above */
31314779705SSam Leffler 		if (pwrList[idxL] == pwrList[idxR])
31414779705SSam Leffler 			kk = VpdList[idxL];
31514779705SSam Leffler 		else
31614779705SSam Leffler 			kk = (uint16_t)
31714779705SSam Leffler 				(((currPwr - pwrList[idxL])*VpdList[idxR]+
31814779705SSam Leffler 				  (pwrList[idxR] - currPwr)*VpdList[idxL])/
31914779705SSam Leffler 				 (pwrList[idxR] - pwrList[idxL]));
32014779705SSam Leffler 		retVpdList[pdGainIdx][ii] = kk;
32114779705SSam Leffler 		ii++;
32214779705SSam Leffler 		currPwr += 2;				/* half dB steps */
32314779705SSam Leffler 	}
32414779705SSam Leffler 
32514779705SSam Leffler 	return AH_TRUE;
32614779705SSam Leffler }
32714779705SSam Leffler 
32814779705SSam Leffler /*
32914779705SSam Leffler  * Returns interpolated or the scaled up interpolated value
33014779705SSam Leffler  */
33114779705SSam Leffler static int16_t
interpolate_signed(uint16_t target,uint16_t srcLeft,uint16_t srcRight,int16_t targetLeft,int16_t targetRight)33214779705SSam Leffler interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
33314779705SSam Leffler 	int16_t targetLeft, int16_t targetRight)
33414779705SSam Leffler {
33514779705SSam Leffler 	int16_t rv;
33614779705SSam Leffler 
33714779705SSam Leffler 	if (srcRight != srcLeft) {
33814779705SSam Leffler 		rv = ((target - srcLeft)*targetRight +
33914779705SSam Leffler 		      (srcRight - target)*targetLeft) / (srcRight - srcLeft);
34014779705SSam Leffler 	} else {
34114779705SSam Leffler 		rv = targetLeft;
34214779705SSam Leffler 	}
34314779705SSam Leffler 	return rv;
34414779705SSam Leffler }
34514779705SSam Leffler 
34614779705SSam Leffler /*
34714779705SSam Leffler  * Uses the data points read from EEPROM to reconstruct the pdadc power table
34814779705SSam Leffler  * Called by ar2413SetPowerTable()
34914779705SSam Leffler  */
35014779705SSam Leffler static int
ar2413getGainBoundariesAndPdadcsForPowers(struct ath_hal * ah,uint16_t channel,const RAW_DATA_STRUCT_2413 * pRawDataset,uint16_t pdGainOverlap_t2,int16_t * pMinCalPower,uint16_t pPdGainBoundaries[],uint16_t pPdGainValues[],uint16_t pPDADCValues[])35114779705SSam Leffler ar2413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
35214779705SSam Leffler 		const RAW_DATA_STRUCT_2413 *pRawDataset,
35314779705SSam Leffler 		uint16_t pdGainOverlap_t2,
35414779705SSam Leffler 		int16_t  *pMinCalPower, uint16_t pPdGainBoundaries[],
35514779705SSam Leffler 		uint16_t pPdGainValues[], uint16_t pPDADCValues[])
35614779705SSam Leffler {
35714779705SSam Leffler 	struct ar2413State *priv = AR2413(ah);
35814779705SSam Leffler #define	VpdTable_L	priv->vpdTable_L
35914779705SSam Leffler #define	VpdTable_R	priv->vpdTable_R
36014779705SSam Leffler #define	VpdTable_I	priv->vpdTable_I
36114779705SSam Leffler 	uint32_t ii, jj, kk;
36214779705SSam Leffler 	int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
36314779705SSam Leffler 	uint32_t idxL, idxR;
36414779705SSam Leffler 	uint32_t numPdGainsUsed = 0;
36514779705SSam Leffler 	/*
36614779705SSam Leffler 	 * If desired to support -ve power levels in future, just
36714779705SSam Leffler 	 * change pwr_I_0 to signed 5-bits.
36814779705SSam Leffler 	 */
36914779705SSam Leffler 	int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
370f6b6084bSPedro F. Giffuni 	/* to accommodate -ve power levels later on. */
37114779705SSam Leffler 	int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
372f6b6084bSPedro F. Giffuni 	/* to accommodate -ve power levels later on */
37314779705SSam Leffler 	uint16_t numVpd = 0;
37414779705SSam Leffler 	uint16_t Vpd_step;
37514779705SSam Leffler 	int16_t tmpVal ;
37614779705SSam Leffler 	uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
37714779705SSam Leffler 
37814779705SSam Leffler 	/* Get upper lower index */
37914779705SSam Leffler 	GetLowerUpperIndex(channel, pRawDataset->pChannels,
38014779705SSam Leffler 				 pRawDataset->numChannels, &(idxL), &(idxR));
38114779705SSam Leffler 
38214779705SSam Leffler 	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
38314779705SSam Leffler 		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
38414779705SSam Leffler 		/* work backwards 'cause highest pdGain for lowest power */
38514779705SSam Leffler 		numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
38614779705SSam Leffler 		if (numVpd > 0) {
38714779705SSam Leffler 			pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
38814779705SSam Leffler 			Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
38914779705SSam Leffler 			if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
39014779705SSam Leffler 				Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
39114779705SSam Leffler 			}
39214779705SSam Leffler 			Pmin_t2[numPdGainsUsed] = (int16_t)
39314779705SSam Leffler 				(Pmin_t2[numPdGainsUsed] / 2);
39414779705SSam Leffler 			Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
39514779705SSam Leffler 			if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
39614779705SSam Leffler 				Pmax_t2[numPdGainsUsed] =
39714779705SSam Leffler 					pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
39814779705SSam Leffler 			Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
39914779705SSam Leffler 			ar2413FillVpdTable(
40014779705SSam Leffler 					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
40114779705SSam Leffler 					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
40214779705SSam Leffler 					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
40314779705SSam Leffler 					   );
40414779705SSam Leffler 			ar2413FillVpdTable(
40514779705SSam Leffler 					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
40614779705SSam Leffler 					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
40714779705SSam Leffler 					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
40814779705SSam Leffler 					   );
40914779705SSam Leffler 			for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
41014779705SSam Leffler 				VpdTable_I[numPdGainsUsed][kk] =
41114779705SSam Leffler 					interpolate_signed(
41214779705SSam Leffler 							   channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
41314779705SSam Leffler 							   (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
41414779705SSam Leffler 			}
41514779705SSam Leffler 			/* fill VpdTable_I for this pdGain */
41614779705SSam Leffler 			numPdGainsUsed++;
41714779705SSam Leffler 		}
41814779705SSam Leffler 		/* if this pdGain is used */
41914779705SSam Leffler 	}
42014779705SSam Leffler 
42114779705SSam Leffler 	*pMinCalPower = Pmin_t2[0];
42214779705SSam Leffler 	kk = 0; /* index for the final table */
42314779705SSam Leffler 	for (ii = 0; ii < numPdGainsUsed; ii++) {
42414779705SSam Leffler 		if (ii == (numPdGainsUsed - 1))
42514779705SSam Leffler 			pPdGainBoundaries[ii] = Pmax_t2[ii] +
42614779705SSam Leffler 				PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
42714779705SSam Leffler 		else
42814779705SSam Leffler 			pPdGainBoundaries[ii] = (uint16_t)
42914779705SSam Leffler 				((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
43014779705SSam Leffler 		if (pPdGainBoundaries[ii] > 63) {
43114779705SSam Leffler 			HALDEBUG(ah, HAL_DEBUG_ANY,
43214779705SSam Leffler 			    "%s: clamp pPdGainBoundaries[%d] %d\n",
43314779705SSam Leffler 			    __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
43414779705SSam Leffler 			pPdGainBoundaries[ii] = 63;
43514779705SSam Leffler 		}
43614779705SSam Leffler 
43714779705SSam Leffler 		/* Find starting index for this pdGain */
43814779705SSam Leffler 		if (ii == 0)
43914779705SSam Leffler 			ss = 0; /* for the first pdGain, start from index 0 */
44014779705SSam Leffler 		else
44114779705SSam Leffler 			ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
44214779705SSam Leffler 				pdGainOverlap_t2;
44314779705SSam Leffler 		Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
44414779705SSam Leffler 		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
44514779705SSam Leffler 		/*
44614779705SSam Leffler 		 *-ve ss indicates need to extrapolate data below for this pdGain
44714779705SSam Leffler 		 */
44814779705SSam Leffler 		while (ss < 0) {
44914779705SSam Leffler 			tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
45014779705SSam Leffler 			pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
45114779705SSam Leffler 			ss++;
45214779705SSam Leffler 		}
45314779705SSam Leffler 
45414779705SSam Leffler 		sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
45514779705SSam Leffler 		tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
45614779705SSam Leffler 		maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
45714779705SSam Leffler 
45814779705SSam Leffler 		while (ss < (int16_t)maxIndex)
45914779705SSam Leffler 			pPDADCValues[kk++] = VpdTable_I[ii][ss++];
46014779705SSam Leffler 
46114779705SSam Leffler 		Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
46214779705SSam Leffler 				       VpdTable_I[ii][sizeCurrVpdTable-2]);
46314779705SSam Leffler 		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
46414779705SSam Leffler 		/*
46514779705SSam Leffler 		 * for last gain, pdGainBoundary == Pmax_t2, so will
46614779705SSam Leffler 		 * have to extrapolate
46714779705SSam Leffler 		 */
46814779705SSam Leffler 		if (tgtIndex > maxIndex) {	/* need to extrapolate above */
46914779705SSam Leffler 			while(ss < (int16_t)tgtIndex) {
47014779705SSam Leffler 				tmpVal = (uint16_t)
47114779705SSam Leffler 					(VpdTable_I[ii][sizeCurrVpdTable-1] +
47214779705SSam Leffler 					 (ss-maxIndex)*Vpd_step);
47314779705SSam Leffler 				pPDADCValues[kk++] = (tmpVal > 127) ?
47414779705SSam Leffler 					127 : tmpVal;
47514779705SSam Leffler 				ss++;
47614779705SSam Leffler 			}
47714779705SSam Leffler 		}				/* extrapolated above */
47814779705SSam Leffler 	}					/* for all pdGainUsed */
47914779705SSam Leffler 
48014779705SSam Leffler 	while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
48114779705SSam Leffler 		pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
48214779705SSam Leffler 		ii++;
48314779705SSam Leffler 	}
48414779705SSam Leffler 	while (kk < 128) {
48514779705SSam Leffler 		pPDADCValues[kk] = pPDADCValues[kk-1];
48614779705SSam Leffler 		kk++;
48714779705SSam Leffler 	}
48814779705SSam Leffler 
48914779705SSam Leffler 	return numPdGainsUsed;
49014779705SSam Leffler #undef VpdTable_L
49114779705SSam Leffler #undef VpdTable_R
49214779705SSam Leffler #undef VpdTable_I
49314779705SSam Leffler }
49414779705SSam Leffler 
49514779705SSam Leffler static HAL_BOOL
ar2413SetPowerTable(struct ath_hal * ah,int16_t * minPower,int16_t * maxPower,const struct ieee80211_channel * chan,uint16_t * rfXpdGain)49614779705SSam Leffler ar2413SetPowerTable(struct ath_hal *ah,
49759efa8b5SSam Leffler 	int16_t *minPower, int16_t *maxPower,
49859efa8b5SSam Leffler 	const struct ieee80211_channel *chan,
49914779705SSam Leffler 	uint16_t *rfXpdGain)
50014779705SSam Leffler {
50159efa8b5SSam Leffler 	uint16_t freq = ath_hal_gethwchannel(ah, chan);
50214779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
50314779705SSam Leffler 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
50414779705SSam Leffler 	const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
50514779705SSam Leffler 	uint16_t pdGainOverlap_t2;
50614779705SSam Leffler 	int16_t minCalPower2413_t2;
50714779705SSam Leffler 	uint16_t *pdadcValues = ahp->ah_pcdacTable;
50814779705SSam Leffler 	uint16_t gainBoundaries[4];
50914779705SSam Leffler 	uint32_t reg32, regoffset;
51014779705SSam Leffler 	int i, numPdGainsUsed;
51114779705SSam Leffler #ifndef AH_USE_INIPDGAIN
51214779705SSam Leffler 	uint32_t tpcrg1;
51314779705SSam Leffler #endif
51414779705SSam Leffler 
51514779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
51659efa8b5SSam Leffler 	    __func__, freq, chan->ic_flags);
51714779705SSam Leffler 
51859efa8b5SSam Leffler 	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
51914779705SSam Leffler 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
52059efa8b5SSam Leffler 	else if (IEEE80211_IS_CHAN_B(chan))
52114779705SSam Leffler 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
52214779705SSam Leffler 	else {
52314779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__);
52414779705SSam Leffler 		return AH_FALSE;
52514779705SSam Leffler 	}
52614779705SSam Leffler 
52714779705SSam Leffler 	pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
52814779705SSam Leffler 					  AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
52914779705SSam Leffler 
53014779705SSam Leffler 	numPdGainsUsed = ar2413getGainBoundariesAndPdadcsForPowers(ah,
53159efa8b5SSam Leffler 		freq, pRawDataset, pdGainOverlap_t2,
53214779705SSam Leffler 		&minCalPower2413_t2,gainBoundaries, rfXpdGain, pdadcValues);
53314779705SSam Leffler 	HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
53414779705SSam Leffler 
53514779705SSam Leffler #ifdef AH_USE_INIPDGAIN
53614779705SSam Leffler 	/*
53714779705SSam Leffler 	 * Use pd_gains curve from eeprom; Atheros always uses
53814779705SSam Leffler 	 * the default curve from the ini file but some vendors
53914779705SSam Leffler 	 * (e.g. Zcomax) want to override this curve and not
54014779705SSam Leffler 	 * honoring their settings results in tx power 5dBm low.
54114779705SSam Leffler 	 */
54214779705SSam Leffler 	OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
54314779705SSam Leffler 			 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
54414779705SSam Leffler #else
54514779705SSam Leffler 	tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
54614779705SSam Leffler 	tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
54714779705SSam Leffler 		  | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
54814779705SSam Leffler 	switch (numPdGainsUsed) {
54914779705SSam Leffler 	case 3:
55014779705SSam Leffler 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
55114779705SSam Leffler 		tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
55214779705SSam Leffler 		/* fall thru... */
55314779705SSam Leffler 	case 2:
55414779705SSam Leffler 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
55514779705SSam Leffler 		tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
55614779705SSam Leffler 		/* fall thru... */
55714779705SSam Leffler 	case 1:
55814779705SSam Leffler 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
55914779705SSam Leffler 		tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
56014779705SSam Leffler 		break;
56114779705SSam Leffler 	}
56214779705SSam Leffler #ifdef AH_DEBUG
56314779705SSam Leffler 	if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
56414779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
56514779705SSam Leffler 		    "pd_gains (default 0x%x, calculated 0x%x)\n",
56614779705SSam Leffler 		    __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
56714779705SSam Leffler #endif
56814779705SSam Leffler 	OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
56914779705SSam Leffler #endif
57014779705SSam Leffler 
57114779705SSam Leffler 	/*
57214779705SSam Leffler 	 * Note the pdadc table may not start at 0 dBm power, could be
57314779705SSam Leffler 	 * negative or greater than 0.  Need to offset the power
57414779705SSam Leffler 	 * values by the amount of minPower for griffin
57514779705SSam Leffler 	 */
57614779705SSam Leffler 	if (minCalPower2413_t2 != 0)
57714779705SSam Leffler 		ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2);
57814779705SSam Leffler 	else
57914779705SSam Leffler 		ahp->ah_txPowerIndexOffset = 0;
58014779705SSam Leffler 
58114779705SSam Leffler 	/* Finally, write the power values into the baseband power table */
58214779705SSam Leffler 	regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
58314779705SSam Leffler 	for (i = 0; i < 32; i++) {
58414779705SSam Leffler 		reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0)  |
58514779705SSam Leffler 			((pdadcValues[4*i + 1] & 0xFF) << 8)  |
58614779705SSam Leffler 			((pdadcValues[4*i + 2] & 0xFF) << 16) |
58714779705SSam Leffler 			((pdadcValues[4*i + 3] & 0xFF) << 24) ;
58814779705SSam Leffler 		OS_REG_WRITE(ah, regoffset, reg32);
58914779705SSam Leffler 		regoffset += 4;
59014779705SSam Leffler 	}
59114779705SSam Leffler 
59214779705SSam Leffler 	OS_REG_WRITE(ah, AR_PHY_TPCRG5,
59314779705SSam Leffler 		     SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
59414779705SSam Leffler 		     SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
59514779705SSam Leffler 		     SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
59614779705SSam Leffler 		     SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
59714779705SSam Leffler 		     SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
59814779705SSam Leffler 
59914779705SSam Leffler 	return AH_TRUE;
60014779705SSam Leffler }
60114779705SSam Leffler 
60214779705SSam Leffler static int16_t
ar2413GetMinPower(struct ath_hal * ah,const RAW_DATA_PER_CHANNEL_2413 * data)60314779705SSam Leffler ar2413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
60414779705SSam Leffler {
60514779705SSam Leffler 	uint32_t ii,jj;
60614779705SSam Leffler 	uint16_t Pmin=0,numVpd;
60714779705SSam Leffler 
60814779705SSam Leffler 	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
60914779705SSam Leffler 		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
61014779705SSam Leffler 		/* work backwards 'cause highest pdGain for lowest power */
61114779705SSam Leffler 		numVpd = data->pDataPerPDGain[jj].numVpd;
61214779705SSam Leffler 		if (numVpd > 0) {
61314779705SSam Leffler 			Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
61414779705SSam Leffler 			return(Pmin);
61514779705SSam Leffler 		}
61614779705SSam Leffler 	}
61714779705SSam Leffler 	return(Pmin);
61814779705SSam Leffler }
61914779705SSam Leffler 
62014779705SSam Leffler static int16_t
ar2413GetMaxPower(struct ath_hal * ah,const RAW_DATA_PER_CHANNEL_2413 * data)62114779705SSam Leffler ar2413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
62214779705SSam Leffler {
62314779705SSam Leffler 	uint32_t ii;
62414779705SSam Leffler 	uint16_t Pmax=0,numVpd;
62514779705SSam Leffler 
62614779705SSam Leffler 	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
62714779705SSam Leffler 		/* work forwards cuase lowest pdGain for highest power */
62814779705SSam Leffler 		numVpd = data->pDataPerPDGain[ii].numVpd;
62914779705SSam Leffler 		if (numVpd > 0) {
63014779705SSam Leffler 			Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
63114779705SSam Leffler 			return(Pmax);
63214779705SSam Leffler 		}
63314779705SSam Leffler 	}
63414779705SSam Leffler 	return(Pmax);
63514779705SSam Leffler }
63614779705SSam Leffler 
63714779705SSam Leffler static HAL_BOOL
ar2413GetChannelMaxMinPower(struct ath_hal * ah,const struct ieee80211_channel * chan,int16_t * maxPow,int16_t * minPow)63859efa8b5SSam Leffler ar2413GetChannelMaxMinPower(struct ath_hal *ah,
63959efa8b5SSam Leffler 	const struct ieee80211_channel *chan,
64014779705SSam Leffler 	int16_t *maxPow, int16_t *minPow)
64114779705SSam Leffler {
64259efa8b5SSam Leffler 	uint16_t freq = chan->ic_freq;		/* NB: never mapped */
64314779705SSam Leffler 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
64414779705SSam Leffler 	const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
64514779705SSam Leffler 	const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL;
64614779705SSam Leffler 	uint16_t numChannels;
64714779705SSam Leffler 	int totalD,totalF, totalMin,last, i;
64814779705SSam Leffler 
64914779705SSam Leffler 	*maxPow = 0;
65014779705SSam Leffler 
65159efa8b5SSam Leffler 	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
65214779705SSam Leffler 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
65359efa8b5SSam Leffler 	else if (IEEE80211_IS_CHAN_B(chan))
65414779705SSam Leffler 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
65514779705SSam Leffler 	else
65614779705SSam Leffler 		return(AH_FALSE);
65714779705SSam Leffler 
65814779705SSam Leffler 	numChannels = pRawDataset->numChannels;
65914779705SSam Leffler 	data = pRawDataset->pDataPerChannel;
66014779705SSam Leffler 
66114779705SSam Leffler 	/* Make sure the channel is in the range of the TP values
66214779705SSam Leffler 	 *  (freq piers)
66314779705SSam Leffler 	 */
66414779705SSam Leffler 	if (numChannels < 1)
66514779705SSam Leffler 		return(AH_FALSE);
66614779705SSam Leffler 
66759efa8b5SSam Leffler 	if ((freq < data[0].channelValue) ||
66859efa8b5SSam Leffler 	    (freq > data[numChannels-1].channelValue)) {
66959efa8b5SSam Leffler 		if (freq < data[0].channelValue) {
67014779705SSam Leffler 			*maxPow = ar2413GetMaxPower(ah, &data[0]);
67114779705SSam Leffler 			*minPow = ar2413GetMinPower(ah, &data[0]);
67214779705SSam Leffler 			return(AH_TRUE);
67314779705SSam Leffler 		} else {
67414779705SSam Leffler 			*maxPow = ar2413GetMaxPower(ah, &data[numChannels - 1]);
67514779705SSam Leffler 			*minPow = ar2413GetMinPower(ah, &data[numChannels - 1]);
67614779705SSam Leffler 			return(AH_TRUE);
67714779705SSam Leffler 		}
67814779705SSam Leffler 	}
67914779705SSam Leffler 
68014779705SSam Leffler 	/* Linearly interpolate the power value now */
68159efa8b5SSam Leffler 	for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
68214779705SSam Leffler 	     last = i++);
68314779705SSam Leffler 	totalD = data[i].channelValue - data[last].channelValue;
68414779705SSam Leffler 	if (totalD > 0) {
68514779705SSam Leffler 		totalF = ar2413GetMaxPower(ah, &data[i]) - ar2413GetMaxPower(ah, &data[last]);
68659efa8b5SSam Leffler 		*maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
68714779705SSam Leffler 				     ar2413GetMaxPower(ah, &data[last])*totalD)/totalD);
68814779705SSam Leffler 		totalMin = ar2413GetMinPower(ah, &data[i]) - ar2413GetMinPower(ah, &data[last]);
68959efa8b5SSam Leffler 		*minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
69014779705SSam Leffler 				     ar2413GetMinPower(ah, &data[last])*totalD)/totalD);
69114779705SSam Leffler 		return(AH_TRUE);
69214779705SSam Leffler 	} else {
69359efa8b5SSam Leffler 		if (freq == data[i].channelValue) {
69414779705SSam Leffler 			*maxPow = ar2413GetMaxPower(ah, &data[i]);
69514779705SSam Leffler 			*minPow = ar2413GetMinPower(ah, &data[i]);
69614779705SSam Leffler 			return(AH_TRUE);
69714779705SSam Leffler 		} else
69814779705SSam Leffler 			return(AH_FALSE);
69914779705SSam Leffler 	}
70014779705SSam Leffler }
70114779705SSam Leffler 
70214779705SSam Leffler /*
70314779705SSam Leffler  * Free memory for analog bank scratch buffers
70414779705SSam Leffler  */
70514779705SSam Leffler static void
ar2413RfDetach(struct ath_hal * ah)70614779705SSam Leffler ar2413RfDetach(struct ath_hal *ah)
70714779705SSam Leffler {
70814779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
70914779705SSam Leffler 
71014779705SSam Leffler 	HALASSERT(ahp->ah_rfHal != AH_NULL);
71114779705SSam Leffler 	ath_hal_free(ahp->ah_rfHal);
71214779705SSam Leffler 	ahp->ah_rfHal = AH_NULL;
71314779705SSam Leffler }
71414779705SSam Leffler 
71514779705SSam Leffler /*
71614779705SSam Leffler  * Allocate memory for analog bank scratch buffers
71714779705SSam Leffler  * Scratch Buffer will be reinitialized every reset so no need to zero now
71814779705SSam Leffler  */
71914779705SSam Leffler static HAL_BOOL
ar2413RfAttach(struct ath_hal * ah,HAL_STATUS * status)72014779705SSam Leffler ar2413RfAttach(struct ath_hal *ah, HAL_STATUS *status)
72114779705SSam Leffler {
72214779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
72314779705SSam Leffler 	struct ar2413State *priv;
72414779705SSam Leffler 
72514779705SSam Leffler 	HALASSERT(ah->ah_magic == AR5212_MAGIC);
72614779705SSam Leffler 
72714779705SSam Leffler 	HALASSERT(ahp->ah_rfHal == AH_NULL);
72814779705SSam Leffler 	priv = ath_hal_malloc(sizeof(struct ar2413State));
72914779705SSam Leffler 	if (priv == AH_NULL) {
73014779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY,
73114779705SSam Leffler 		    "%s: cannot allocate private state\n", __func__);
73214779705SSam Leffler 		*status = HAL_ENOMEM;		/* XXX */
73314779705SSam Leffler 		return AH_FALSE;
73414779705SSam Leffler 	}
73514779705SSam Leffler 	priv->base.rfDetach		= ar2413RfDetach;
73614779705SSam Leffler 	priv->base.writeRegs		= ar2413WriteRegs;
73714779705SSam Leffler 	priv->base.getRfBank		= ar2413GetRfBank;
73814779705SSam Leffler 	priv->base.setChannel		= ar2413SetChannel;
73914779705SSam Leffler 	priv->base.setRfRegs		= ar2413SetRfRegs;
74014779705SSam Leffler 	priv->base.setPowerTable	= ar2413SetPowerTable;
74114779705SSam Leffler 	priv->base.getChannelMaxMinPower = ar2413GetChannelMaxMinPower;
74214779705SSam Leffler 	priv->base.getNfAdjust		= ar5212GetNfAdjust;
74314779705SSam Leffler 
74414779705SSam Leffler 	ahp->ah_pcdacTable = priv->pcdacTable;
74514779705SSam Leffler 	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
74614779705SSam Leffler 	ahp->ah_rfHal = &priv->base;
74714779705SSam Leffler 
74814779705SSam Leffler 	return AH_TRUE;
74914779705SSam Leffler }
75014779705SSam Leffler 
75114779705SSam Leffler static HAL_BOOL
ar2413Probe(struct ath_hal * ah)75214779705SSam Leffler ar2413Probe(struct ath_hal *ah)
75314779705SSam Leffler {
75414779705SSam Leffler 	return IS_2413(ah);
75514779705SSam Leffler }
75614779705SSam Leffler AH_RF(RF2413, ar2413Probe, ar2413RfAttach);
757