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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp62 SP::G0, SP::G1, SP::G2, SP::G3,
63 SP::G4, SP::G5, SP::G6, SP::G7,
64 SP::O0, SP::O1, SP::O2, SP::O3,
65 SP::O4, SP::O5, SP::O6, SP::O7,
66 SP::L0, SP::L1, SP::L2, SP::L3,
67 SP::L4, SP::L5, SP::L6, SP::L7,
68 SP::I0, SP::I1, SP::I2, SP::I3,
69 SP::I4, SP::I5, SP::I6, SP::I7 };
72 SP::F0, SP::F1, SP::F2, SP::F3,
73 SP::F4, SP::F5, SP::F6, SP::F7,
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp41 : SparcGenInstrInfo(SP::ADJCALLSTACKDOWN, SP::ADJCALLSTACKUP), RI(), in SparcInstrInfo()
51 if (MI.getOpcode() == SP::LDri || MI.getOpcode() == SP::LDXri || in isLoadFromStackSlot()
52 MI.getOpcode() == SP::LDFri || MI.getOpcode() == SP::LDDFri || in isLoadFromStackSlot()
53 MI.getOpcode() == SP::LDQFri) { in isLoadFromStackSlot()
70 if (MI.getOpcode() == SP::STri || MI.getOpcode() == SP::STXri || in isStoreToStackSlot()
71 MI.getOpcode() == SP::STFri || MI.getOpcode() == SP::STDFri || in isStoreToStackSlot()
72 MI.getOpcode() == SP::STQFri) { in isStoreToStackSlot()
159 static bool isUncondBranchOpcode(int Opc) { return Opc == SP::BA; } in isUncondBranchOpcode()
162 return Opc == SP::BCOND || Opc == SP::BPICC || Opc == SP::BPICCA || in isI32CondBranchOpcode()
163 Opc == SP::BPICCNT || Opc == SP::BPICCANT; in isI32CondBranchOpcode()
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H A DSparcFrameLowering.cpp52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6) in emitSPAdjustment()
53 .addReg(SP::O6).addImm(NumBytes); in emitSPAdjustment()
64 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1) in emitSPAdjustment()
66 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1) in emitSPAdjustment()
67 .addReg(SP::G1).addImm(LO10(NumBytes)); in emitSPAdjustment()
68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6) in emitSPAdjustment()
69 .addReg(SP::O6).addReg(SP::G1); in emitSPAdjustment()
77 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1) in emitSPAdjustment()
79 BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1) in emitSPAdjustment()
80 .addReg(SP::G1).addImm(LOX10(NumBytes)); in emitSPAdjustment()
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H A DDelaySlotFiller.cpp114 (MI->getOpcode() == SP::RESTORErr in runOnMachineBasicBlock()
115 || MI->getOpcode() == SP::RESTOREri)) { in runOnMachineBasicBlock()
123 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD in runOnMachineBasicBlock()
124 || MI->getOpcode() == SP::FCMPQ)) { in runOnMachineBasicBlock()
125 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP)); in runOnMachineBasicBlock()
143 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP)); in runOnMachineBasicBlock()
153 TII->get(SP::UNIMP)).addImm(structSize); in runOnMachineBasicBlock()
177 if (Opc == SP::RET || Opc == SP::TLS_CALL) in findDelayInstr()
180 if (Opc == SP::RETL || Opc == SP::TAIL_CALL || Opc == SP::TAIL_CALLri) { in findDelayInstr()
184 if (J->getOpcode() == SP::RESTORErr in findDelayInstr()
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H A DSparcRegisterInfo.cpp34 SparcRegisterInfo::SparcRegisterInfo() : SparcGenRegisterInfo(SP::O7) {} in SparcRegisterInfo()
56 Reserved.set(SP::G1); in getReservedRegs()
60 Reserved.set(SP::G2); in getReservedRegs()
61 Reserved.set(SP::G3); in getReservedRegs()
62 Reserved.set(SP::G4); in getReservedRegs()
66 Reserved.set(SP::G5); in getReservedRegs()
68 Reserved.set(SP::O6); in getReservedRegs()
69 Reserved.set(SP::I6); in getReservedRegs()
70 Reserved.set(SP::I7); in getReservedRegs()
71 Reserved.set(SP::G0); in getReservedRegs()
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H A DLeonPasses.cpp53 BuildMI(*I->getParent(), I, I->getDebugLoc(), TII->get(SP::NOP)); in insertNop()
65 if (!SP::FPRegsRegClass.contains(reg) && !SP::DFPRegsRegClass.contains(reg)) in isFloat()
73 case SP::FDIVS: in isDivSqrt()
74 case SP::FDIVD: in isDivSqrt()
75 case SP::FSQRTS: in isDivSqrt()
76 case SP::FSQRTD: in isDivSqrt()
88 case SP::STrr: in checkSeqTN0009A()
89 case SP::STri: in checkSeqTN0009A()
90 case SP::STBrr: in checkSeqTN0009A()
91 case SP::STBri: in checkSeqTN0009A()
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H A DSparcAsmPrinter.cpp114 CallInst.setOpcode(SP::CALL); in EmitCall()
122 RDPCInst.setOpcode(SP::RDASR); in EmitRDPC()
124 RDPCInst.addOperand(MCOperand::createReg(SP::ASR5)); in EmitRDPC()
133 SETHIInst.setOpcode(SP::SETHIi); in EmitSETHI()
154 EmitBinary(OutStreamer, SP::ORri, RS1, Imm, RD, STI); in EmitOR()
160 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI); in EmitADD()
166 EmitBinary(OutStreamer, SP::SLLri, RS1, Imm, RD, STI); in EmitSHL()
185 assert(MO.getReg() != SP::O7 && in LowerGETPCXAndEmitMCInsts()
218 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
231 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
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H A DSparcISelLowering.cpp64 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in CC_Sparc_Assign_Split_64()
90 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in CC_Sparc_Assign_Ret_Split_64()
125 Reg = SP::I0 + Offset/8; in Analyze_CC_Sparc64_Full()
128 Reg = SP::D0 + Offset/8; in Analyze_CC_Sparc64_Full()
131 Reg = SP::F1 + Offset/4; in Analyze_CC_Sparc64_Full()
134 Reg = SP::Q0 + Offset/16; in Analyze_CC_Sparc64_Full()
168 State.addLoc(CCValAssign::getReg(ValNo, ValVT, SP::F0 + Offset/4, in Analyze_CC_Sparc64_Half()
175 unsigned Reg = SP::I0 + Offset/8; in Analyze_CC_Sparc64_Half()
231 static_assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7, in toCallerWindow()
233 if (Reg >= SP::I0 && Reg <= SP::I7) in toCallerWindow()
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H A DSparcISelDAGToDAG.cpp151 R2 = CurDAG->getRegister(SP::G0, TLI->getPointerTy(CurDAG->getDataLayout())); in SelectADDRrr()
225 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm()
241 Register GPVR = MRI.createVirtualRegister(&SP::IntPairRegClass); in tryInlineAsm()
250 SDValue Sub0 = CurDAG->getTargetExtractSubreg(SP::sub_even, dl, MVT::i32, in tryInlineAsm()
252 SDValue Sub1 = CurDAG->getTargetExtractSubreg(SP::sub_odd, dl, MVT::i32, in tryInlineAsm()
276 CurDAG->getTargetConstant(SP::IntPairRegClassID, dl, in tryInlineAsm()
279 CurDAG->getTargetConstant(SP::sub_even, dl, MVT::i32), in tryInlineAsm()
281 CurDAG->getTargetConstant(SP::sub_odd, dl, MVT::i32), in tryInlineAsm()
287 Register GPVR = MRI.createVirtualRegister(&SP::IntPairRegClass); in tryInlineAsm()
303 Flag.setRegClass(SP::IntPairRegClassID); in tryInlineAsm()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcInstPrinter.cpp29 using namespace SP;
64 case SP::JMPLrr: in printSparcAliasInstr()
65 case SP::JMPLri: { in printSparcAliasInstr()
72 case SP::G0: // jmp $addr | ret | retl in printSparcAliasInstr()
77 case SP::I7: O << "\tret"; return true; in printSparcAliasInstr()
78 case SP::O7: O << "\tretl"; return true; in printSparcAliasInstr()
83 case SP::O7: // call $addr in printSparcAliasInstr()
88 case SP::V9FCMPS: case SP::V9FCMPD: case SP::V9FCMPQ: in printSparcAliasInstr()
89 case SP::V9FCMPES: case SP::V9FCMPED: case SP::V9FCMPEQ: { in printSparcAliasInstr()
93 || (MI->getOperand(0).getReg() != SP::FCC0)) in printSparcAliasInstr()
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/freebsd/usr.bin/procstat/tests/
H A Dprocstat_test.sh30 SP='[[:space:]]'
56 line_format="$SP*%s$SP+%s$SP+%s$SP+%s$SP*"
80 line_format="$SP*%s$SP+%s$SP+%s$SP*"
105 line_format="$SP*%s$SP+%s$SP+%s$SP*"
127 line_format="$SP*%s$SP+%s$SP+%s$SP+%s$SP+%s$SP+%s$SP+%s$SP+%s$SP+%s$SP%s$SP*"
/freebsd/contrib/llvm-project/compiler-rt/lib/orc/tests/unit/
H A Dstring_pool_test.cpp17 StringPool SP; in TEST() local
18 auto P1 = SP.intern("hello"); in TEST()
22 auto P2 = SP.intern(S); in TEST()
24 auto P3 = SP.intern("goodbye"); in TEST()
36 StringPool SP; in TEST() local
37 auto Foo = SP.intern("foo"); in TEST()
42 StringPool SP; in TEST() local
44 auto P1 = SP.intern("s1"); in TEST()
45 SP.clearDeadEntries(); in TEST()
46 EXPECT_FALSE(SP.empty()) << "\"s1\" entry in pool should still be retained"; in TEST()
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/freebsd/crypto/heimdal/appl/ftp/ftpd/
H A Dftpcmd.y95 SP CRLF COMMA
140 : USER SP username CRLF check_secure
146 | PASS SP password CRLF check_secure
154 | PORT SP host_port CRLF check_secure
175 | EPRT SP STRING CRLF check_secure
191 | EPSV SP STRING CRLF check_login
197 | TYPE SP type_code CRLF check_secure
234 | STRU SP struct_code CRLF check_secure
248 | MODE SP mode_code CRLF check_secure
262 | ALLO SP NUMBER CRLF check_secure
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/freebsd/crypto/krb5/src/lib/crypto/builtin/des/
H A Df_tables.h52 #define SP des_SP_table macro
106 (left) ^= SP[0][((temp) >> 24) & 0x3f] \
107 | SP[1][((temp) >> 16) & 0x3f] \
108 | SP[2][((temp) >> 8) & 0x3f] \
109 | SP[3][((temp) ) & 0x3f]; \
111 (left) ^= SP[4][((temp) >> 24) & 0x3f] \
112 | SP[5][((temp) >> 16) & 0x3f] \
113 | SP[6][((temp) >> 8) & 0x3f] \
114 | SP[7][((temp) ) & 0x3f]; \
119 (left) ^= SP[7][((temp) ) & 0x3f] \
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/freebsd/libexec/ftpd/
H A Dftpcmd.y
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DJMCInstrumenter.cpp72 std::string getFlagName(DISubprogram &SP, bool UseX86FastCall) { in getFlagName() argument
79 has_root_name(SP.getDirectory(), sys::path::Style::windows_backslash) || in getFlagName()
80 SP.getDirectory().contains("\\") || in getFlagName()
81 SP.getFilename().contains("\\") in getFlagName()
89 SmallString<256> FilePath(SP.getDirectory()); in getFlagName()
90 sys::path::append(FilePath, PathStyle, SP.getFilename()); in getFlagName()
111 void attachDebugInfo(GlobalVariable &GV, DISubprogram &SP) { in attachDebugInfo() argument
113 DICompileUnit *CU = SP.getUnit(); in attachDebugInfo()
122 CU, GV.getName(), /*LinkageName=*/StringRef(), SP.getFile(), in attachDebugInfo()
168 auto *SP = F.getSubprogram(); in runImpl() local
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/freebsd/crypto/openssl/crypto/sha/asm/
H A Dkeccak1600-c64x.pl106 || STDW B3:B2,*SP[4]
147 || STDW A$A[3][0]:A$A[4][0],*SP[1] ; offload some data
148 STDW B$A[3][0]:B$A[4][0],*SP[2]
206 || LDDW *SP[2],B$A[3][0]:B$A[4][0]
375 ||[!A0] LDDW *SP[4], RA:B2
407 STW FP,*SP--(80) ; save frame pointer
409 STDW B13:B12,*SP[9]
411 STDW B11:B10,*SP[8]
413 STW RA, *SP[15]
523 LDW *SP[15],RA
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaFrameLowering.cpp49 MCRegister SP = Xtensa::SP; in emitPrologue() local
69 .addReg(SP) in emitPrologue()
76 .addReg(SP) in emitPrologue()
80 .addReg(SP) in emitPrologue()
82 BuildMI(MBB, MBBI, DL, TII.get(Xtensa::MOVSP), SP).addReg(TmpReg); in emitPrologue()
102 BuildMI(MBB, MBBI, DL, TII.get(Xtensa::ADD), SP) in emitPrologue()
103 .addReg(SP) in emitPrologue()
119 .addReg(SP) in emitPrologue()
120 .addReg(SP) in emitPrologue()
141 TII.adjustStackPtr(SP, -StackSize, MBB, MBBI); in emitPrologue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp109 ScalarAlloc, ARC::SP); in adjustStackToMatchRecords()
141 BuildMI(MBB, MBBI, dl, TII->get(Opc), ARC::SP) in emitPrologue()
142 .addReg(ARC::SP) in emitPrologue()
148 .addReg(ARC::SP, RegState::Define) in emitPrologue()
150 .addReg(ARC::SP) in emitPrologue()
160 .addReg(ARC::SP) in emitPrologue()
161 .addReg(ARC::SP) in emitPrologue()
181 -(MFI.getStackSize() - AlreadyAdjusted), ARC::SP); in emitPrologue()
189 .addReg(ARC::SP) in emitPrologue()
256 BuildMI(MBB, MBBI, DebugLoc(), TII->get(Opc), ARC::SP) in emitEpilogue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430FrameLowering.cpp127 .addReg(MSP430::SP) in emitPrologue()
172 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SP) in emitPrologue()
173 .addReg(MSP430::SP) in emitPrologue()
223 unsigned DwarfStackPtr = TRI->getDwarfRegNum(MSP430::SP, true); in emitEpilogue()
260 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::SP) in emitEpilogue()
265 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SP) in emitEpilogue()
266 .addReg(MSP430::SP) in emitEpilogue()
276 BuildMI(MBB, MBBI, DL, TII.get(MSP430::ADD16ri), MSP430::SP) in emitEpilogue()
277 .addReg(MSP430::SP) in emitEpilogue()
378 BuildMI(MF, Old.getDebugLoc(), TII.get(MSP430::SUB16ri), MSP430::SP) in eliminateCallFramePseudoInstr()
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/freebsd/contrib/ntp/scripts/stats/
H A DREADME.timecodes19 <SP> ASCII space (hex 20)
29 In the following uppercase letters, punctuation marks and spaces <SP>
31 Special characters other than <LF>, <CR> and <SP> are preceded by ^.
39 i = synchronization flag (<SP> = in synch, ? = out synch)
44 Note: alarm condition is indicated by other than <SP> at A, which
57 i = synchronization flag (<SP> = in synch, ? = out synch)
58 q = quality indicator (<SP> < 1ms, A < 10 ms, B < 100 ms, C < 500
64 d = standard/daylight time indicator (<SP> standard, D daylight)
66 Note: alarm condition is indicated by other than <SP> at A, which
69 other than <SP> at Q, with time since last lock indicated by the
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp50 using namespace SP;
708 TmpInst.setOpcode(SP::SETHIi); in expandSET()
733 TmpInst.setOpcode(SP::ORri); in expandSET()
769 MCInstBuilder(SP::SETHIi) in expandSETSW()
782 Instructions.push_back(MCInstBuilder(SP::ORri) in expandSETSW()
795 Instructions.push_back(MCInstBuilder(SP::SRArr) in expandSETSW()
822 Instructions.push_back(MCInstBuilder(SP::ORri) in expandSETX()
833 MCInstBuilder(SP::SETHIi) in expandSETX()
838 MCInstBuilder(SP::ORri) in expandSETX()
852 Instructions.push_back(MCInstBuilder(SP::SETHIi) in expandSETX()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DEntryExitInstrumenter.cpp134 if (auto SP = F.getSubprogram()) in runOnFunction() local
135 DL = DILocation::get(SP->getContext(), SP->getScopeLine(), 0, SP); in runOnFunction()
155 else if (auto SP = F.getSubprogram()) in runOnFunction() local
156 DL = DILocation::get(SP->getContext(), 0, 0, SP); in runOnFunction()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16InstrInfo.h73 void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
77 void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
81 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
118 void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
123 void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount,
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfUnit.cpp470 void DwarfUnit::addSourceLine(DIE &Die, const DISubprogram *SP) { in addSourceLine() argument
471 assert(SP); in addSourceLine()
473 addSourceLine(Die, SP->getLine(), /*Column*/ 0, SP->getFile()); in addSourceLine()
575 if (auto *SP = dyn_cast<DISubprogram>(Context)) in getOrCreateContextDIE() local
576 return getOrCreateSubprogramDIE(SP); in getOrCreateContextDIE()
1068 if (auto *SP = dyn_cast<DISubprogram>(Element)) in constructTypeDIE() local
1069 getOrCreateSubprogramDIE(SP); in constructTypeDIE()
1338 DIE *DwarfUnit::getOrCreateSubprogramDIE(const DISubprogram *SP, bool Minimal) { in getOrCreateSubprogramDIE() argument
1343 Minimal ? &getUnitDie() : getOrCreateContextDIE(SP->getScope()); in getOrCreateSubprogramDIE()
1345 if (DIE *SPDie = getDIE(SP)) in getOrCreateSubprogramDIE()
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