Lines Matching refs:SP
110 CallInst.setOpcode(SP::CALL); in EmitCall()
118 RDPCInst.setOpcode(SP::RDASR); in EmitRDPC()
120 RDPCInst.addOperand(MCOperand::createReg(SP::ASR5)); in EmitRDPC()
129 SETHIInst.setOpcode(SP::SETHIi); in EmitSETHI()
150 EmitBinary(OutStreamer, SP::ORri, RS1, Imm, RD, STI); in EmitOR()
156 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI); in EmitADD()
162 EmitBinary(OutStreamer, SP::SLLri, RS1, Imm, RD, STI); in EmitSHL()
186 assert(MO.getReg() != SP::O7 && in LowerGETPCXAndEmitMCInsts()
222 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
236 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
280 case SP::GETPCX: in emitInstruction()
298 const unsigned globalRegs[] = { SP::G2, SP::G3, SP::G6, SP::G7, 0 }; in emitFunctionBodyStart()
304 if (reg == SP::G6 || reg == SP::G7) in emitFunctionBodyStart()
364 MI->getOperand(opNum+1).getReg() == SP::G0) in printMemOperand()
395 if (!SP::IntPairRegClass.contains(MOReg)) { in PrintAsmOperand()
400 MOReg = RegisterInfo->getMatchingSuperReg(MOReg, SP::sub_even, in PrintAsmOperand()
401 &SP::IntPairRegClass); in PrintAsmOperand()
414 HiReg = RegisterInfo->getSubReg(MOReg, SP::sub_even); in PrintAsmOperand()
415 LoReg = RegisterInfo->getSubReg(MOReg, SP::sub_odd); in PrintAsmOperand()