Home
last modified time | relevance | path

Searched full:xspi (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/spi/
H A Dspi-xilinx.c116 static void xilinx_spi_tx(struct xilinx_spi *xspi) in xilinx_spi_tx() argument
120 if (!xspi->tx_ptr) { in xilinx_spi_tx()
121 xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET); in xilinx_spi_tx()
125 switch (xspi->bytes_per_word) { in xilinx_spi_tx()
127 data = *(u8 *)(xspi->tx_ptr); in xilinx_spi_tx()
130 data = *(u16 *)(xspi->tx_ptr); in xilinx_spi_tx()
133 data = *(u32 *)(xspi->tx_ptr); in xilinx_spi_tx()
137 xspi->write_fn(data, xspi->regs + XSPI_TXD_OFFSET); in xilinx_spi_tx()
138 xspi->tx_ptr += xspi->bytes_per_word; in xilinx_spi_tx()
141 static void xilinx_spi_rx(struct xilinx_spi *xspi) in xilinx_spi_rx() argument
[all …]
H A Dspi-cadence.c143 static inline u32 cdns_spi_read(struct cdns_spi *xspi, u32 offset)
145 return readl_relaxed(xspi->regs + offset);
148 static inline void cdns_spi_write(struct cdns_spi *xspi, u32 offset, u32 val)
150 writel_relaxed(val, xspi->regs + offset);
155 * @xspi: Pointer to the cdns_spi structure
165 static void cdns_spi_init_hw(struct cdns_spi *xspi, bool is_target) in cdns_spi_init_hw()
172 if (xspi->is_decoded_cs) in cdns_spi_init_hw()
175 cdns_spi_write(xspi, CDNS_SPI_ER, CDNS_SPI_ER_DISABLE); in cdns_spi_init_hw()
176 cdns_spi_write(xspi, CDNS_SPI_IDR, CDNS_SPI_IXR_ALL); in cdns_spi_init_hw()
179 while (cdns_spi_read(xspi, CDNS_SPI_IS
134 cdns_spi_read(struct cdns_spi * xspi,u32 offset) cdns_spi_read() argument
139 cdns_spi_write(struct cdns_spi * xspi,u32 offset,u32 val) cdns_spi_write() argument
156 cdns_spi_init_hw(struct cdns_spi * xspi,bool is_target) cdns_spi_init_hw() argument
185 struct cdns_spi *xspi = spi_controller_get_devdata(spi->controller); cdns_spi_chipselect() local
216 struct cdns_spi *xspi = spi_controller_get_devdata(spi->controller); cdns_spi_config_clock_mode() local
259 struct cdns_spi *xspi = spi_controller_get_devdata(spi->controller); cdns_spi_config_clock_freq() local
297 struct cdns_spi *xspi = spi_controller_get_devdata(spi->controller); cdns_spi_setup_transfer() local
314 cdns_spi_process_fifo(struct cdns_spi * xspi,int ntx,int nrx) cdns_spi_process_fifo() argument
361 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_irq() local
434 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_transfer_one() local
474 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_prepare_transfer_hardware() local
493 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_unprepare_transfer_hardware() local
521 cdns_spi_detect_fifo_depth(struct cdns_spi * xspi) cdns_spi_detect_fifo_depth() argument
541 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_target_abort() local
564 struct cdns_spi *xspi; cdns_spi_probe() local
699 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_remove() local
738 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_resume() local
755 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_runtime_resume() local
784 struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); cdns_spi_runtime_suspend() local
[all...]
H A Dspi-xlp.c125 static void xlp_spi_sysctl_setup(struct xlp_spi_priv *xspi) in xlp_spi_sysctl_setup() argument
130 xlp_spi_sysctl_write(xspi, XLP_SPI_SYSCTRL, in xlp_spi_sysctl_setup()
132 xlp_spi_sysctl_write(xspi, XLP_SPI_SYSCTRL, XLP_SPI_SYS_PMEN); in xlp_spi_sysctl_setup()
137 struct xlp_spi_priv *xspi; in xlp_spi_setup() local
141 xspi = spi_controller_get_devdata(spi->controller); in xlp_spi_setup()
146 fdiv = DIV_ROUND_UP(xspi->spi_clk, spi->max_speed_hz); in xlp_spi_setup()
152 xlp_spi_reg_write(xspi, cs, XLP_SPI_FDIV, fdiv); in xlp_spi_setup()
153 xlp_spi_reg_write(xspi, cs, XLP_SPI_FIFO_THRESH, XLP_SPI_TXRXTH); in xlp_spi_setup()
154 cfg = xlp_spi_reg_read(xspi, cs, XLP_SPI_CONFIG); in xlp_spi_setup()
175 xlp_spi_reg_write(xspi, cs, XLP_SPI_CONFIG, cfg); in xlp_spi_setup()
[all …]
H A Dspi-cadence-xspi.c2 // Cadence XSPI flash controller driver
27 #define CDNS_XSPI_NAME "cadence-xspi"
31 * configure XSPI controller pin-strap settings
568 "Incorrect XSPI magic number: %x, expected: %x\n", in cdns_xspi_controller_init()
1273 .compatible = "cdns,xspi-nor",
1277 .compatible = "marvell,cn10-xspi-nor",
1294 MODULE_DESCRIPTION("Cadence XSPI Controller Driver");
H A DKconfig303 tristate "Cadence XSPI controller"
307 Enable support for the Cadence XSPI Flash controller.
309 Cadence XSPI is a specialized controller for connecting an SPI
311 device with a Cadence XSPI controller and want to access the
/linux/drivers/memory/
H A Drenesas-rpc-if.c22 #include "renesas-xspi-if-regs.h"
78 u8 addr_nbytes; /* Specified for xSPI */
79 u32 proto; /* Specified for xSPI */
182 struct rpcif_priv *xspi = context; in xspi_reg_read() local
184 *val = readl(xspi->base + reg); in xspi_reg_read()
190 struct rpcif_priv *xspi = context; in xspi_reg_write() local
192 writel(val, xspi->base + reg); in xspi_reg_write()
214 rpcif->xspi = rpc->info->type == XSPI_RZ_G3E; in rpcif_sw_init()
290 static int xspi_hw_init_impl(struct rpcif_priv *xspi, bool hyperflash) in xspi_hw_init_impl() argument
294 ret = reset_control_reset(xspi->rstc); in xspi_hw_init_impl()
[all …]
H A Drenesas-xspi-if-regs.h3 * RZ xSPI Interface Registers Definitions
13 /* xSPI Wrapper Configuration Register */
16 /* xSPI Bridge Configuration Register */
23 /* xSPI Command Map Configuration Register 0 CS0 */
28 /* xSPI Command Map Configuration Register 1 CS0 */
34 /* xSPI Command Map Configuration Register 2 CS0 */
40 /* xSPI Link I/O Configuration Register CS0 */
47 /* xSPI Bridge Map Control Register 0 */
51 /* xSPI Bridge Map Control Register 1 */
55 /* xSPI Command Manual Control Register 0 */
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drenesas,rzg3e-xspi.yaml4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml#
7 title: Renesas Expanded Serial Peripheral Interface (xSPI)
13 Renesas xSPI allows a SPI flash connected to the SoC to be accessed via
16 The flash chip itself should be represented by a subnode of the XSPI node.
27 - const: renesas,r9a09g047-xspi # RZ/G3E
31 - renesas,r9a09g056-xspi # RZ/V2N
32 - renesas,r9a09g057-xspi # RZ/V2H(P)
33 - const: renesas,r9a09g047-xspi
37 - description: xSPI registers
82 renesas,xspi-cs-addr-sys:
[all …]
/linux/Documentation/devicetree/bindings/spi/
H A Dcdns,xspi.yaml5 $id: http://devicetree.org/schemas/spi/cdns,xspi.yaml#
8 title: Cadence XSPI Controller
14 The XSPI controller allows SPI protocol communication in
21 - cdns,xspi-nor
22 - marvell,cn10-xspi-nor
55 - marvell,cn10-xspi-nor
78 xspi: spi@a0010000 {
81 compatible = "cdns,xspi-nor";
/linux/include/dt-bindings/memory/
H A Dtegra234-mc.h289 /* XSPI writes */
339 /* XSPI client */
341 /* XSPI writes */
343 /* XSPI client */
/linux/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/
H A Dmetrics.json355 "BriefDescription": "bytes of xspi read from ddr",
356 "MetricName": "imx94_ddr_read.xspi",
363 "BriefDescription": "bytes of xspi write to ddr",
364 "MetricName": "imx94_ddr_write.xspi",
/linux/Documentation/devicetree/bindings/soc/renesas/
H A Drenesas,r9a09g057-sys.yaml18 - Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU
/linux/include/memory/
H A Drenesas-rpc-if.h71 bool xspi; member
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g056.dtsi214 xspi: spi@11030000 { label
215 compatible = "renesas,r9a09g056-xspi", "renesas,r9a09g047-xspi";
H A Drzg3e-smarc-som.dtsi369 &xspi {
H A Dr9a09g057h44-rzv2h-evk.dts457 &xspi {
H A Dr9a09g057.dtsi318 xspi: spi@11030000 { label
319 compatible = "renesas,r9a09g057-xspi", "renesas,r9a09g047-xspi";
H A Dr9a09g047.dtsi287 xspi: spi@11030000 { label
288 compatible = "renesas,r9a09g047-xspi";
/linux/drivers/mtd/spi-nor/
H A Dsfdp.c24 #define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */
1132 * Since xSPI Page Program opcode is backward compatible with in spi_nor_parse_4bait()
1180 * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table in spi_nor_parse_profile1()
1254 * Page Program is "Required Command" in the xSPI Profile 1.0. Update in spi_nor_parse_sccr()