Searched +full:visconti +full:- +full:pwm (Results 1 – 6 of 6) sorted by relevance
| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | toshiba,pwm-visconti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pwm/toshiba,pwm-visconti.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Toshiba Visconti PWM Controller 10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> 13 - $ref: pwm.yaml# 18 - const: toshiba,visconti-pwm 23 '#pwm-cells': 27 - compatible [all …]
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| /linux/drivers/pwm/ |
| H A D | pwm-visconti.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Toshiba Visconti pulse-width-modulation controller driver 5 * Copyright (c) 2020 - 2021 TOSHIBA CORPORATION 6 * Copyright (c) 2020 - 2021 Toshiba Electronic Devices & Storage Corporation 11 * - The fixed input clock is running at 1 MHz and is divided by either 1, 13 * - When the settings of the PWM are modified, the new values are shadowed 17 * - Disabling the hardware completes the currently running period and keeps 26 #include <linux/pwm.h> 45 static int visconti_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, in visconti_pwm_apply() argument 51 if (!state->enabled) { in visconti_pwm_apply() [all …]
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | toshiba,visconti-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Toshiba Visconti TMPV770x pin mux/config controller 10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> 13 Toshiba's Visconti ARM SoC a pin mux/config controller. 18 - toshiba,tmpv7708-pinctrl 24 - $ref: pinctrl.yaml# 27 - compatible [all …]
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| /linux/drivers/clk/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 91 tristate "Raspberry Pi RP1-based clock support" 96 This multi-function device has 3 main PLLs and several clock 97 generators to drive the internal sub-peripherals. 106 multi-function device has one fixed-rate oscillator, clocked 137 be pre-programmed to support other configurations and features not yet 186 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 204 For example, the CDCE925 contains two PLLs with spread-spectrum [all …]
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| /linux/drivers/gpio/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 50 this symbol, but new drivers should use the generic gpio-regmap 60 non-sleeping contexts. They can make bitbanged serial protocols 81 numberspace-based functionalities of the sysfs interface. 137 Enables support for the idio-16 library functions. The idio-16 library 139 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16. 141 If built as a module its name will be gpio-idio-16. 147 tristate "GPIO driver for 74xx-ICs with MMIO access" 151 Say yes here to support GPIO functionality for 74xx-compatible ICs 166 If driver is built as a module it will be called gpio-altera. [all …]
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| /linux/ |
| H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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