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/linux/Documentation/devicetree/bindings/pwm/
H A Dtoshiba,pwm-visconti.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pwm/toshiba,pwm-visconti.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba Visconti PWM Controller
10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
13 - $ref: pwm.yaml#
18 - const: toshiba,visconti-pwm
23 '#pwm-cells':
27 - compatible
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/linux/drivers/pwm/
H A Dpwm-visconti.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Toshiba Visconti pulse-width-modulation controller driver
5 * Copyright (c) 2020 - 2021 TOSHIBA CORPORATION
6 * Copyright (c) 2020 - 2021 Toshiba Electronic Devices & Storage Corporation
11 * - The fixed input clock is running at 1 MHz and is divided by either 1,
13 * - When the settings of the PWM are modified, the new values are shadowed
17 * - Disabling the hardware completes the currently running period and keeps
26 #include <linux/pwm.h>
45 static int visconti_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, in visconti_pwm_apply() argument
51 if (!state->enabled) { in visconti_pwm_apply()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menuconfig PWM config
3 bool "Pulse-Width Modulation (PWM) Support"
5 Generic Pulse-Width Modulation (PWM) support.
7 In Pulse-Width Modulation, a variation of the width of pulses
14 This framework provides a generic interface to PWM devices
16 to register and unregister a PWM chip, an abstraction of a PWM
17 controller, that supports one or more PWM devices. Client
18 drivers can request PWM devices and use the generic framework
21 This generic framework replaces the legacy PWM framework which
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PWM) += core.o
3 obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o
4 obj-$(CONFIG_PWM_ADP5585) += pwm-adp5585.o
5 obj-$(CONFIG_PWM_APPLE) += pwm-apple.o
6 obj-$(CONFIG_PWM_ATMEL) += pwm-atmel.o
7 obj-$(CONFIG_PWM_ATMEL_HLCDC_PWM) += pwm-atmel-hlcdc.o
8 obj-$(CONFIG_PWM_ATMEL_TCB) += pwm-atmel-tcb.o
9 obj-$(CONFIG_PWM_AXI_PWMGEN) += pwm-axi-pwmgen.o
10 obj-$(CONFIG_PWM_BCM_IPROC) += pwm-bcm-iproc.o
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dtoshiba,visconti-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba Visconti TMPV770x pin mux/config controller
10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
13 Toshiba's Visconti ARM SoC a pin mux/config controller.
18 - toshiba,tmpv7708-pinctrl
24 - $ref: pinctrl.yaml#
27 - compatible
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/linux/arch/arm64/boot/dts/toshiba/
H A Dtmpv7708.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * (C) Copyright 2018 - 2020, Toshiba Corporation.
10 #include <dt-bindings/clock/toshiba,tmpv770x.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 /memreserve/ 0x81000000 0x00300000; /* cpu-release-addr */
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
23 #size-cells = <0>;
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/linux/drivers/clk/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_HAVE_CLK) += clk-devres.o clk-bulk.o clkdev.o
4 obj-$(CONFIG_COMMON_CLK) += clk.o
5 obj-$(CONFIG_CLK_KUNIT_TEST) += clk-test.o
6 clk-test-y := clk_test.o \
22 obj-$(CONFIG_COMMON_CLK) += clk-divider.o
23 obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
24 obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
25 obj-$(CONFIG_CLK_FIXED_RATE_KUNIT_TEST) += clk-fixed-rate-test.o
26 clk-fixed-rate-test-y := clk-fixed-rate_test.o kunit_clk_fixed_rate_test.dtbo.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
98 multi-function device has one fixed-rate oscillator, clocked
129 be pre-programmed to support other configurations and features not yet
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
196 For example, the CDCE925 contains two PLLs with spread-spectrum
206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
237 provides read-only PLLs, derived from the main crystal clock (which
296 clock. These multi-function devices have two (S2MPS14) or three
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/linux/drivers/pinctrl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
66 will be called pinctrl-apple-gpio.
69 bool "Axis ARTPEC-6 pin controller driver"
74 This is the driver for the Axis ARTPEC-6 pin controller. This driver
77 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
86 functionality. This driver supports the pinmux, push-pull and
117 tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support"
141 The Awinic AW9523/AW9523B is a multi-function I2C GPIO
142 expander with PWM functionality. This driver bundles a
168 called pinctrl-cy8c95x0.
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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