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/freebsd/sys/contrib/device-tree/Bindings/serial/
H A Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
38 rx-tx-swap: true
[all …]
H A Dserial.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
19 where N is the port number (non-negative decimal integer) as printed on the
28 cts-gpios:
34 dcd-gpios:
40 dsr-gpios:
46 dtr-gpios:
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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Ddwc3.txt3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
20 "samsung,exynos5250-dwusb3"
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H A Dsnps,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 be presented as a standalone DT node with an optional vendor-specific
18 - $ref: usb-drd.yaml#
19 - if:
25 - dr_mode
29 $ref: usb-xhci.yaml#
35 - const: snps,dwc3
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/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Dpower.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
5 * Copyright (C) 2015-2017 Intel Deutschland GmbH
13 * enum iwl_ltr_config_flags - mask
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/freebsd/crypto/openssl/test/
H A Dquic_ackm_test.c2 * Copyright 2022-2025 The OpenSSL Project Authors. All Rights Reserved.
32 ++info->lost; in on_lost()
38 ++info->acked; in on_acked()
44 ++info->discarded; in on_discarded()
60 if (h->ackm != NULL) { in helper_destroy()
61 ossl_ackm_free(h->ackm); in helper_destroy()
62 h->ackm = NULL; in helper_destroy()
65 if (h->ccdata != NULL) { in helper_destroy()
66 ossl_cc_dummy_method.free(h->ccdata); in helper_destroy()
67 h->ccdata = NULL; in helper_destroy()
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/freebsd/sys/gnu/dev/bwn/phy_n/
H A Dif_bwn_phy_n_regs.h22 Boston, MA 02110-1301, USA.
32 /* N-PHY registers. */
38 #define BWN_NPHY_TXERR BWN_PHY_N(0x007) /* TX error */
41 #define BWN_NPHY_4WI_ADDR BWN_PHY_N(0x00B) /* Four-wire bus address */
42 #define BWN_NPHY_4WI_DATAHI BWN_PHY_N(0x00C) /* Four-wire bus data high */
43 #define BWN_NPHY_4WI_DATALO BWN_PHY_N(0x00D) /* Four-wire bus data low */
44 #define BWN_NPHY_BIST_STAT0 BWN_PHY_N(0x00E) /* Built-in self test status 0 */
45 #define BWN_NPHY_BIST_STAT1 BWN_PHY_N(0x00F) /* Built-in self test status 1 */
81 #define BWN_NPHY_C1_INITGAIN_TRTX 0x2000 /* TR TX index */
93 #define BWN_NPHY_C1_CLIPWBTHRES BWN_PHY_N(0x027) /* Core 1 clip wideband threshold */
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/freebsd/sys/contrib/dev/iwlwifi/
H A Diwl-config.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
5 * Copyright (C) 2018-2024 Intel Corporation
15 #include "iwl-cs
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/freebsd/sys/dev/igc/
H A Digc_regs.h1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
11 #define IGC_CTRL 0x00000 /* Device Control - RW */
12 #define IGC_STATUS 0x00008 /* Device Status - RO */
13 #define IGC_EECD 0x00010 /* EEPROM/Flash Control - RW */
15 #define IGC_EERD 0x12014 /* EEprom mode read - RW */
16 #define IGC_EEWR 0x12018 /* EEprom mode write - RW */
17 #define IGC_CTRL_EXT 0x00018 /* Extended Device Control - RW */
18 #define IGC_MDIC 0x00020 /* MDI Control - RW */
19 #define IGC_MDICNFG 0x00E04 /* MDI Config - RW */
[all …]
H A Digc_defines.h1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
72 #define IGC_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
89 #define IGC_RXD_STAT_PIF 0x80 /* passed in-exact filter */
127 #define IGC_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
128 #define IGC_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
214 #define IGC_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
216 #define IGC_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
278 /* 1000/H is not supported, nor spec-compliant. */
324 #define IGC_TCTL_EN 0x00000002 /* enable Tx */
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/freebsd/crypto/openssl/doc/designs/quic-design/
H A Dquic-fc.md5 ---------------------------------
8 transmission of stream data could be prevented by connection-level flow control,
9 by stream-level flow control, or both. Flow control uses a credit-based model in
14 It is important to note that both connection and stream-level flow control
32 Connection-level flow control is controlled by the `MAX_DATA` frame;
33 stream-level flow control is controlled by the `MAX_STREAM_DATA` frame.
38 our connection-level credit, and a conformant QUIC implementation can choose to
43 Note that it follows from the above that the CRYPTO-frame stream is not subject
54 | |<-- credit| -->| |
55 | <-|- threshold -|----->| |
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/freebsd/sys/dev/e1000/
H A De1000_regs.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
38 #define E1000_CTRL 0x00000 /* Device Control - RW */
39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */
40 #define E1000_STATUS 0x00008 /* Device Status - RO */
41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
44 #define E1000_FLA 0x0001C /* Flash Access - RW */
45 #define E1000_MDIC 0x00020 /* MDI Control - RW */
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H A De1000_defines.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
172 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
173 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
261 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
263 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
340 #define E1000_STATUS_PCIX_MODE 0x00002000 /* PCI-X mode */
341 #define E1000_STATUS_PCIX_SPEED 0x0000C000 /* PCI-X bus speed */
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/freebsd/sys/net/
H A Dparavirt.h31 Support for virtio-like communication between host (H) and guest (G) NICs.
37 csb->csb_on enables the mode. If disabled, the device acts a regular one.
39 Notifications for tx and rx are exchanged without vm exits
59 TX: start from idle:
65 TX: active state:
72 TX: G runs out of buffers
74 and one with a threshold (using guest_txkick_at). They are mutually
79 THRESHOLD: G sets guest_txkick_at to the TDH value for which it
100 and one with a threshold (using host_xxkick_at). They are mutually
105 THRESHOLD: H sets host_rxkick_at to the RDT value for which it wants
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,wcd93xx-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd93xx-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 reset-gpios:
17 vdd-buck-supply:
20 vdd-rxtx-supply:
23 vdd-io-supply:
26 vdd-mic-bias-supply:
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H A Ddavinci-mcasp-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/davinci-mcasp-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jayesh Choudhary <j-choudhary@ti.com>
15 - ti,dm646x-mcasp-audio
16 - ti,da830-mcasp-audio
17 - ti,am33xx-mcasp-audio
18 - ti,dra7-mcasp-audio
19 - ti,omap4-mcasp-audio
[all …]
/freebsd/sys/dev/neta/
H A Dif_mvnetareg.h46 /* XXX: Currently multi-queue can be used on the Tx side only */
53 #if MVNETA_TX_QNUM_MAX & (MVNETA_TX_QNUM_MAX - 1) != 0
56 #if MVNETA_RX_QNUM_MAX & (MVNETA_RX_QNUM_MAX - 1) != 0
62 #define MVNETA_TX_QUEUE_ALL ((1<<MVNETA_TX_QNUM_MAX)-1)
63 #define MVNETA_RX_QUEUE_ALL ((1<<MVNETA_RX_QNUM_MAX)-1)
134 /* Rx DMA Wake on LAN Registers 0x3690 - 0x36b8 */
136 /* Tx DMA Miscellaneous Registers */
139 #define MVNETA_PXTFTT 0x2478 /* Port Tx FIFO Threshold */
140 #define MVNETA_TXBADFCS 0x3cc0 /*Tx Bad FCS Transmitted Pckts Counter*/
141 #define MVNETA_TXDROPPED 0x3cc4 /* Tx Dropped Packets Counter */
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_freebsd_inc.h12 #define AH_NEED_TX_DATA_SWAP 0 /* TX descriptor swap? */
13 #define AH_NEED_RX_DATA_SWAP 0 /* TX descriptor swap? */
59 #define OS_ATOMIC_DEC(a) (*a)--
84 * Green Tx, Based on different RSSI of Received Beacon thresholds,
85 * using different tx power by modified register tx power related values.
105 matched filter (single-sided) in usecs */
106 u_int32_t rp_threshold; /* Threshold for MF output to indicate
114 int32_t rp_rssimargin; /* rssi threshold margin. In Turbo Mode HW reports rssi 3dBm */
128 matched filter (single-sided) in usecs */
137 …int32_t rp_rssimargin; /* rssi threshold margin. In Turbo Mode HW reports rssi 3d…
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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_serdes_interface.h9 found at http://www.gnu.org/licenses/gpl-2.0.html
53 /* *INDENT-OFF* */
57 /* *INDENT-ON* */
108 * Loops back the TX serializer output into the CDR.
114 * Loops back the TX driver IO signal to the RX IO pins
129 /** Loops TX data (to PMA) to RX path (instead of PMA data) */
178 * Tx de-emphasis parameters
183 AL_SERDES_TX_DEEMP_C_MINUS, /*< c(-1) */
196 * Transmit Amplitude control signal. Used to define the full-scale
198 * 000 - Not Supported
[all …]
/freebsd/sys/dev/ichiic/
H A Dig4_reg.h40 * https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf
42 * This is a from-scratch driver under the BSD license using the Intel data
61 * Register width is 32-bits
87 #define IG4_REG_RX_TL 0x0038 /* RW Receive FIFO Threshold */
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/freebsd/share/man/man4/
H A Ddc.415 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
93 .Bl -tag -width ".Cm 10baseT/UTP"
101 Note: the built-in NWAY autonegotiation on the original PNIC 82c168
114 .Cm full-duplex
117 .Cm full-duplex
119 .Cm half-duplex
126 .Cm full-duplex
129 .Cm full-duplex
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/freebsd/sys/contrib/device-tree/Bindings/firmware/
H A Darm,scmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
26 - $ref: /schemas/firmware/nxp,imx95-scmi.yaml
34 - description: SCMI compliant firmware with mailbox transport
36 - const: arm,scmi
37 - description: SCMI compliant firmware with ARM SMC/HVC transport
39 - const: arm,scmi-smc
40 - description: SCMI compliant firmware with ARM SMC/HVC transport
[all …]
/freebsd/sys/dev/cas/
H A Dif_casreg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * from: FreeBSD: if_gemreg.h 174987 2007-12-30 01:32:03Z marius
84 * Bits 0-9 of CAS_STATUS auto-clear when read. CAS_CLEAR_ALIAS specifies
85 * which of bits 0-9 auto-clear when reading CAS_STATUS_ALIAS.
88 #define CAS_INTR_TX_ALL 0x00000002 /* TX frames trans. to FIFO. */
89 #define CAS_INTR_TX_DONE 0x00000004 /* Any TX frame transferred. */
90 #define CAS_INTR_TX_TAG_ERR 0x00000008 /* TX FIFO tag corrupted. */
100 #define CAS_INTR_TX_MAC_INT 0x00004000 /* TX MAC interrupt */
106 #define CAS_STATUS_TX_COMP3_MASK 0xfff80000 /* TX completion 3 */
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmarvell-armada-370-neta.txt4 - compatible: could be one of the following:
5 "marvell,armada-370-neta"
6 "marvell,armada-xp-neta"
7 "marvell,armada-3700-neta"
8 "marvell,armada-ac5-neta"
9 - reg: address and length of the register set for the device.
10 - interrupts: interrupt for the device
11 - phy: See ethernet.txt file in the same directory.
12 - phy-mode: See ethernet.txt file in the same directory
13 - clocks: List of clocks for this device. At least one clock is
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416reg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
27 #define AR_MIRT 0x0020 /* interrupt rate threshold */
28 #define AR_TIMT 0x0028 /* Tx Interrupt mitigation threshold */
29 #define AR_RIMT 0x002C /* Rx Interrupt mitigation threshold */
34 #define AR_WA 0x4004 /* PCIE work-arounds */
120 /* RTC_DERIVED_* - only for AR9130 */
127 #define AR5416_USEC_TX_LAT 0x007FC000 /* tx latency to start of SIGNAL (usec) */
[all …]

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