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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,qe-tsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-tsa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC QE Time-slot assigner (TSA) controller
10 - Herve Codina <herve.codina@bootlin.com>
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
14 Its purpose is to route some TDM time-slots to other internal serial
20 - enum:
21 - fsl,mpc8321-tsa
[all …]
H A Dfsl,cpm1-tsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
10 - Herve Codina <herve.codina@bootlin.com>
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
14 Its purpose is to route some TDM time-slots to other internal serial
20 - enum:
21 - fsl,mpc885-tsa
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_dpll.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 * enum ice_dpll_pin_sw - enumerate ice software pin indices:
15 * @ICE_DPLL_PIN_SW_NUM: number of SW pins in pair
23 /** ice_dpll_pin - store info about pins
27 * @num_parents: hols number of parent pins
28 * @parent_idx: hold indexes of parent pins
35 * @ref_sync: store id of reference sync pin
58 /** ice_dpll - store info required for DPLL control
69 * @dpll_state: current dpll sync state
70 * @prev_dpll_state: last dpll sync state
[all …]
H A Dice_dpll.c1 // SPDX-License-Identifier: GPL-2.0
53 * enum ice_dpll_pin_type - enumerate ice pin types:
58 * @ICE_DPLL_PIN_TYPE_SOFTWARE: software controlled SMA/U.FL pins
71 [ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input",
83 * ice_dpll_is_sw_pin - check if given pin shall be controlled by SW
88 * Check if the pin shall be controlled by SW - instead of providing raw access
89 * for pin control. For E810 NIC with dpll there is additional MUX-related logic
90 * between SMA/U.FL pins/connectors and dpll device, best to give user access
92 * functionality rather then separated pins.
95 * * true - pin controlled by SW
[all …]
/linux/sound/soc/
H A Dsoc-jack.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-jack.c -- ALSA SoC jack handling
20 * snd_soc_jack_report - Report the current status for a jack
27 * DAPM pins will be enabled or disabled as appropriate and DAPM
37 unsigned int sync = 0; in snd_soc_jack_report() local
39 if (!jack || !jack->jack) in snd_soc_jack_report()
43 dapm = &jack->card->dapm; in snd_soc_jack_report()
45 mutex_lock(&jack->mutex); in snd_soc_jack_report()
47 jack->status &= ~mask; in snd_soc_jack_report()
48 jack->status |= status & mask; in snd_soc_jack_report()
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap4-duovero-parlor.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
7 #include "omap4-duovero.dtsi"
9 #include <dt-bindings/input/input.h>
13 compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
20 compatible = "gpio-leds";
24 linux,default-trigger = "heartbeat";
29 compatible = "gpio-keys";
30 #address-cells = <1>;
31 #size-cells = <0>;
[all …]
H A Domap3-n950-n9.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
13 cpu0-supply = <&vcc>;
23 compatible = "regulator-fixed";
24 regulator-name = "VEMMC";
25 regulator-min-microvolt = <2900000>;
26 regulator-max-microvolt = <2900000>;
28 startup-delay-us = <150>;
29 enable-active-high;
33 compatible = "regulator-fixed";
[all …]
H A Dam335x-sbc-t335.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * am335x-sbc-t335.dts - Device Tree file for Compulab SBC-T335
5 * Copyright (C) 2014 - 2015 CompuLab Ltd. - https://www.compulab.co.il/
8 #include "am335x-cm-t335.dts"
11 model = "CompuLab CM-T335 on SB-T335";
12 compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx";
18 pinctrl-names = "default", "sleep";
19 pinctrl-0 = <&lcd_pins_default>;
20 pinctrl-1 = <&lcd_pins_sleep>;
22 panel-info {
[all …]
H A Domap3-gta04a5one.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
13 gpmc_pins: gpmc-pins {
14 pinctrl-single,pins = <
45 pinctrl-names = "default";
46 pinctrl-0 = <&gpmc_pins>;
48 /delete-node/ nand@0,0;
52 #address-cells = <1>;
53 #size-cells = <1>;
[all …]
H A Dam335x-guardian.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "bosch,am335x-guardian", "ti,am33xx";
17 stdout-path = &uart0;
18 tick-timer = &timer2;
23 cpu0-supply = <&dcdc2_reg>;
32 guardian_buttons: gpio-keys {
[all …]
H A Dam335x-pdu001.dts6 * Copyright (C) 2018 EETS GmbH - https://www.eets.ch/
8 * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
10 * SPDX-License-Identifier: GPL-2.0+
13 /dts-v1/;
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/leds/leds-pca9532.h>
24 stdout-path = &uart3;
29 cpu0-supply = <&vdd1_reg>;
39 compatible = "regulator-fixed";
40 regulator-name = "vbat";
[all …]
H A Dam335x-nano.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Newflow Ltd - https://www.newflow.co.uk/
5 /dts-v1/;
15 cpu0-supply = <&dcdc2_reg>;
25 compatible = "gpio-leds";
30 default-state = "off";
36 pinctrl-names = "default";
37 pinctrl-0 = <&misc_pins>;
39 misc_pins: misc-pins {
40 pinctrl-single,pins = <
[all …]
H A Dam335x-pepper.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Gumstix, Inc. - https://www.gumstix.com/
5 /dts-v1/;
7 #include <dt-bindings/input/input.h>
12 compatible = "gumstix,am335x-pepper", "ti,am33xx";
16 cpu0-supply = <&dcdc3_reg>;
26 compatible = "gpio-keys";
29 leds: user-leds-pins {
30 compatible = "gpio-leds";
38 compatible = "ti,da830-evm-audio";
[all …]
H A Domap3-n900.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
7 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/media/video-interfaces.h>
15 * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
17 * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
18 * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
34 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
[all …]
/linux/sound/soc/fsl/
H A Dfsl_sai.c1 // SPDX-License-Identifier: GPL-2.0+
5 // Copyright 2012-2015 Freescale Semiconductor, Inc.
22 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
26 #include "imx-pcm.h"
44 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream
57 /* current dir in async mode while opposite dir in sync mode */ in fsl_sai_dir_is_synced()
58 return !sai->synchronou in fsl_sai_dir_is_synced()
572 u32 pins, bclk; fsl_sai_hw_params() local
[all...]
/linux/Documentation/devicetree/bindings/mux/
H A Dgpio-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/gpio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
13 Define what GPIO pins are used to control a multiplexer. Or several
14 multiplexers, if the same pins control more than one multiplexer.
17 multiplexer GPIO pins, where the first pin is the least significant
22 const: gpio-mux
[all …]
/linux/sound/soc/stm/
H A Dstm32_sai.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
35 * - STM32H7: rely on default settings
36 * - STM32MP1: retrieve settings from registers
47 * - do not use SAI parent clock source selection
48 * - do not use DMA burst mode
55 { .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 },
56 { .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 },
57 { .compatible = "st,stm32mp25-sai", .data = (void *)&stm32_sai_conf_mp25 },
65 clk_disable_unprepare(sai->pclk); in stm32_sai_pclk_disable()
[all …]
/linux/Documentation/devicetree/bindings/display/tilcdc/
H A Dpanel.txt1 Device-Tree bindings for tilcdc DRM generic panel output driver
4 - compatible: value should be "ti,tilcdc,panel".
5 - panel-info: configuration info to configure LCDC correctly for the panel
6 - ac-bias: AC Bias Pin Frequency
7 - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
8 - dma-burst-sz: DMA burst size
9 - bpp: Bits per pixel
10 - fdd: FIFO DMA Request Delay
11 - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling
12 - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore
[all …]
/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_common.c25 { .compatible = "fsl,mpc5200-xlb", },
26 { .compatible = "mpc5200-xlb", },
30 { .compatible = "fsl,mpc5200-immr", },
31 { .compatible = "fsl,mpc5200b-immr", },
32 { .compatible = "simple-bus", },
71 out_be32(&xlb->master_pri_enable, 0xff); in mpc5200_setup_xlb_arbiter()
72 out_be32(&xlb->master_priority, 0x11111111); in mpc5200_setup_xlb_arbiter()
77 * transaction and re-enable it afterwards ...) in mpc5200_setup_xlb_arbiter()
81 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); in mpc5200_setup_xlb_arbiter()
110 { .compatible = "fsl,mpc5200-gpt", },
[all …]
/linux/drivers/dpll/
H A Ddpll_core.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 * struct dpll_device - stores DPLL device internal data
24 * @pin_refs: stores pins registered within a dpll
40 * struct dpll_pin - structure for a dpll pin
46 * @parent_refs: hold references to parent pins pin was registered with
47 * @ref_sync_pins: hold references to pins for Reference SYNC feature
66 * struct dpll_pin_ref - structure for referencing either dpll or pins
/linux/include/media/i2c/
H A Dtda1997x.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * tda1997x - NXP HDMI receiver
22 /* clock delays (0=-8, 1=-7 ... 15=+7 pixels) */
27 /* sync selections (controls how sync pins are derived) */
39 bool audio_auto_mute; /* enable hardware audio auto-mute */
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8186-corsola.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
7 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/regulator/mediatek,mt6397-regulator.h>
26 stdout-path = "serial0:115200n8";
35 backlight_lcd0: backlight-lcd0 {
36 compatible = "pwm-backlight";
[all …]
/linux/drivers/media/pci/zoran/
H A Dzr36057.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * zr36057.h - zr36057 register offsets
66 #define ZR36057_SPGPPCR 0x028 /* System, PCI, and General Purpose Pins Control Register */
69 #define ZR36057_GPPGCR1 0x02c /* General Purpose Pins and GuestBus Control Register (1) */
118 #define ZR36057_VSP 0x108 /* Vertical Sync Parameters */
122 #define ZR36057_HSP 0x10c /* Horizontal Sync Parameters */
/linux/drivers/mfd/
H A Ducb1x00-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mfd/ucb1x00-core.c
11 * to be used on other non-MCP-enabled hardware platforms.
35 * ucb1x00_io_set_dir - set IO direction
37 * @in: bitfield of IO pins to be set as inputs
38 * @out: bitfield of IO pins to be set as outputs
40 * Set the IO direction of the ten general purpose IO pins on
54 spin_lock_irqsave(&ucb->io_lock, flags); in ucb1x00_io_set_dir()
55 ucb->io_dir |= out; in ucb1x00_io_set_dir()
56 ucb->io_dir &= ~in; in ucb1x00_io_set_dir()
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max8952.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: regulator.yaml#
19 max8952,default-mode:
25 max8952,dvs-mode-microvolt:
35 max8952,en-gpio:
40 max8952,ramp-speed:
46 - 0: 32mV/us
[all …]

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