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/linux/Documentation/devicetree/bindings/regulator/
H A Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
16 There're still four pins for camera control, two inputs (strobe and vsync),
17 the others for outputs (fsin1 and fsin2). Strobe input to start the current
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
[all …]
/linux/drivers/media/platform/ti/omap3isp/
H A Domap3isp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * TI OMAP3 ISP - Bus Configuration
25 * struct isp_parallel_cfg - Parallel interface configuration
27 * 0 - CAMEXT[13:0] -> CAM[13:0]
28 * 2 - CAMEXT[13:2] -> CAM[11:0]
29 * 4 - CAMEXT[13:4] -> CAM[9:0]
30 * 6 - CAMEXT[13:6] -> CAM[7:0]
31 * @clk_pol: Pixel clock polarity
32 * 0 - Sample on rising edge, 1 - Sample on falling edge
33 * @hs_pol: Horizontal synchronization polarity
[all …]
/linux/include/media/
H A Dv4l2-mediabus.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <linux/v4l2-mediabus.h>
46 * Signal polarity flags
60 /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */
62 /* FIELD = 1/0 - Field1 (odd)/Field2 (even) */
64 /* Active state of Sync-on-gree
117 unsigned char strobe:1; global() member
[all...]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dintel,ixp4xx-expansion-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
18 intel,ixp4xx-eb-t1:
23 intel,ixp4xx-eb-t2:
28 intel,ixp4xx-eb-t3:
29 description: Strobe timing, extend strobe phase with n cycles.
[all …]
/linux/drivers/parport/
H A Dieee1284_ops.c1 // SPDX-License-Identifier: GPL-2.0
2 /* IEEE-1284 operations for parport.
5 * they are used by the low-level drivers. If they have a special way
7 * the function pointers in port->ops); if not, they can just use these
13 * Fixed AUTOFD polarity in ecp_forward_to_reverse(). Fred Barnes, 1999
31 * One-way data transfer functions. *
43 struct pardevice *dev = port->physport->cad; in parport_ieee1284_write_compat()
47 if (port->irq != PARPORT_IRQ_NONE) { in parport_ieee1284_write_compat()
52 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_ieee1284_write_compat()
56 unsigned long expire = jiffies + dev->timeout; in parport_ieee1284_write_compat()
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-counter3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
16 MTCLKA-MTCLKB:
20 MTCLKC-MTCLKD:
26 Contact: linux-iio@vger.kernel.org
33 Contact: linux-iio@vger.kernel.org
39 Contact: linux-iio@vger.kernel.org
45 Contact: linux-iio@vger.kernel.org
52 Contact: linux-iio@vger.kernel.org
59 Contact: linux-iio@vger.kernel.org
[all …]
/linux/drivers/auxdisplay/
H A Dpanel.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2000-2008, Willy Tarreau <w@1wt.eu>
5 * Copyright (C) 2016-2017 Glider bvba
10 * The LCD module may either be an HD44780-like 8-bit parallel LCD, or a 1-bit
15 * data output pins or to the ground. The combinations have to be hard-coded
22 * - the initialization/deinitialization process is very dirty and should
26 * - document 24 keys keyboard (3 rows of 8 cols, 32 diodes + 2 inputs)
27 * - make the LCD a part of a virtual screen of Vx*Vy
28 * - make the inputs list smp-safe
29 * - change the keyboard to a double mapping : signals -> key_id -> values
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 # see Documentation/kbuild/kconfig-language.rst.
25 This is the base system for character-based LCD displays.
67 Say Y here if you have an HD44780 or KS-0074 LCD connected to your
68 parallel port. This driver also features 4 and 6-key keypads. The LCD
88 int "Default panel profile (0-5, 0=custom)"
99 2 = 2x16 serial LCD (KS-0074), new keypad
119 2 : new 6 keys keypad, as used on the server at www.ant-computing.com
140 3 : 2x16 serial LCD (KS-0074 based)
150 int "Number of lines on the LCD (1-2)"
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-rock-pi-4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
19 stdout-path = "serial2:1500000n8";
22 clkin_gmac: external-gmac-clock {
23 compatible = "fixed-clock";
24 clock-frequency = <125000000>;
25 clock-output-names = "clkin_gmac";
26 #clock-cells = <0>;
[all …]
H A Drk3399-sapphire.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "dt-bindings/pwm/pwm.h"
7 #include "dt-bindings/input/input.h"
11 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
27 #clock-cells = <0>;
[all …]
H A Drk3399-leez-p710.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pwm/pwm.h>
24 stdout-path = "serial2:1500000n8";
27 clkin_gmac: external-gmac-clock {
28 compatible = "fixed-clock";
29 clock-frequency = <125000000>;
30 clock-output-names = "clkin_gmac";
[all …]
H A Drk3399-rock-4c-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include "rk3399-t.dtsi"
14 compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
23 stdout-path = "serial2:1500000n8";
26 clkin_gmac: external-gmac-clock {
27 compatible = "fixed-clock";
28 clock-frequency = <125000000>;
29 clock-output-names = "clkin_gmac";
[all …]
H A Drk3399-hugsun-x99.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /dts-v1/;
3 #include <dt-bindings/pwm/pwm.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
[all …]
H A Drk3399-nanopi4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * RK3399-based FriendlyElec boards device tree source
14 /dts-v1/;
15 #include <dt-bindings/input/linux-event-codes.h>
27 stdout-path = "serial2:1500000n8";
30 clkin_gmac: external-gmac-clock {
31 compatible = "fixed-clock";
32 clock-frequency = <125000000>;
33 clock-output-names = "clkin_gmac";
34 #clock-cells = <0>;
[all …]
H A Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: regulator-ppvar-sys {
[all …]
H A Drk3399-firefly.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include <dt-bindings/usb/pd.h>
14 model = "Firefly-RK3399 Board";
15 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
25 stdout-path = "serial2:1500000n8";
29 compatible = "pwm-backlight";
[all …]
H A Drk3399-rock960.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/irq.h>
18 sdio_pwrseq: sdio-pwrseq {
19 compatible = "mmc-pwrseq-simple";
21 clock-names = "ext_clock";
22 pinctrl-names = "default";
23 pinctrl-0 = <&wifi_enable_h>;
24 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
27 vcc12v_dcin: regulator-vcc12v-dcin {
28 compatible = "regulator-fixed";
[all …]
H A Drk3399-orangepi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "dt-bindings/pwm/pwm.h"
9 #include "dt-bindings/input/input.h"
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "dt-bindings/usb/pd.h"
16 compatible = "xunlong,rk3399-orangepi", "rockchip,rk3399";
26 stdout-path = "serial2:1500000n8";
29 clkin_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
[all …]
/linux/drivers/regulator/
H A Drtmv20-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
75 gpiod_set_value(priv->enable_gpio, 1); in rtmv20_lsw_enable()
80 /* HW re-enable, disable cache only and sync regcache here */ in rtmv20_lsw_enable()
81 regcache_cache_only(priv->regmap, false); in rtmv20_lsw_enable()
82 ret = regcache_sync(priv->regmap); in rtmv20_lsw_enable()
99 regcache_cache_only(priv->regmap, true); in rtmv20_lsw_disable()
100 regcache_mark_dirty(priv->regmap); in rtmv20_lsw_disable()
102 gpiod_set_value(priv->enable_gpio, 0); in rtmv20_lsw_disable()
113 return -EINVAL; in rtmv20_lsw_set_current_limit()
118 sel = (max_uA - RTMV20_LSW_MINUA) / RTMV20_LSW_STEPUA; in rtmv20_lsw_set_current_limit()
[all …]
/linux/include/uapi/linux/
H A Dcomedi.h1 /* SPDX-License-Identifier: LGPL-2.0+ WITH Linux-syscall-note */
6 * COMEDI - Linux Control and Measurement Device Interface
7 * Copyright (C) 1998-2001 David A. Schleef <ds@schleef.org>
32 * NOTE: 'comedi_config --init-data' is deprecated
40 /* length of nth chunk of firmware data -*/
78 /* counters -- these are arbitrary values */
120 /* try to use a real-time interrupt while performing command */
123 /* wake up on end-of-scan events */
166 #define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */
179 #define SDF_PWM_HBRIDGE 0x0100 /* PWM is signed (H-bridge) */
[all …]
/linux/drivers/comedi/drivers/
H A Daddi_apci_1500.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
6 * ADDI-DATA GmbH
8 * D-77833 Ottersweier
9 * Tel: +19(0)7223/9493-0
10 * Fax: +49(0)7223/9493-92
11 * http://www.addi-data.com
12 * info@addi-data.com
23 * PCI Bar 0 Register map (devpriv->amcc)
28 * PCI Bar 1 Register map (dev->iobase)
[all …]
/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * FILE SA-1100.h
9 * System StrongARM SA-1100
12 * SA-1100 microprocessor (Advanced RISC Machine (ARM)
14 * StrongARM SA-1100 data sheet version 2.2.
21 #error You must include hardware.h not SA-1100.h
91 * Controller (UDC) Control/Status register end-point 0
94 * Controller (UDC) Control/Status register end-point 1
97 * Controller (UDC) Control/Status register end-point 2
100 * Controller (UDC) Data register end-point 0
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_v13_0_0.h340 I2C_SPEED_HIGH_1M, //1 Mbits/s (in high speed mode)
503 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
506 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
1005 …PLANE_COUNT]; // Celsius Temperature hysteresis for switching between low/high temperature values …
1006 …_PLANE_COUNT]; // Celsius Temperature threshold for switching between low/high temperature values …
1007 …uint16_t Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1008 …uint16_t Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1009 …uint16_t Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1010 …uint16_t Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1011 uint16_t Vmin_Aging_Offset[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Worst-case aging margin
[all …]
H A Dsmu13_driver_if_v13_0_7.h341 I2C_SPEED_HIGH_1M, //1 Mbits/s (in high speed mode)
504 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
507 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
1014 …PLANE_COUNT]; // Celsius Temperature hysteresis for switching between low/high temperature values …
1015 …_PLANE_COUNT]; // Celsius Temperature threshold for switching between low/high temperature values …
1016 …uint16_t Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1017 …uint16_t Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1018 …uint16_t Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1019 …uint16_t Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1020 uint16_t Vmin_Aging_Offset[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Worst-case aging margin
[all …]
H A Dsmu14_driver_if_v14_0.h341 I2C_SPEED_HIGH_1M, //1 Mbits/s (in high speed mode)
517 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
520 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
1104 …PLANE_COUNT]; // Celsius Temperature hysteresis for switching between low/high temperature values …
1105 …_PLANE_COUNT]; // Celsius Temperature threshold for switching between low/high temperature values …
1106 …uint16_t Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1107 …uint16_t Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1108 …uint16_t Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1109 …uint16_t Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1110 uint16_t Vmin_Aging_Offset[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Worst-case aging margin
[all …]

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