1*df0e68c1SIan Abbott /* SPDX-License-Identifier: LGPL-2.0+ WITH Linux-syscall-note */ 2*df0e68c1SIan Abbott /* 3*df0e68c1SIan Abbott * comedi.h 4*df0e68c1SIan Abbott * header file for COMEDI user API 5*df0e68c1SIan Abbott * 6*df0e68c1SIan Abbott * COMEDI - Linux Control and Measurement Device Interface 7*df0e68c1SIan Abbott * Copyright (C) 1998-2001 David A. Schleef <ds@schleef.org> 8*df0e68c1SIan Abbott */ 9*df0e68c1SIan Abbott 10*df0e68c1SIan Abbott #ifndef _COMEDI_H 11*df0e68c1SIan Abbott #define _COMEDI_H 12*df0e68c1SIan Abbott 13*df0e68c1SIan Abbott #define COMEDI_MAJORVERSION 0 14*df0e68c1SIan Abbott #define COMEDI_MINORVERSION 7 15*df0e68c1SIan Abbott #define COMEDI_MICROVERSION 76 16*df0e68c1SIan Abbott #define VERSION "0.7.76" 17*df0e68c1SIan Abbott 18*df0e68c1SIan Abbott /* comedi's major device number */ 19*df0e68c1SIan Abbott #define COMEDI_MAJOR 98 20*df0e68c1SIan Abbott 21*df0e68c1SIan Abbott /* 22*df0e68c1SIan Abbott * maximum number of minor devices. This can be increased, although 23*df0e68c1SIan Abbott * kernel structures are currently statically allocated, thus you 24*df0e68c1SIan Abbott * don't want this to be much more than you actually use. 25*df0e68c1SIan Abbott */ 26*df0e68c1SIan Abbott #define COMEDI_NDEVICES 16 27*df0e68c1SIan Abbott 28*df0e68c1SIan Abbott /* number of config options in the config structure */ 29*df0e68c1SIan Abbott #define COMEDI_NDEVCONFOPTS 32 30*df0e68c1SIan Abbott 31*df0e68c1SIan Abbott /* 32*df0e68c1SIan Abbott * NOTE: 'comedi_config --init-data' is deprecated 33*df0e68c1SIan Abbott * 34*df0e68c1SIan Abbott * The following indexes in the config options were used by 35*df0e68c1SIan Abbott * comedi_config to pass firmware blobs from user space to the 36*df0e68c1SIan Abbott * comedi drivers. The request_firmware() hotplug interface is 37*df0e68c1SIan Abbott * now used by all comedi drivers instead. 38*df0e68c1SIan Abbott */ 39*df0e68c1SIan Abbott 40*df0e68c1SIan Abbott /* length of nth chunk of firmware data -*/ 41*df0e68c1SIan Abbott #define COMEDI_DEVCONF_AUX_DATA3_LENGTH 25 42*df0e68c1SIan Abbott #define COMEDI_DEVCONF_AUX_DATA2_LENGTH 26 43*df0e68c1SIan Abbott #define COMEDI_DEVCONF_AUX_DATA1_LENGTH 27 44*df0e68c1SIan Abbott #define COMEDI_DEVCONF_AUX_DATA0_LENGTH 28 45*df0e68c1SIan Abbott /* most significant 32 bits of pointer address (if needed) */ 46*df0e68c1SIan Abbott #define COMEDI_DEVCONF_AUX_DATA_HI 29 47*df0e68c1SIan Abbott /* least significant 32 bits of pointer address */ 48*df0e68c1SIan Abbott #define COMEDI_DEVCONF_AUX_DATA_LO 30 49*df0e68c1SIan Abbott #define COMEDI_DEVCONF_AUX_DATA_LENGTH 31 /* total data length */ 50*df0e68c1SIan Abbott 51*df0e68c1SIan Abbott /* max length of device and driver names */ 52*df0e68c1SIan Abbott #define COMEDI_NAMELEN 20 53*df0e68c1SIan Abbott 54*df0e68c1SIan Abbott /* packs and unpacks a channel/range number */ 55*df0e68c1SIan Abbott 56*df0e68c1SIan Abbott #define CR_PACK(chan, rng, aref) \ 57*df0e68c1SIan Abbott ((((aref) & 0x3) << 24) | (((rng) & 0xff) << 16) | (chan)) 58*df0e68c1SIan Abbott #define CR_PACK_FLAGS(chan, range, aref, flags) \ 59*df0e68c1SIan Abbott (CR_PACK(chan, range, aref) | ((flags) & CR_FLAGS_MASK)) 60*df0e68c1SIan Abbott 61*df0e68c1SIan Abbott #define CR_CHAN(a) ((a) & 0xffff) 62*df0e68c1SIan Abbott #define CR_RANGE(a) (((a) >> 16) & 0xff) 63*df0e68c1SIan Abbott #define CR_AREF(a) (((a) >> 24) & 0x03) 64*df0e68c1SIan Abbott 65*df0e68c1SIan Abbott #define CR_FLAGS_MASK 0xfc000000 66*df0e68c1SIan Abbott #define CR_ALT_FILTER 0x04000000 67*df0e68c1SIan Abbott #define CR_DITHER CR_ALT_FILTER 68*df0e68c1SIan Abbott #define CR_DEGLITCH CR_ALT_FILTER 69*df0e68c1SIan Abbott #define CR_ALT_SOURCE 0x08000000 70*df0e68c1SIan Abbott #define CR_EDGE 0x40000000 71*df0e68c1SIan Abbott #define CR_INVERT 0x80000000 72*df0e68c1SIan Abbott 73*df0e68c1SIan Abbott #define AREF_GROUND 0x00 /* analog ref = analog ground */ 74*df0e68c1SIan Abbott #define AREF_COMMON 0x01 /* analog ref = analog common */ 75*df0e68c1SIan Abbott #define AREF_DIFF 0x02 /* analog ref = differential */ 76*df0e68c1SIan Abbott #define AREF_OTHER 0x03 /* analog ref = other (undefined) */ 77*df0e68c1SIan Abbott 78*df0e68c1SIan Abbott /* counters -- these are arbitrary values */ 79*df0e68c1SIan Abbott #define GPCT_RESET 0x0001 80*df0e68c1SIan Abbott #define GPCT_SET_SOURCE 0x0002 81*df0e68c1SIan Abbott #define GPCT_SET_GATE 0x0004 82*df0e68c1SIan Abbott #define GPCT_SET_DIRECTION 0x0008 83*df0e68c1SIan Abbott #define GPCT_SET_OPERATION 0x0010 84*df0e68c1SIan Abbott #define GPCT_ARM 0x0020 85*df0e68c1SIan Abbott #define GPCT_DISARM 0x0040 86*df0e68c1SIan Abbott #define GPCT_GET_INT_CLK_FRQ 0x0080 87*df0e68c1SIan Abbott 88*df0e68c1SIan Abbott #define GPCT_INT_CLOCK 0x0001 89*df0e68c1SIan Abbott #define GPCT_EXT_PIN 0x0002 90*df0e68c1SIan Abbott #define GPCT_NO_GATE 0x0004 91*df0e68c1SIan Abbott #define GPCT_UP 0x0008 92*df0e68c1SIan Abbott #define GPCT_DOWN 0x0010 93*df0e68c1SIan Abbott #define GPCT_HWUD 0x0020 94*df0e68c1SIan Abbott #define GPCT_SIMPLE_EVENT 0x0040 95*df0e68c1SIan Abbott #define GPCT_SINGLE_PERIOD 0x0080 96*df0e68c1SIan Abbott #define GPCT_SINGLE_PW 0x0100 97*df0e68c1SIan Abbott #define GPCT_CONT_PULSE_OUT 0x0200 98*df0e68c1SIan Abbott #define GPCT_SINGLE_PULSE_OUT 0x0400 99*df0e68c1SIan Abbott 100*df0e68c1SIan Abbott /* instructions */ 101*df0e68c1SIan Abbott 102*df0e68c1SIan Abbott #define INSN_MASK_WRITE 0x8000000 103*df0e68c1SIan Abbott #define INSN_MASK_READ 0x4000000 104*df0e68c1SIan Abbott #define INSN_MASK_SPECIAL 0x2000000 105*df0e68c1SIan Abbott 106*df0e68c1SIan Abbott #define INSN_READ (0 | INSN_MASK_READ) 107*df0e68c1SIan Abbott #define INSN_WRITE (1 | INSN_MASK_WRITE) 108*df0e68c1SIan Abbott #define INSN_BITS (2 | INSN_MASK_READ | INSN_MASK_WRITE) 109*df0e68c1SIan Abbott #define INSN_CONFIG (3 | INSN_MASK_READ | INSN_MASK_WRITE) 110*df0e68c1SIan Abbott #define INSN_DEVICE_CONFIG (INSN_CONFIG | INSN_MASK_SPECIAL) 111*df0e68c1SIan Abbott #define INSN_GTOD (4 | INSN_MASK_READ | INSN_MASK_SPECIAL) 112*df0e68c1SIan Abbott #define INSN_WAIT (5 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) 113*df0e68c1SIan Abbott #define INSN_INTTRIG (6 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) 114*df0e68c1SIan Abbott 115*df0e68c1SIan Abbott /* command flags */ 116*df0e68c1SIan Abbott /* These flags are used in comedi_cmd structures */ 117*df0e68c1SIan Abbott 118*df0e68c1SIan Abbott #define CMDF_BOGUS 0x00000001 /* do the motions */ 119*df0e68c1SIan Abbott 120*df0e68c1SIan Abbott /* try to use a real-time interrupt while performing command */ 121*df0e68c1SIan Abbott #define CMDF_PRIORITY 0x00000008 122*df0e68c1SIan Abbott 123*df0e68c1SIan Abbott /* wake up on end-of-scan events */ 124*df0e68c1SIan Abbott #define CMDF_WAKE_EOS 0x00000020 125*df0e68c1SIan Abbott 126*df0e68c1SIan Abbott #define CMDF_WRITE 0x00000040 127*df0e68c1SIan Abbott 128*df0e68c1SIan Abbott #define CMDF_RAWDATA 0x00000080 129*df0e68c1SIan Abbott 130*df0e68c1SIan Abbott /* timer rounding definitions */ 131*df0e68c1SIan Abbott #define CMDF_ROUND_MASK 0x00030000 132*df0e68c1SIan Abbott #define CMDF_ROUND_NEAREST 0x00000000 133*df0e68c1SIan Abbott #define CMDF_ROUND_DOWN 0x00010000 134*df0e68c1SIan Abbott #define CMDF_ROUND_UP 0x00020000 135*df0e68c1SIan Abbott #define CMDF_ROUND_UP_NEXT 0x00030000 136*df0e68c1SIan Abbott 137*df0e68c1SIan Abbott #define COMEDI_EV_START 0x00040000 138*df0e68c1SIan Abbott #define COMEDI_EV_SCAN_BEGIN 0x00080000 139*df0e68c1SIan Abbott #define COMEDI_EV_CONVERT 0x00100000 140*df0e68c1SIan Abbott #define COMEDI_EV_SCAN_END 0x00200000 141*df0e68c1SIan Abbott #define COMEDI_EV_STOP 0x00400000 142*df0e68c1SIan Abbott 143*df0e68c1SIan Abbott /* compatibility definitions */ 144*df0e68c1SIan Abbott #define TRIG_BOGUS CMDF_BOGUS 145*df0e68c1SIan Abbott #define TRIG_RT CMDF_PRIORITY 146*df0e68c1SIan Abbott #define TRIG_WAKE_EOS CMDF_WAKE_EOS 147*df0e68c1SIan Abbott #define TRIG_WRITE CMDF_WRITE 148*df0e68c1SIan Abbott #define TRIG_ROUND_MASK CMDF_ROUND_MASK 149*df0e68c1SIan Abbott #define TRIG_ROUND_NEAREST CMDF_ROUND_NEAREST 150*df0e68c1SIan Abbott #define TRIG_ROUND_DOWN CMDF_ROUND_DOWN 151*df0e68c1SIan Abbott #define TRIG_ROUND_UP CMDF_ROUND_UP 152*df0e68c1SIan Abbott #define TRIG_ROUND_UP_NEXT CMDF_ROUND_UP_NEXT 153*df0e68c1SIan Abbott 154*df0e68c1SIan Abbott /* trigger sources */ 155*df0e68c1SIan Abbott 156*df0e68c1SIan Abbott #define TRIG_ANY 0xffffffff 157*df0e68c1SIan Abbott #define TRIG_INVALID 0x00000000 158*df0e68c1SIan Abbott 159*df0e68c1SIan Abbott #define TRIG_NONE 0x00000001 /* never trigger */ 160*df0e68c1SIan Abbott #define TRIG_NOW 0x00000002 /* trigger now + N ns */ 161*df0e68c1SIan Abbott #define TRIG_FOLLOW 0x00000004 /* trigger on next lower level trig */ 162*df0e68c1SIan Abbott #define TRIG_TIME 0x00000008 /* trigger at time N ns */ 163*df0e68c1SIan Abbott #define TRIG_TIMER 0x00000010 /* trigger at rate N ns */ 164*df0e68c1SIan Abbott #define TRIG_COUNT 0x00000020 /* trigger when count reaches N */ 165*df0e68c1SIan Abbott #define TRIG_EXT 0x00000040 /* trigger on external signal N */ 166*df0e68c1SIan Abbott #define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */ 167*df0e68c1SIan Abbott #define TRIG_OTHER 0x00000100 /* driver defined */ 168*df0e68c1SIan Abbott 169*df0e68c1SIan Abbott /* subdevice flags */ 170*df0e68c1SIan Abbott 171*df0e68c1SIan Abbott #define SDF_BUSY 0x0001 /* device is busy */ 172*df0e68c1SIan Abbott #define SDF_BUSY_OWNER 0x0002 /* device is busy with your job */ 173*df0e68c1SIan Abbott #define SDF_LOCKED 0x0004 /* subdevice is locked */ 174*df0e68c1SIan Abbott #define SDF_LOCK_OWNER 0x0008 /* you own lock */ 175*df0e68c1SIan Abbott #define SDF_MAXDATA 0x0010 /* maxdata depends on channel */ 176*df0e68c1SIan Abbott #define SDF_FLAGS 0x0020 /* flags depend on channel */ 177*df0e68c1SIan Abbott #define SDF_RANGETYPE 0x0040 /* range type depends on channel */ 178*df0e68c1SIan Abbott #define SDF_PWM_COUNTER 0x0080 /* PWM can automatically switch off */ 179*df0e68c1SIan Abbott #define SDF_PWM_HBRIDGE 0x0100 /* PWM is signed (H-bridge) */ 180*df0e68c1SIan Abbott #define SDF_CMD 0x1000 /* can do commands (deprecated) */ 181*df0e68c1SIan Abbott #define SDF_SOFT_CALIBRATED 0x2000 /* subdevice uses software calibration */ 182*df0e68c1SIan Abbott #define SDF_CMD_WRITE 0x4000 /* can do output commands */ 183*df0e68c1SIan Abbott #define SDF_CMD_READ 0x8000 /* can do input commands */ 184*df0e68c1SIan Abbott 185*df0e68c1SIan Abbott /* subdevice can be read (e.g. analog input) */ 186*df0e68c1SIan Abbott #define SDF_READABLE 0x00010000 187*df0e68c1SIan Abbott /* subdevice can be written (e.g. analog output) */ 188*df0e68c1SIan Abbott #define SDF_WRITABLE 0x00020000 189*df0e68c1SIan Abbott #define SDF_WRITEABLE SDF_WRITABLE /* spelling error in API */ 190*df0e68c1SIan Abbott /* subdevice does not have externally visible lines */ 191*df0e68c1SIan Abbott #define SDF_INTERNAL 0x00040000 192*df0e68c1SIan Abbott #define SDF_GROUND 0x00100000 /* can do aref=ground */ 193*df0e68c1SIan Abbott #define SDF_COMMON 0x00200000 /* can do aref=common */ 194*df0e68c1SIan Abbott #define SDF_DIFF 0x00400000 /* can do aref=diff */ 195*df0e68c1SIan Abbott #define SDF_OTHER 0x00800000 /* can do aref=other */ 196*df0e68c1SIan Abbott #define SDF_DITHER 0x01000000 /* can do dithering */ 197*df0e68c1SIan Abbott #define SDF_DEGLITCH 0x02000000 /* can do deglitching */ 198*df0e68c1SIan Abbott #define SDF_MMAP 0x04000000 /* can do mmap() */ 199*df0e68c1SIan Abbott #define SDF_RUNNING 0x08000000 /* subdevice is acquiring data */ 200*df0e68c1SIan Abbott #define SDF_LSAMPL 0x10000000 /* subdevice uses 32-bit samples */ 201*df0e68c1SIan Abbott #define SDF_PACKED 0x20000000 /* subdevice can do packed DIO */ 202*df0e68c1SIan Abbott 203*df0e68c1SIan Abbott /* subdevice types */ 204*df0e68c1SIan Abbott 205*df0e68c1SIan Abbott /** 206*df0e68c1SIan Abbott * enum comedi_subdevice_type - COMEDI subdevice types 207*df0e68c1SIan Abbott * @COMEDI_SUBD_UNUSED: Unused subdevice. 208*df0e68c1SIan Abbott * @COMEDI_SUBD_AI: Analog input. 209*df0e68c1SIan Abbott * @COMEDI_SUBD_AO: Analog output. 210*df0e68c1SIan Abbott * @COMEDI_SUBD_DI: Digital input. 211*df0e68c1SIan Abbott * @COMEDI_SUBD_DO: Digital output. 212*df0e68c1SIan Abbott * @COMEDI_SUBD_DIO: Digital input/output. 213*df0e68c1SIan Abbott * @COMEDI_SUBD_COUNTER: Counter. 214*df0e68c1SIan Abbott * @COMEDI_SUBD_TIMER: Timer. 215*df0e68c1SIan Abbott * @COMEDI_SUBD_MEMORY: Memory, EEPROM, DPRAM. 216*df0e68c1SIan Abbott * @COMEDI_SUBD_CALIB: Calibration DACs. 217*df0e68c1SIan Abbott * @COMEDI_SUBD_PROC: Processor, DSP. 218*df0e68c1SIan Abbott * @COMEDI_SUBD_SERIAL: Serial I/O. 219*df0e68c1SIan Abbott * @COMEDI_SUBD_PWM: Pulse-Width Modulation output. 220*df0e68c1SIan Abbott */ 221*df0e68c1SIan Abbott enum comedi_subdevice_type { 222*df0e68c1SIan Abbott COMEDI_SUBD_UNUSED, 223*df0e68c1SIan Abbott COMEDI_SUBD_AI, 224*df0e68c1SIan Abbott COMEDI_SUBD_AO, 225*df0e68c1SIan Abbott COMEDI_SUBD_DI, 226*df0e68c1SIan Abbott COMEDI_SUBD_DO, 227*df0e68c1SIan Abbott COMEDI_SUBD_DIO, 228*df0e68c1SIan Abbott COMEDI_SUBD_COUNTER, 229*df0e68c1SIan Abbott COMEDI_SUBD_TIMER, 230*df0e68c1SIan Abbott COMEDI_SUBD_MEMORY, 231*df0e68c1SIan Abbott COMEDI_SUBD_CALIB, 232*df0e68c1SIan Abbott COMEDI_SUBD_PROC, 233*df0e68c1SIan Abbott COMEDI_SUBD_SERIAL, 234*df0e68c1SIan Abbott COMEDI_SUBD_PWM 235*df0e68c1SIan Abbott }; 236*df0e68c1SIan Abbott 237*df0e68c1SIan Abbott /* configuration instructions */ 238*df0e68c1SIan Abbott 239*df0e68c1SIan Abbott /** 240*df0e68c1SIan Abbott * enum comedi_io_direction - COMEDI I/O directions 241*df0e68c1SIan Abbott * @COMEDI_INPUT: Input. 242*df0e68c1SIan Abbott * @COMEDI_OUTPUT: Output. 243*df0e68c1SIan Abbott * @COMEDI_OPENDRAIN: Open-drain (or open-collector) output. 244*df0e68c1SIan Abbott * 245*df0e68c1SIan Abbott * These are used by the %INSN_CONFIG_DIO_QUERY configuration instruction to 246*df0e68c1SIan Abbott * report a direction. They may also be used in other places where a direction 247*df0e68c1SIan Abbott * needs to be specified. 248*df0e68c1SIan Abbott */ 249*df0e68c1SIan Abbott enum comedi_io_direction { 250*df0e68c1SIan Abbott COMEDI_INPUT = 0, 251*df0e68c1SIan Abbott COMEDI_OUTPUT = 1, 252*df0e68c1SIan Abbott COMEDI_OPENDRAIN = 2 253*df0e68c1SIan Abbott }; 254*df0e68c1SIan Abbott 255*df0e68c1SIan Abbott /** 256*df0e68c1SIan Abbott * enum configuration_ids - COMEDI configuration instruction codes 257*df0e68c1SIan Abbott * @INSN_CONFIG_DIO_INPUT: Configure digital I/O as input. 258*df0e68c1SIan Abbott * @INSN_CONFIG_DIO_OUTPUT: Configure digital I/O as output. 259*df0e68c1SIan Abbott * @INSN_CONFIG_DIO_OPENDRAIN: Configure digital I/O as open-drain (or open 260*df0e68c1SIan Abbott * collector) output. 261*df0e68c1SIan Abbott * @INSN_CONFIG_ANALOG_TRIG: Configure analog trigger. 262*df0e68c1SIan Abbott * @INSN_CONFIG_ALT_SOURCE: Configure alternate input source. 263*df0e68c1SIan Abbott * @INSN_CONFIG_DIGITAL_TRIG: Configure digital trigger. 264*df0e68c1SIan Abbott * @INSN_CONFIG_BLOCK_SIZE: Configure block size for DMA transfers. 265*df0e68c1SIan Abbott * @INSN_CONFIG_TIMER_1: Configure divisor for external clock. 266*df0e68c1SIan Abbott * @INSN_CONFIG_FILTER: Configure a filter. 267*df0e68c1SIan Abbott * @INSN_CONFIG_CHANGE_NOTIFY: Configure change notification for digital 268*df0e68c1SIan Abbott * inputs. (New drivers should use 269*df0e68c1SIan Abbott * %INSN_CONFIG_DIGITAL_TRIG instead.) 270*df0e68c1SIan Abbott * @INSN_CONFIG_SERIAL_CLOCK: Configure clock for serial I/O. 271*df0e68c1SIan Abbott * @INSN_CONFIG_BIDIRECTIONAL_DATA: Send and receive byte over serial I/O. 272*df0e68c1SIan Abbott * @INSN_CONFIG_DIO_QUERY: Query direction of digital I/O channel. 273*df0e68c1SIan Abbott * @INSN_CONFIG_PWM_OUTPUT: Configure pulse-width modulator output. 274*df0e68c1SIan Abbott * @INSN_CONFIG_GET_PWM_OUTPUT: Get pulse-width modulator output configuration. 275*df0e68c1SIan Abbott * @INSN_CONFIG_ARM: Arm a subdevice or channel. 276*df0e68c1SIan Abbott * @INSN_CONFIG_DISARM: Disarm a subdevice or channel. 277*df0e68c1SIan Abbott * @INSN_CONFIG_GET_COUNTER_STATUS: Get counter status. 278*df0e68c1SIan Abbott * @INSN_CONFIG_RESET: Reset a subdevice or channel. 279*df0e68c1SIan Abbott * @INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR: Configure counter/timer as 280*df0e68c1SIan Abbott * single pulse generator. 281*df0e68c1SIan Abbott * @INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR: Configure counter/timer as 282*df0e68c1SIan Abbott * pulse train generator. 283*df0e68c1SIan Abbott * @INSN_CONFIG_GPCT_QUADRATURE_ENCODER: Configure counter as a quadrature 284*df0e68c1SIan Abbott * encoder. 285*df0e68c1SIan Abbott * @INSN_CONFIG_SET_GATE_SRC: Set counter/timer gate source. 286*df0e68c1SIan Abbott * @INSN_CONFIG_GET_GATE_SRC: Get counter/timer gate source. 287*df0e68c1SIan Abbott * @INSN_CONFIG_SET_CLOCK_SRC: Set counter/timer master clock source. 288*df0e68c1SIan Abbott * @INSN_CONFIG_GET_CLOCK_SRC: Get counter/timer master clock source. 289*df0e68c1SIan Abbott * @INSN_CONFIG_SET_OTHER_SRC: Set counter/timer "other" source. 290*df0e68c1SIan Abbott * @INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE: Get size (in bytes) of subdevice's 291*df0e68c1SIan Abbott * on-board FIFOs used during streaming 292*df0e68c1SIan Abbott * input/output. 293*df0e68c1SIan Abbott * @INSN_CONFIG_SET_COUNTER_MODE: Set counter/timer mode. 294*df0e68c1SIan Abbott * @INSN_CONFIG_8254_SET_MODE: (Deprecated) Same as 295*df0e68c1SIan Abbott * %INSN_CONFIG_SET_COUNTER_MODE. 296*df0e68c1SIan Abbott * @INSN_CONFIG_8254_READ_STATUS: Read status of 8254 counter channel. 297*df0e68c1SIan Abbott * @INSN_CONFIG_SET_ROUTING: Set routing for a channel. 298*df0e68c1SIan Abbott * @INSN_CONFIG_GET_ROUTING: Get routing for a channel. 299*df0e68c1SIan Abbott * @INSN_CONFIG_PWM_SET_PERIOD: Set PWM period in nanoseconds. 300*df0e68c1SIan Abbott * @INSN_CONFIG_PWM_GET_PERIOD: Get PWM period in nanoseconds. 301*df0e68c1SIan Abbott * @INSN_CONFIG_GET_PWM_STATUS: Get PWM status. 302*df0e68c1SIan Abbott * @INSN_CONFIG_PWM_SET_H_BRIDGE: Set PWM H bridge duty cycle and polarity for 303*df0e68c1SIan Abbott * a relay simultaneously. 304*df0e68c1SIan Abbott * @INSN_CONFIG_PWM_GET_H_BRIDGE: Get PWM H bridge duty cycle and polarity. 305*df0e68c1SIan Abbott * @INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: Get the hardware timing restraints, 306*df0e68c1SIan Abbott * regardless of trigger sources. 307*df0e68c1SIan Abbott */ 308*df0e68c1SIan Abbott enum configuration_ids { 309*df0e68c1SIan Abbott INSN_CONFIG_DIO_INPUT = COMEDI_INPUT, 310*df0e68c1SIan Abbott INSN_CONFIG_DIO_OUTPUT = COMEDI_OUTPUT, 311*df0e68c1SIan Abbott INSN_CONFIG_DIO_OPENDRAIN = COMEDI_OPENDRAIN, 312*df0e68c1SIan Abbott INSN_CONFIG_ANALOG_TRIG = 16, 313*df0e68c1SIan Abbott /* INSN_CONFIG_WAVEFORM = 17, */ 314*df0e68c1SIan Abbott /* INSN_CONFIG_TRIG = 18, */ 315*df0e68c1SIan Abbott /* INSN_CONFIG_COUNTER = 19, */ 316*df0e68c1SIan Abbott INSN_CONFIG_ALT_SOURCE = 20, 317*df0e68c1SIan Abbott INSN_CONFIG_DIGITAL_TRIG = 21, 318*df0e68c1SIan Abbott INSN_CONFIG_BLOCK_SIZE = 22, 319*df0e68c1SIan Abbott INSN_CONFIG_TIMER_1 = 23, 320*df0e68c1SIan Abbott INSN_CONFIG_FILTER = 24, 321*df0e68c1SIan Abbott INSN_CONFIG_CHANGE_NOTIFY = 25, 322*df0e68c1SIan Abbott 323*df0e68c1SIan Abbott INSN_CONFIG_SERIAL_CLOCK = 26, /*ALPHA*/ 324*df0e68c1SIan Abbott INSN_CONFIG_BIDIRECTIONAL_DATA = 27, 325*df0e68c1SIan Abbott INSN_CONFIG_DIO_QUERY = 28, 326*df0e68c1SIan Abbott INSN_CONFIG_PWM_OUTPUT = 29, 327*df0e68c1SIan Abbott INSN_CONFIG_GET_PWM_OUTPUT = 30, 328*df0e68c1SIan Abbott INSN_CONFIG_ARM = 31, 329*df0e68c1SIan Abbott INSN_CONFIG_DISARM = 32, 330*df0e68c1SIan Abbott INSN_CONFIG_GET_COUNTER_STATUS = 33, 331*df0e68c1SIan Abbott INSN_CONFIG_RESET = 34, 332*df0e68c1SIan Abbott INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR = 1001, 333*df0e68c1SIan Abbott INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR = 1002, 334*df0e68c1SIan Abbott INSN_CONFIG_GPCT_QUADRATURE_ENCODER = 1003, 335*df0e68c1SIan Abbott INSN_CONFIG_SET_GATE_SRC = 2001, 336*df0e68c1SIan Abbott INSN_CONFIG_GET_GATE_SRC = 2002, 337*df0e68c1SIan Abbott INSN_CONFIG_SET_CLOCK_SRC = 2003, 338*df0e68c1SIan Abbott INSN_CONFIG_GET_CLOCK_SRC = 2004, 339*df0e68c1SIan Abbott INSN_CONFIG_SET_OTHER_SRC = 2005, 340*df0e68c1SIan Abbott INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006, 341*df0e68c1SIan Abbott INSN_CONFIG_SET_COUNTER_MODE = 4097, 342*df0e68c1SIan Abbott INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE, 343*df0e68c1SIan Abbott INSN_CONFIG_8254_READ_STATUS = 4098, 344*df0e68c1SIan Abbott INSN_CONFIG_SET_ROUTING = 4099, 345*df0e68c1SIan Abbott INSN_CONFIG_GET_ROUTING = 4109, 346*df0e68c1SIan Abbott INSN_CONFIG_PWM_SET_PERIOD = 5000, 347*df0e68c1SIan Abbott INSN_CONFIG_PWM_GET_PERIOD = 5001, 348*df0e68c1SIan Abbott INSN_CONFIG_GET_PWM_STATUS = 5002, 349*df0e68c1SIan Abbott INSN_CONFIG_PWM_SET_H_BRIDGE = 5003, 350*df0e68c1SIan Abbott INSN_CONFIG_PWM_GET_H_BRIDGE = 5004, 351*df0e68c1SIan Abbott INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS = 5005, 352*df0e68c1SIan Abbott }; 353*df0e68c1SIan Abbott 354*df0e68c1SIan Abbott /** 355*df0e68c1SIan Abbott * enum device_configuration_ids - COMEDI configuration instruction codes global 356*df0e68c1SIan Abbott * to an entire device. 357*df0e68c1SIan Abbott * @INSN_DEVICE_CONFIG_TEST_ROUTE: Validate the possibility of a 358*df0e68c1SIan Abbott * globally-named route 359*df0e68c1SIan Abbott * @INSN_DEVICE_CONFIG_CONNECT_ROUTE: Connect a globally-named route 360*df0e68c1SIan Abbott * @INSN_DEVICE_CONFIG_DISCONNECT_ROUTE:Disconnect a globally-named route 361*df0e68c1SIan Abbott * @INSN_DEVICE_CONFIG_GET_ROUTES: Get a list of all globally-named routes 362*df0e68c1SIan Abbott * that are valid for a particular device. 363*df0e68c1SIan Abbott */ 364*df0e68c1SIan Abbott enum device_config_route_ids { 365*df0e68c1SIan Abbott INSN_DEVICE_CONFIG_TEST_ROUTE = 0, 366*df0e68c1SIan Abbott INSN_DEVICE_CONFIG_CONNECT_ROUTE = 1, 367*df0e68c1SIan Abbott INSN_DEVICE_CONFIG_DISCONNECT_ROUTE = 2, 368*df0e68c1SIan Abbott INSN_DEVICE_CONFIG_GET_ROUTES = 3, 369*df0e68c1SIan Abbott }; 370*df0e68c1SIan Abbott 371*df0e68c1SIan Abbott /** 372*df0e68c1SIan Abbott * enum comedi_digital_trig_op - operations for configuring a digital trigger 373*df0e68c1SIan Abbott * @COMEDI_DIGITAL_TRIG_DISABLE: Return digital trigger to its default, 374*df0e68c1SIan Abbott * inactive, unconfigured state. 375*df0e68c1SIan Abbott * @COMEDI_DIGITAL_TRIG_ENABLE_EDGES: Set rising and/or falling edge inputs 376*df0e68c1SIan Abbott * that each can fire the trigger. 377*df0e68c1SIan Abbott * @COMEDI_DIGITAL_TRIG_ENABLE_LEVELS: Set a combination of high and/or low 378*df0e68c1SIan Abbott * level inputs that can fire the trigger. 379*df0e68c1SIan Abbott * 380*df0e68c1SIan Abbott * These are used with the %INSN_CONFIG_DIGITAL_TRIG configuration instruction. 381*df0e68c1SIan Abbott * The data for the configuration instruction is as follows... 382*df0e68c1SIan Abbott * 383*df0e68c1SIan Abbott * data[%0] = %INSN_CONFIG_DIGITAL_TRIG 384*df0e68c1SIan Abbott * 385*df0e68c1SIan Abbott * data[%1] = trigger ID 386*df0e68c1SIan Abbott * 387*df0e68c1SIan Abbott * data[%2] = configuration operation 388*df0e68c1SIan Abbott * 389*df0e68c1SIan Abbott * data[%3] = configuration parameter 1 390*df0e68c1SIan Abbott * 391*df0e68c1SIan Abbott * data[%4] = configuration parameter 2 392*df0e68c1SIan Abbott * 393*df0e68c1SIan Abbott * data[%5] = configuration parameter 3 394*df0e68c1SIan Abbott * 395*df0e68c1SIan Abbott * The trigger ID (data[%1]) is used to differentiate multiple digital triggers 396*df0e68c1SIan Abbott * belonging to the same subdevice. The configuration operation (data[%2]) is 397*df0e68c1SIan Abbott * one of the enum comedi_digital_trig_op values. The configuration 398*df0e68c1SIan Abbott * parameters (data[%3], data[%4], and data[%5]) depend on the operation; they 399*df0e68c1SIan Abbott * are not used with %COMEDI_DIGITAL_TRIG_DISABLE. 400*df0e68c1SIan Abbott * 401*df0e68c1SIan Abbott * For %COMEDI_DIGITAL_TRIG_ENABLE_EDGES and %COMEDI_DIGITAL_TRIG_ENABLE_LEVELS, 402*df0e68c1SIan Abbott * configuration parameter 1 (data[%3]) contains a "left-shift" value that 403*df0e68c1SIan Abbott * specifies the input corresponding to bit 0 of configuration parameters 2 404*df0e68c1SIan Abbott * and 3. This is useful if the trigger has more than 32 inputs. 405*df0e68c1SIan Abbott * 406*df0e68c1SIan Abbott * For %COMEDI_DIGITAL_TRIG_ENABLE_EDGES, configuration parameter 2 (data[%4]) 407*df0e68c1SIan Abbott * specifies which of up to 32 inputs have rising-edge sensitivity, and 408*df0e68c1SIan Abbott * configuration parameter 3 (data[%5]) specifies which of up to 32 inputs 409*df0e68c1SIan Abbott * have falling-edge sensitivity that can fire the trigger. 410*df0e68c1SIan Abbott * 411*df0e68c1SIan Abbott * For %COMEDI_DIGITAL_TRIG_ENABLE_LEVELS, configuration parameter 2 (data[%4]) 412*df0e68c1SIan Abbott * specifies which of up to 32 inputs must be at a high level, and 413*df0e68c1SIan Abbott * configuration parameter 3 (data[%5]) specifies which of up to 32 inputs 414*df0e68c1SIan Abbott * must be at a low level for the trigger to fire. 415*df0e68c1SIan Abbott * 416*df0e68c1SIan Abbott * Some sequences of %INSN_CONFIG_DIGITAL_TRIG instructions may have a (partly) 417*df0e68c1SIan Abbott * accumulative effect, depending on the low-level driver. This is useful 418*df0e68c1SIan Abbott * when setting up a trigger that has more than 32 inputs, or has a combination 419*df0e68c1SIan Abbott * of edge- and level-triggered inputs. 420*df0e68c1SIan Abbott */ 421*df0e68c1SIan Abbott enum comedi_digital_trig_op { 422*df0e68c1SIan Abbott COMEDI_DIGITAL_TRIG_DISABLE = 0, 423*df0e68c1SIan Abbott COMEDI_DIGITAL_TRIG_ENABLE_EDGES = 1, 424*df0e68c1SIan Abbott COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = 2 425*df0e68c1SIan Abbott }; 426*df0e68c1SIan Abbott 427*df0e68c1SIan Abbott /** 428*df0e68c1SIan Abbott * enum comedi_support_level - support level for a COMEDI feature 429*df0e68c1SIan Abbott * @COMEDI_UNKNOWN_SUPPORT: Unspecified support for feature. 430*df0e68c1SIan Abbott * @COMEDI_SUPPORTED: Feature is supported. 431*df0e68c1SIan Abbott * @COMEDI_UNSUPPORTED: Feature is unsupported. 432*df0e68c1SIan Abbott */ 433*df0e68c1SIan Abbott enum comedi_support_level { 434*df0e68c1SIan Abbott COMEDI_UNKNOWN_SUPPORT = 0, 435*df0e68c1SIan Abbott COMEDI_SUPPORTED, 436*df0e68c1SIan Abbott COMEDI_UNSUPPORTED 437*df0e68c1SIan Abbott }; 438*df0e68c1SIan Abbott 439*df0e68c1SIan Abbott /** 440*df0e68c1SIan Abbott * enum comedi_counter_status_flags - counter status bits 441*df0e68c1SIan Abbott * @COMEDI_COUNTER_ARMED: Counter is armed. 442*df0e68c1SIan Abbott * @COMEDI_COUNTER_COUNTING: Counter is counting. 443*df0e68c1SIan Abbott * @COMEDI_COUNTER_TERMINAL_COUNT: Counter reached terminal count. 444*df0e68c1SIan Abbott * 445*df0e68c1SIan Abbott * These bitwise values are used by the %INSN_CONFIG_GET_COUNTER_STATUS 446*df0e68c1SIan Abbott * configuration instruction to report the status of a counter. 447*df0e68c1SIan Abbott */ 448*df0e68c1SIan Abbott enum comedi_counter_status_flags { 449*df0e68c1SIan Abbott COMEDI_COUNTER_ARMED = 0x1, 450*df0e68c1SIan Abbott COMEDI_COUNTER_COUNTING = 0x2, 451*df0e68c1SIan Abbott COMEDI_COUNTER_TERMINAL_COUNT = 0x4, 452*df0e68c1SIan Abbott }; 453*df0e68c1SIan Abbott 454*df0e68c1SIan Abbott /* ioctls */ 455*df0e68c1SIan Abbott 456*df0e68c1SIan Abbott #define CIO 'd' 457*df0e68c1SIan Abbott #define COMEDI_DEVCONFIG _IOW(CIO, 0, struct comedi_devconfig) 458*df0e68c1SIan Abbott #define COMEDI_DEVINFO _IOR(CIO, 1, struct comedi_devinfo) 459*df0e68c1SIan Abbott #define COMEDI_SUBDINFO _IOR(CIO, 2, struct comedi_subdinfo) 460*df0e68c1SIan Abbott #define COMEDI_CHANINFO _IOR(CIO, 3, struct comedi_chaninfo) 461*df0e68c1SIan Abbott /* _IOWR(CIO, 4, ...) is reserved */ 462*df0e68c1SIan Abbott #define COMEDI_LOCK _IO(CIO, 5) 463*df0e68c1SIan Abbott #define COMEDI_UNLOCK _IO(CIO, 6) 464*df0e68c1SIan Abbott #define COMEDI_CANCEL _IO(CIO, 7) 465*df0e68c1SIan Abbott #define COMEDI_RANGEINFO _IOR(CIO, 8, struct comedi_rangeinfo) 466*df0e68c1SIan Abbott #define COMEDI_CMD _IOR(CIO, 9, struct comedi_cmd) 467*df0e68c1SIan Abbott #define COMEDI_CMDTEST _IOR(CIO, 10, struct comedi_cmd) 468*df0e68c1SIan Abbott #define COMEDI_INSNLIST _IOR(CIO, 11, struct comedi_insnlist) 469*df0e68c1SIan Abbott #define COMEDI_INSN _IOR(CIO, 12, struct comedi_insn) 470*df0e68c1SIan Abbott #define COMEDI_BUFCONFIG _IOR(CIO, 13, struct comedi_bufconfig) 471*df0e68c1SIan Abbott #define COMEDI_BUFINFO _IOWR(CIO, 14, struct comedi_bufinfo) 472*df0e68c1SIan Abbott #define COMEDI_POLL _IO(CIO, 15) 473*df0e68c1SIan Abbott #define COMEDI_SETRSUBD _IO(CIO, 16) 474*df0e68c1SIan Abbott #define COMEDI_SETWSUBD _IO(CIO, 17) 475*df0e68c1SIan Abbott 476*df0e68c1SIan Abbott /* structures */ 477*df0e68c1SIan Abbott 478*df0e68c1SIan Abbott /** 479*df0e68c1SIan Abbott * struct comedi_insn - COMEDI instruction 480*df0e68c1SIan Abbott * @insn: COMEDI instruction type (%INSN_xxx). 481*df0e68c1SIan Abbott * @n: Length of @data[]. 482*df0e68c1SIan Abbott * @data: Pointer to data array operated on by the instruction. 483*df0e68c1SIan Abbott * @subdev: Subdevice index. 484*df0e68c1SIan Abbott * @chanspec: A packed "chanspec" value consisting of channel number, 485*df0e68c1SIan Abbott * analog range index, analog reference type, and flags. 486*df0e68c1SIan Abbott * @unused: Reserved for future use. 487*df0e68c1SIan Abbott * 488*df0e68c1SIan Abbott * This is used with the %COMEDI_INSN ioctl, and indirectly with the 489*df0e68c1SIan Abbott * %COMEDI_INSNLIST ioctl. 490*df0e68c1SIan Abbott */ 491*df0e68c1SIan Abbott struct comedi_insn { 492*df0e68c1SIan Abbott unsigned int insn; 493*df0e68c1SIan Abbott unsigned int n; 494*df0e68c1SIan Abbott unsigned int __user *data; 495*df0e68c1SIan Abbott unsigned int subdev; 496*df0e68c1SIan Abbott unsigned int chanspec; 497*df0e68c1SIan Abbott unsigned int unused[3]; 498*df0e68c1SIan Abbott }; 499*df0e68c1SIan Abbott 500*df0e68c1SIan Abbott /** 501*df0e68c1SIan Abbott * struct comedi_insnlist - list of COMEDI instructions 502*df0e68c1SIan Abbott * @n_insns: Number of COMEDI instructions. 503*df0e68c1SIan Abbott * @insns: Pointer to array COMEDI instructions. 504*df0e68c1SIan Abbott * 505*df0e68c1SIan Abbott * This is used with the %COMEDI_INSNLIST ioctl. 506*df0e68c1SIan Abbott */ 507*df0e68c1SIan Abbott struct comedi_insnlist { 508*df0e68c1SIan Abbott unsigned int n_insns; 509*df0e68c1SIan Abbott struct comedi_insn __user *insns; 510*df0e68c1SIan Abbott }; 511*df0e68c1SIan Abbott 512*df0e68c1SIan Abbott /** 513*df0e68c1SIan Abbott * struct comedi_cmd - COMEDI asynchronous acquisition command details 514*df0e68c1SIan Abbott * @subdev: Subdevice index. 515*df0e68c1SIan Abbott * @flags: Command flags (%CMDF_xxx). 516*df0e68c1SIan Abbott * @start_src: "Start acquisition" trigger source (%TRIG_xxx). 517*df0e68c1SIan Abbott * @start_arg: "Start acquisition" trigger argument. 518*df0e68c1SIan Abbott * @scan_begin_src: "Scan begin" trigger source. 519*df0e68c1SIan Abbott * @scan_begin_arg: "Scan begin" trigger argument. 520*df0e68c1SIan Abbott * @convert_src: "Convert" trigger source. 521*df0e68c1SIan Abbott * @convert_arg: "Convert" trigger argument. 522*df0e68c1SIan Abbott * @scan_end_src: "Scan end" trigger source. 523*df0e68c1SIan Abbott * @scan_end_arg: "Scan end" trigger argument. 524*df0e68c1SIan Abbott * @stop_src: "Stop acquisition" trigger source. 525*df0e68c1SIan Abbott * @stop_arg: "Stop acquisition" trigger argument. 526*df0e68c1SIan Abbott * @chanlist: Pointer to array of "chanspec" values, containing a 527*df0e68c1SIan Abbott * sequence of channel numbers packed with analog range 528*df0e68c1SIan Abbott * index, etc. 529*df0e68c1SIan Abbott * @chanlist_len: Number of channels in sequence. 530*df0e68c1SIan Abbott * @data: Pointer to miscellaneous set-up data (not used). 531*df0e68c1SIan Abbott * @data_len: Length of miscellaneous set-up data. 532*df0e68c1SIan Abbott * 533*df0e68c1SIan Abbott * This is used with the %COMEDI_CMD or %COMEDI_CMDTEST ioctl to set-up 534*df0e68c1SIan Abbott * or validate an asynchronous acquisition command. The ioctl may modify 535*df0e68c1SIan Abbott * the &struct comedi_cmd and copy it back to the caller. 536*df0e68c1SIan Abbott * 537*df0e68c1SIan Abbott * Optional command @flags values that can be ORed together... 538*df0e68c1SIan Abbott * 539*df0e68c1SIan Abbott * %CMDF_BOGUS - makes %COMEDI_CMD ioctl return error %EAGAIN instead of 540*df0e68c1SIan Abbott * starting the command. 541*df0e68c1SIan Abbott * 542*df0e68c1SIan Abbott * %CMDF_PRIORITY - requests "hard real-time" processing (which is not 543*df0e68c1SIan Abbott * supported in this version of COMEDI). 544*df0e68c1SIan Abbott * 545*df0e68c1SIan Abbott * %CMDF_WAKE_EOS - requests the command makes data available for reading 546*df0e68c1SIan Abbott * after every "scan" period. 547*df0e68c1SIan Abbott * 548*df0e68c1SIan Abbott * %CMDF_WRITE - marks the command as being in the "write" (to device) 549*df0e68c1SIan Abbott * direction. This does not need to be specified by the caller unless the 550*df0e68c1SIan Abbott * subdevice supports commands in either direction. 551*df0e68c1SIan Abbott * 552*df0e68c1SIan Abbott * %CMDF_RAWDATA - prevents the command from "munging" the data between the 553*df0e68c1SIan Abbott * COMEDI sample format and the raw hardware sample format. 554*df0e68c1SIan Abbott * 555*df0e68c1SIan Abbott * %CMDF_ROUND_NEAREST - requests timing periods to be rounded to nearest 556*df0e68c1SIan Abbott * supported values. 557*df0e68c1SIan Abbott * 558*df0e68c1SIan Abbott * %CMDF_ROUND_DOWN - requests timing periods to be rounded down to supported 559*df0e68c1SIan Abbott * values (frequencies rounded up). 560*df0e68c1SIan Abbott * 561*df0e68c1SIan Abbott * %CMDF_ROUND_UP - requests timing periods to be rounded up to supported 562*df0e68c1SIan Abbott * values (frequencies rounded down). 563*df0e68c1SIan Abbott * 564*df0e68c1SIan Abbott * Trigger source values for @start_src, @scan_begin_src, @convert_src, 565*df0e68c1SIan Abbott * @scan_end_src, and @stop_src... 566*df0e68c1SIan Abbott * 567*df0e68c1SIan Abbott * %TRIG_ANY - "all ones" value used to test which trigger sources are 568*df0e68c1SIan Abbott * supported. 569*df0e68c1SIan Abbott * 570*df0e68c1SIan Abbott * %TRIG_INVALID - "all zeroes" value used to indicate that all requested 571*df0e68c1SIan Abbott * trigger sources are invalid. 572*df0e68c1SIan Abbott * 573*df0e68c1SIan Abbott * %TRIG_NONE - never trigger (often used as a @stop_src value). 574*df0e68c1SIan Abbott * 575*df0e68c1SIan Abbott * %TRIG_NOW - trigger after '_arg' nanoseconds. 576*df0e68c1SIan Abbott * 577*df0e68c1SIan Abbott * %TRIG_FOLLOW - trigger follows another event. 578*df0e68c1SIan Abbott * 579*df0e68c1SIan Abbott * %TRIG_TIMER - trigger every '_arg' nanoseconds. 580*df0e68c1SIan Abbott * 581*df0e68c1SIan Abbott * %TRIG_COUNT - trigger when count '_arg' is reached. 582*df0e68c1SIan Abbott * 583*df0e68c1SIan Abbott * %TRIG_EXT - trigger on external signal specified by '_arg'. 584*df0e68c1SIan Abbott * 585*df0e68c1SIan Abbott * %TRIG_INT - trigger on internal, software trigger specified by '_arg'. 586*df0e68c1SIan Abbott * 587*df0e68c1SIan Abbott * %TRIG_OTHER - trigger on other, driver-defined signal specified by '_arg'. 588*df0e68c1SIan Abbott */ 589*df0e68c1SIan Abbott struct comedi_cmd { 590*df0e68c1SIan Abbott unsigned int subdev; 591*df0e68c1SIan Abbott unsigned int flags; 592*df0e68c1SIan Abbott 593*df0e68c1SIan Abbott unsigned int start_src; 594*df0e68c1SIan Abbott unsigned int start_arg; 595*df0e68c1SIan Abbott 596*df0e68c1SIan Abbott unsigned int scan_begin_src; 597*df0e68c1SIan Abbott unsigned int scan_begin_arg; 598*df0e68c1SIan Abbott 599*df0e68c1SIan Abbott unsigned int convert_src; 600*df0e68c1SIan Abbott unsigned int convert_arg; 601*df0e68c1SIan Abbott 602*df0e68c1SIan Abbott unsigned int scan_end_src; 603*df0e68c1SIan Abbott unsigned int scan_end_arg; 604*df0e68c1SIan Abbott 605*df0e68c1SIan Abbott unsigned int stop_src; 606*df0e68c1SIan Abbott unsigned int stop_arg; 607*df0e68c1SIan Abbott 608*df0e68c1SIan Abbott unsigned int *chanlist; 609*df0e68c1SIan Abbott unsigned int chanlist_len; 610*df0e68c1SIan Abbott 611*df0e68c1SIan Abbott short __user *data; 612*df0e68c1SIan Abbott unsigned int data_len; 613*df0e68c1SIan Abbott }; 614*df0e68c1SIan Abbott 615*df0e68c1SIan Abbott /** 616*df0e68c1SIan Abbott * struct comedi_chaninfo - used to retrieve per-channel information 617*df0e68c1SIan Abbott * @subdev: Subdevice index. 618*df0e68c1SIan Abbott * @maxdata_list: Optional pointer to per-channel maximum data values. 619*df0e68c1SIan Abbott * @flaglist: Optional pointer to per-channel flags. 620*df0e68c1SIan Abbott * @rangelist: Optional pointer to per-channel range types. 621*df0e68c1SIan Abbott * @unused: Reserved for future use. 622*df0e68c1SIan Abbott * 623*df0e68c1SIan Abbott * This is used with the %COMEDI_CHANINFO ioctl to get per-channel information 624*df0e68c1SIan Abbott * for the subdevice. Use of this requires knowledge of the number of channels 625*df0e68c1SIan Abbott * and subdevice flags obtained using the %COMEDI_SUBDINFO ioctl. 626*df0e68c1SIan Abbott * 627*df0e68c1SIan Abbott * The @maxdata_list member must be %NULL unless the %SDF_MAXDATA subdevice 628*df0e68c1SIan Abbott * flag is set. The @flaglist member must be %NULL unless the %SDF_FLAGS 629*df0e68c1SIan Abbott * subdevice flag is set. The @rangelist member must be %NULL unless the 630*df0e68c1SIan Abbott * %SDF_RANGETYPE subdevice flag is set. Otherwise, the arrays they point to 631*df0e68c1SIan Abbott * must be at least as long as the number of channels. 632*df0e68c1SIan Abbott */ 633*df0e68c1SIan Abbott struct comedi_chaninfo { 634*df0e68c1SIan Abbott unsigned int subdev; 635*df0e68c1SIan Abbott unsigned int __user *maxdata_list; 636*df0e68c1SIan Abbott unsigned int __user *flaglist; 637*df0e68c1SIan Abbott unsigned int __user *rangelist; 638*df0e68c1SIan Abbott unsigned int unused[4]; 639*df0e68c1SIan Abbott }; 640*df0e68c1SIan Abbott 641*df0e68c1SIan Abbott /** 642*df0e68c1SIan Abbott * struct comedi_rangeinfo - used to retrieve the range table for a channel 643*df0e68c1SIan Abbott * @range_type: Encodes subdevice index (bits 27:24), channel index 644*df0e68c1SIan Abbott * (bits 23:16) and range table length (bits 15:0). 645*df0e68c1SIan Abbott * @range_ptr: Pointer to array of @struct comedi_krange to be filled 646*df0e68c1SIan Abbott * in with the range table for the channel or subdevice. 647*df0e68c1SIan Abbott * 648*df0e68c1SIan Abbott * This is used with the %COMEDI_RANGEINFO ioctl to retrieve the range table 649*df0e68c1SIan Abbott * for a specific channel (if the subdevice has the %SDF_RANGETYPE flag set to 650*df0e68c1SIan Abbott * indicate that the range table depends on the channel), or for the subdevice 651*df0e68c1SIan Abbott * as a whole (if the %SDF_RANGETYPE flag is clear, indicating the range table 652*df0e68c1SIan Abbott * is shared by all channels). 653*df0e68c1SIan Abbott * 654*df0e68c1SIan Abbott * The @range_type value is an input to the ioctl and comes from a previous 655*df0e68c1SIan Abbott * use of the %COMEDI_SUBDINFO ioctl (if the %SDF_RANGETYPE flag is clear), 656*df0e68c1SIan Abbott * or the %COMEDI_CHANINFO ioctl (if the %SDF_RANGETYPE flag is set). 657*df0e68c1SIan Abbott */ 658*df0e68c1SIan Abbott struct comedi_rangeinfo { 659*df0e68c1SIan Abbott unsigned int range_type; 660*df0e68c1SIan Abbott void __user *range_ptr; 661*df0e68c1SIan Abbott }; 662*df0e68c1SIan Abbott 663*df0e68c1SIan Abbott /** 664*df0e68c1SIan Abbott * struct comedi_krange - describes a range in a range table 665*df0e68c1SIan Abbott * @min: Minimum value in millionths (1e-6) of a unit. 666*df0e68c1SIan Abbott * @max: Maximum value in millionths (1e-6) of a unit. 667*df0e68c1SIan Abbott * @flags: Indicates the units (in bits 7:0) OR'ed with optional flags. 668*df0e68c1SIan Abbott * 669*df0e68c1SIan Abbott * A range table is associated with a single channel, or with all channels in a 670*df0e68c1SIan Abbott * subdevice, and a list of one or more ranges. A %struct comedi_krange 671*df0e68c1SIan Abbott * describes the physical range of units for one of those ranges. Sample 672*df0e68c1SIan Abbott * values in COMEDI are unsigned from %0 up to some 'maxdata' value. The 673*df0e68c1SIan Abbott * mapping from sample values to physical units is assumed to be nomimally 674*df0e68c1SIan Abbott * linear (for the purpose of describing the range), with sample value %0 675*df0e68c1SIan Abbott * mapping to @min, and the 'maxdata' sample value mapping to @max. 676*df0e68c1SIan Abbott * 677*df0e68c1SIan Abbott * The currently defined units are %UNIT_volt (%0), %UNIT_mA (%1), and 678*df0e68c1SIan Abbott * %UNIT_none (%2). The @min and @max values are the physical range multiplied 679*df0e68c1SIan Abbott * by 1e6, so a @max value of %1000000 (with %UNIT_volt) represents a maximal 680*df0e68c1SIan Abbott * value of 1 volt. 681*df0e68c1SIan Abbott * 682*df0e68c1SIan Abbott * The only defined flag value is %RF_EXTERNAL (%0x100), indicating that the 683*df0e68c1SIan Abbott * range needs to be multiplied by an external reference. 684*df0e68c1SIan Abbott */ 685*df0e68c1SIan Abbott struct comedi_krange { 686*df0e68c1SIan Abbott int min; 687*df0e68c1SIan Abbott int max; 688*df0e68c1SIan Abbott unsigned int flags; 689*df0e68c1SIan Abbott }; 690*df0e68c1SIan Abbott 691*df0e68c1SIan Abbott /** 692*df0e68c1SIan Abbott * struct comedi_subdinfo - used to retrieve information about a subdevice 693*df0e68c1SIan Abbott * @type: Type of subdevice from &enum comedi_subdevice_type. 694*df0e68c1SIan Abbott * @n_chan: Number of channels the subdevice supports. 695*df0e68c1SIan Abbott * @subd_flags: A mixture of static and dynamic flags describing 696*df0e68c1SIan Abbott * aspects of the subdevice and its current state. 697*df0e68c1SIan Abbott * @timer_type: Timer type. Always set to %5 ("nanosecond timer"). 698*df0e68c1SIan Abbott * @len_chanlist: Maximum length of a channel list if the subdevice 699*df0e68c1SIan Abbott * supports asynchronous acquisition commands. 700*df0e68c1SIan Abbott * @maxdata: Maximum sample value for all channels if the 701*df0e68c1SIan Abbott * %SDF_MAXDATA subdevice flag is clear. 702*df0e68c1SIan Abbott * @flags: Channel flags for all channels if the %SDF_FLAGS 703*df0e68c1SIan Abbott * subdevice flag is clear. 704*df0e68c1SIan Abbott * @range_type: The range type for all channels if the %SDF_RANGETYPE 705*df0e68c1SIan Abbott * subdevice flag is clear. Encodes the subdevice index 706*df0e68c1SIan Abbott * (bits 27:24), a dummy channel index %0 (bits 23:16), 707*df0e68c1SIan Abbott * and the range table length (bits 15:0). 708*df0e68c1SIan Abbott * @settling_time_0: Not used. 709*df0e68c1SIan Abbott * @insn_bits_support: Set to %COMEDI_SUPPORTED if the subdevice supports the 710*df0e68c1SIan Abbott * %INSN_BITS instruction, or to %COMEDI_UNSUPPORTED if it 711*df0e68c1SIan Abbott * does not. 712*df0e68c1SIan Abbott * @unused: Reserved for future use. 713*df0e68c1SIan Abbott * 714*df0e68c1SIan Abbott * This is used with the %COMEDI_SUBDINFO ioctl which copies an array of 715*df0e68c1SIan Abbott * &struct comedi_subdinfo back to user space, with one element per subdevice. 716*df0e68c1SIan Abbott * Use of this requires knowledge of the number of subdevices obtained from 717*df0e68c1SIan Abbott * the %COMEDI_DEVINFO ioctl. 718*df0e68c1SIan Abbott * 719*df0e68c1SIan Abbott * These are the @subd_flags values that may be ORed together... 720*df0e68c1SIan Abbott * 721*df0e68c1SIan Abbott * %SDF_BUSY - the subdevice is busy processing an asynchronous command or a 722*df0e68c1SIan Abbott * synchronous instruction. 723*df0e68c1SIan Abbott * 724*df0e68c1SIan Abbott * %SDF_BUSY_OWNER - the subdevice is busy processing an asynchronous 725*df0e68c1SIan Abbott * acquisition command started on the current file object (the file object 726*df0e68c1SIan Abbott * issuing the %COMEDI_SUBDINFO ioctl). 727*df0e68c1SIan Abbott * 728*df0e68c1SIan Abbott * %SDF_LOCKED - the subdevice is locked by a %COMEDI_LOCK ioctl. 729*df0e68c1SIan Abbott * 730*df0e68c1SIan Abbott * %SDF_LOCK_OWNER - the subdevice is locked by a %COMEDI_LOCK ioctl from the 731*df0e68c1SIan Abbott * current file object. 732*df0e68c1SIan Abbott * 733*df0e68c1SIan Abbott * %SDF_MAXDATA - maximum sample values are channel-specific. 734*df0e68c1SIan Abbott * 735*df0e68c1SIan Abbott * %SDF_FLAGS - channel flags are channel-specific. 736*df0e68c1SIan Abbott * 737*df0e68c1SIan Abbott * %SDF_RANGETYPE - range types are channel-specific. 738*df0e68c1SIan Abbott * 739*df0e68c1SIan Abbott * %SDF_PWM_COUNTER - PWM can switch off automatically. 740*df0e68c1SIan Abbott * 741*df0e68c1SIan Abbott * %SDF_PWM_HBRIDGE - or PWM is signed (H-bridge). 742*df0e68c1SIan Abbott * 743*df0e68c1SIan Abbott * %SDF_CMD - the subdevice supports asynchronous commands. 744*df0e68c1SIan Abbott * 745*df0e68c1SIan Abbott * %SDF_SOFT_CALIBRATED - the subdevice uses software calibration. 746*df0e68c1SIan Abbott * 747*df0e68c1SIan Abbott * %SDF_CMD_WRITE - the subdevice supports asynchronous commands in the output 748*df0e68c1SIan Abbott * ("write") direction. 749*df0e68c1SIan Abbott * 750*df0e68c1SIan Abbott * %SDF_CMD_READ - the subdevice supports asynchronous commands in the input 751*df0e68c1SIan Abbott * ("read") direction. 752*df0e68c1SIan Abbott * 753*df0e68c1SIan Abbott * %SDF_READABLE - the subdevice is readable (e.g. analog input). 754*df0e68c1SIan Abbott * 755*df0e68c1SIan Abbott * %SDF_WRITABLE (aliased as %SDF_WRITEABLE) - the subdevice is writable (e.g. 756*df0e68c1SIan Abbott * analog output). 757*df0e68c1SIan Abbott * 758*df0e68c1SIan Abbott * %SDF_INTERNAL - the subdevice has no externally visible lines. 759*df0e68c1SIan Abbott * 760*df0e68c1SIan Abbott * %SDF_GROUND - the subdevice can use ground as an analog reference. 761*df0e68c1SIan Abbott * 762*df0e68c1SIan Abbott * %SDF_COMMON - the subdevice can use a common analog reference. 763*df0e68c1SIan Abbott * 764*df0e68c1SIan Abbott * %SDF_DIFF - the subdevice can use differential inputs (or outputs). 765*df0e68c1SIan Abbott * 766*df0e68c1SIan Abbott * %SDF_OTHER - the subdevice can use some other analog reference. 767*df0e68c1SIan Abbott * 768*df0e68c1SIan Abbott * %SDF_DITHER - the subdevice can do dithering. 769*df0e68c1SIan Abbott * 770*df0e68c1SIan Abbott * %SDF_DEGLITCH - the subdevice can do deglitching. 771*df0e68c1SIan Abbott * 772*df0e68c1SIan Abbott * %SDF_MMAP - this is never set. 773*df0e68c1SIan Abbott * 774*df0e68c1SIan Abbott * %SDF_RUNNING - an asynchronous command is still running. 775*df0e68c1SIan Abbott * 776*df0e68c1SIan Abbott * %SDF_LSAMPL - the subdevice uses "long" (32-bit) samples (for asynchronous 777*df0e68c1SIan Abbott * command data). 778*df0e68c1SIan Abbott * 779*df0e68c1SIan Abbott * %SDF_PACKED - the subdevice packs several DIO samples into a single sample 780*df0e68c1SIan Abbott * (for asynchronous command data). 781*df0e68c1SIan Abbott * 782*df0e68c1SIan Abbott * No "channel flags" (@flags) values are currently defined. 783*df0e68c1SIan Abbott */ 784*df0e68c1SIan Abbott struct comedi_subdinfo { 785*df0e68c1SIan Abbott unsigned int type; 786*df0e68c1SIan Abbott unsigned int n_chan; 787*df0e68c1SIan Abbott unsigned int subd_flags; 788*df0e68c1SIan Abbott unsigned int timer_type; 789*df0e68c1SIan Abbott unsigned int len_chanlist; 790*df0e68c1SIan Abbott unsigned int maxdata; 791*df0e68c1SIan Abbott unsigned int flags; 792*df0e68c1SIan Abbott unsigned int range_type; 793*df0e68c1SIan Abbott unsigned int settling_time_0; 794*df0e68c1SIan Abbott unsigned int insn_bits_support; 795*df0e68c1SIan Abbott unsigned int unused[8]; 796*df0e68c1SIan Abbott }; 797*df0e68c1SIan Abbott 798*df0e68c1SIan Abbott /** 799*df0e68c1SIan Abbott * struct comedi_devinfo - used to retrieve information about a COMEDI device 800*df0e68c1SIan Abbott * @version_code: COMEDI version code. 801*df0e68c1SIan Abbott * @n_subdevs: Number of subdevices the device has. 802*df0e68c1SIan Abbott * @driver_name: Null-terminated COMEDI driver name. 803*df0e68c1SIan Abbott * @board_name: Null-terminated COMEDI board name. 804*df0e68c1SIan Abbott * @read_subdevice: Index of the current "read" subdevice (%-1 if none). 805*df0e68c1SIan Abbott * @write_subdevice: Index of the current "write" subdevice (%-1 if none). 806*df0e68c1SIan Abbott * @unused: Reserved for future use. 807*df0e68c1SIan Abbott * 808*df0e68c1SIan Abbott * This is used with the %COMEDI_DEVINFO ioctl to get basic information about 809*df0e68c1SIan Abbott * the device. 810*df0e68c1SIan Abbott */ 811*df0e68c1SIan Abbott struct comedi_devinfo { 812*df0e68c1SIan Abbott unsigned int version_code; 813*df0e68c1SIan Abbott unsigned int n_subdevs; 814*df0e68c1SIan Abbott char driver_name[COMEDI_NAMELEN]; 815*df0e68c1SIan Abbott char board_name[COMEDI_NAMELEN]; 816*df0e68c1SIan Abbott int read_subdevice; 817*df0e68c1SIan Abbott int write_subdevice; 818*df0e68c1SIan Abbott int unused[30]; 819*df0e68c1SIan Abbott }; 820*df0e68c1SIan Abbott 821*df0e68c1SIan Abbott /** 822*df0e68c1SIan Abbott * struct comedi_devconfig - used to configure a legacy COMEDI device 823*df0e68c1SIan Abbott * @board_name: Null-terminated string specifying the type of board 824*df0e68c1SIan Abbott * to configure. 825*df0e68c1SIan Abbott * @options: An array of integer configuration options. 826*df0e68c1SIan Abbott * 827*df0e68c1SIan Abbott * This is used with the %COMEDI_DEVCONFIG ioctl to configure a "legacy" COMEDI 828*df0e68c1SIan Abbott * device, such as an ISA card. Not all COMEDI drivers support this. Those 829*df0e68c1SIan Abbott * that do either expect the specified board name to match one of a list of 830*df0e68c1SIan Abbott * names registered with the COMEDI core, or expect the specified board name 831*df0e68c1SIan Abbott * to match the COMEDI driver name itself. The configuration options are 832*df0e68c1SIan Abbott * handled in a driver-specific manner. 833*df0e68c1SIan Abbott */ 834*df0e68c1SIan Abbott struct comedi_devconfig { 835*df0e68c1SIan Abbott char board_name[COMEDI_NAMELEN]; 836*df0e68c1SIan Abbott int options[COMEDI_NDEVCONFOPTS]; 837*df0e68c1SIan Abbott }; 838*df0e68c1SIan Abbott 839*df0e68c1SIan Abbott /** 840*df0e68c1SIan Abbott * struct comedi_bufconfig - used to set or get buffer size for a subdevice 841*df0e68c1SIan Abbott * @subdevice: Subdevice index. 842*df0e68c1SIan Abbott * @flags: Not used. 843*df0e68c1SIan Abbott * @maximum_size: Maximum allowed buffer size. 844*df0e68c1SIan Abbott * @size: Buffer size. 845*df0e68c1SIan Abbott * @unused: Reserved for future use. 846*df0e68c1SIan Abbott * 847*df0e68c1SIan Abbott * This is used with the %COMEDI_BUFCONFIG ioctl to get or configure the 848*df0e68c1SIan Abbott * maximum buffer size and current buffer size for a COMEDI subdevice that 849*df0e68c1SIan Abbott * supports asynchronous commands. If the subdevice does not support 850*df0e68c1SIan Abbott * asynchronous commands, @maximum_size and @size are ignored and set to 0. 851*df0e68c1SIan Abbott * 852*df0e68c1SIan Abbott * On ioctl input, non-zero values of @maximum_size and @size specify a 853*df0e68c1SIan Abbott * new maximum size and new current size (in bytes), respectively. These 854*df0e68c1SIan Abbott * will by rounded up to a multiple of %PAGE_SIZE. Specifying a new maximum 855*df0e68c1SIan Abbott * size requires admin capabilities. 856*df0e68c1SIan Abbott * 857*df0e68c1SIan Abbott * On ioctl output, @maximum_size and @size and set to the current maximum 858*df0e68c1SIan Abbott * buffer size and current buffer size, respectively. 859*df0e68c1SIan Abbott */ 860*df0e68c1SIan Abbott struct comedi_bufconfig { 861*df0e68c1SIan Abbott unsigned int subdevice; 862*df0e68c1SIan Abbott unsigned int flags; 863*df0e68c1SIan Abbott 864*df0e68c1SIan Abbott unsigned int maximum_size; 865*df0e68c1SIan Abbott unsigned int size; 866*df0e68c1SIan Abbott 867*df0e68c1SIan Abbott unsigned int unused[4]; 868*df0e68c1SIan Abbott }; 869*df0e68c1SIan Abbott 870*df0e68c1SIan Abbott /** 871*df0e68c1SIan Abbott * struct comedi_bufinfo - used to manipulate buffer position for a subdevice 872*df0e68c1SIan Abbott * @subdevice: Subdevice index. 873*df0e68c1SIan Abbott * @bytes_read: Specify amount to advance read position for an 874*df0e68c1SIan Abbott * asynchronous command in the input ("read") direction. 875*df0e68c1SIan Abbott * @buf_write_ptr: Current write position (index) within the buffer. 876*df0e68c1SIan Abbott * @buf_read_ptr: Current read position (index) within the buffer. 877*df0e68c1SIan Abbott * @buf_write_count: Total amount written, modulo 2^32. 878*df0e68c1SIan Abbott * @buf_read_count: Total amount read, modulo 2^32. 879*df0e68c1SIan Abbott * @bytes_written: Specify amount to advance write position for an 880*df0e68c1SIan Abbott * asynchronous command in the output ("write") direction. 881*df0e68c1SIan Abbott * @unused: Reserved for future use. 882*df0e68c1SIan Abbott * 883*df0e68c1SIan Abbott * This is used with the %COMEDI_BUFINFO ioctl to optionally advance the 884*df0e68c1SIan Abbott * current read or write position in an asynchronous acquisition data buffer, 885*df0e68c1SIan Abbott * and to get the current read and write positions in the buffer. 886*df0e68c1SIan Abbott */ 887*df0e68c1SIan Abbott struct comedi_bufinfo { 888*df0e68c1SIan Abbott unsigned int subdevice; 889*df0e68c1SIan Abbott unsigned int bytes_read; 890*df0e68c1SIan Abbott 891*df0e68c1SIan Abbott unsigned int buf_write_ptr; 892*df0e68c1SIan Abbott unsigned int buf_read_ptr; 893*df0e68c1SIan Abbott unsigned int buf_write_count; 894*df0e68c1SIan Abbott unsigned int buf_read_count; 895*df0e68c1SIan Abbott 896*df0e68c1SIan Abbott unsigned int bytes_written; 897*df0e68c1SIan Abbott 898*df0e68c1SIan Abbott unsigned int unused[4]; 899*df0e68c1SIan Abbott }; 900*df0e68c1SIan Abbott 901*df0e68c1SIan Abbott /* range stuff */ 902*df0e68c1SIan Abbott 903*df0e68c1SIan Abbott #define __RANGE(a, b) ((((a) & 0xffff) << 16) | ((b) & 0xffff)) 904*df0e68c1SIan Abbott 905*df0e68c1SIan Abbott #define RANGE_OFFSET(a) (((a) >> 16) & 0xffff) 906*df0e68c1SIan Abbott #define RANGE_LENGTH(b) ((b) & 0xffff) 907*df0e68c1SIan Abbott 908*df0e68c1SIan Abbott #define RF_UNIT(flags) ((flags) & 0xff) 909*df0e68c1SIan Abbott #define RF_EXTERNAL 0x100 910*df0e68c1SIan Abbott 911*df0e68c1SIan Abbott #define UNIT_volt 0 912*df0e68c1SIan Abbott #define UNIT_mA 1 913*df0e68c1SIan Abbott #define UNIT_none 2 914*df0e68c1SIan Abbott 915*df0e68c1SIan Abbott #define COMEDI_MIN_SPEED 0xffffffffu 916*df0e68c1SIan Abbott 917*df0e68c1SIan Abbott /**********************************************************/ 918*df0e68c1SIan Abbott /* everything after this line is ALPHA */ 919*df0e68c1SIan Abbott /**********************************************************/ 920*df0e68c1SIan Abbott 921*df0e68c1SIan Abbott /* 922*df0e68c1SIan Abbott * 8254 specific configuration. 923*df0e68c1SIan Abbott * 924*df0e68c1SIan Abbott * It supports two config commands: 925*df0e68c1SIan Abbott * 926*df0e68c1SIan Abbott * 0 ID: INSN_CONFIG_SET_COUNTER_MODE 927*df0e68c1SIan Abbott * 1 8254 Mode 928*df0e68c1SIan Abbott * I8254_MODE0, I8254_MODE1, ..., I8254_MODE5 929*df0e68c1SIan Abbott * OR'ed with: 930*df0e68c1SIan Abbott * I8254_BCD, I8254_BINARY 931*df0e68c1SIan Abbott * 932*df0e68c1SIan Abbott * 0 ID: INSN_CONFIG_8254_READ_STATUS 933*df0e68c1SIan Abbott * 1 <-- Status byte returned here. 934*df0e68c1SIan Abbott * B7 = Output 935*df0e68c1SIan Abbott * B6 = NULL Count 936*df0e68c1SIan Abbott * B5 - B0 Current mode. 937*df0e68c1SIan Abbott */ 938*df0e68c1SIan Abbott 939*df0e68c1SIan Abbott enum i8254_mode { 940*df0e68c1SIan Abbott I8254_MODE0 = (0 << 1), /* Interrupt on terminal count */ 941*df0e68c1SIan Abbott I8254_MODE1 = (1 << 1), /* Hardware retriggerable one-shot */ 942*df0e68c1SIan Abbott I8254_MODE2 = (2 << 1), /* Rate generator */ 943*df0e68c1SIan Abbott I8254_MODE3 = (3 << 1), /* Square wave mode */ 944*df0e68c1SIan Abbott I8254_MODE4 = (4 << 1), /* Software triggered strobe */ 945*df0e68c1SIan Abbott /* Hardware triggered strobe (retriggerable) */ 946*df0e68c1SIan Abbott I8254_MODE5 = (5 << 1), 947*df0e68c1SIan Abbott /* Use binary-coded decimal instead of binary (pretty useless) */ 948*df0e68c1SIan Abbott I8254_BCD = 1, 949*df0e68c1SIan Abbott I8254_BINARY = 0 950*df0e68c1SIan Abbott }; 951*df0e68c1SIan Abbott 952*df0e68c1SIan Abbott /* *** BEGIN GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */ 953*df0e68c1SIan Abbott 954*df0e68c1SIan Abbott /* 955*df0e68c1SIan Abbott * Common National Instruments Terminal/Signal names. 956*df0e68c1SIan Abbott * Some of these have no NI_ prefix as they are useful for non-NI hardware, such 957*df0e68c1SIan Abbott * as those that utilize the PXI/RTSI trigger lines. 958*df0e68c1SIan Abbott * 959*df0e68c1SIan Abbott * NOTE ABOUT THE CHOICE OF NAMES HERE AND THE CAMELSCRIPT: 960*df0e68c1SIan Abbott * The choice to use CamelScript and the exact names below is for 961*df0e68c1SIan Abbott * maintainability, clarity, similarity to manufacturer's documentation, 962*df0e68c1SIan Abbott * _and_ a mitigation for confusion that has plagued the use of these drivers 963*df0e68c1SIan Abbott * for years! 964*df0e68c1SIan Abbott * 965*df0e68c1SIan Abbott * More detail: 966*df0e68c1SIan Abbott * There have been significant confusions over the past many years for users 967*df0e68c1SIan Abbott * when trying to understand how to connect to/from signals and terminals on 968*df0e68c1SIan Abbott * NI hardware using comedi. The major reason for this is that the actual 969*df0e68c1SIan Abbott * register values were exposed and required to be used by users. Several 970*df0e68c1SIan Abbott * major reasons exist why this caused major confusion for users: 971*df0e68c1SIan Abbott * 1) The register values are _NOT_ in user documentation, but rather in 972*df0e68c1SIan Abbott * arcane locations, such as a few register programming manuals that are 973*df0e68c1SIan Abbott * increasingly hard to find and the NI MHDDK (comments in example code). 974*df0e68c1SIan Abbott * There is no one place to find the various valid values of the registers. 975*df0e68c1SIan Abbott * 2) The register values are _NOT_ completely consistent. There is no way to 976*df0e68c1SIan Abbott * gain any sense of intuition of which values, or even enums one should use 977*df0e68c1SIan Abbott * for various registers. There was some attempt in prior use of comedi to 978*df0e68c1SIan Abbott * name enums such that a user might know which enums should be used for 979*df0e68c1SIan Abbott * varying purposes, but the end-user had to gain a knowledge of register 980*df0e68c1SIan Abbott * values to correctly wield this approach. 981*df0e68c1SIan Abbott * 3) The names for signals and registers found in the various register level 982*df0e68c1SIan Abbott * programming manuals and vendor-provided documentation are _not_ even 983*df0e68c1SIan Abbott * close to the same names that are in the end-user documentation. 984*df0e68c1SIan Abbott * 985*df0e68c1SIan Abbott * Similar, albeit less, confusion plagued NI's previous version of their own 986*df0e68c1SIan Abbott * drivers. Earlier than 2003, NI greatly simplified the situation for users 987*df0e68c1SIan Abbott * by releasing a new API that abstracted the names of signals/terminals to a 988*df0e68c1SIan Abbott * common and intuitive set of names. 989*df0e68c1SIan Abbott * 990*df0e68c1SIan Abbott * The names below mirror the names chosen and well documented by NI. These 991*df0e68c1SIan Abbott * names are exposed to the user via the comedilib user library. By keeping 992*df0e68c1SIan Abbott * the names below, in spite of the use of CamelScript, maintenance will be 993*df0e68c1SIan Abbott * greatly eased and confusion for users _and_ comedi developers will be 994*df0e68c1SIan Abbott * greatly reduced. 995*df0e68c1SIan Abbott */ 996*df0e68c1SIan Abbott 997*df0e68c1SIan Abbott /* 998*df0e68c1SIan Abbott * Base of abstracted NI names. 999*df0e68c1SIan Abbott * The first 16 bits of *_arg are reserved for channel selection. 1000*df0e68c1SIan Abbott * Since we only actually need the first 4 or 5 bits for all register values on 1001*df0e68c1SIan Abbott * NI select registers anyways, we'll identify all values >= (1<<15) as being an 1002*df0e68c1SIan Abbott * abstracted NI signal/terminal name. 1003*df0e68c1SIan Abbott * These values are also used/returned by INSN_DEVICE_CONFIG_TEST_ROUTE, 1004*df0e68c1SIan Abbott * INSN_DEVICE_CONFIG_CONNECT_ROUTE, INSN_DEVICE_CONFIG_DISCONNECT_ROUTE, 1005*df0e68c1SIan Abbott * and INSN_DEVICE_CONFIG_GET_ROUTES. 1006*df0e68c1SIan Abbott */ 1007*df0e68c1SIan Abbott #define NI_NAMES_BASE 0x8000u 1008*df0e68c1SIan Abbott 1009*df0e68c1SIan Abbott #define _TERM_N(base, n, x) ((base) + ((x) & ((n) - 1))) 1010*df0e68c1SIan Abbott 1011*df0e68c1SIan Abbott /* 1012*df0e68c1SIan Abbott * not necessarily all allowed 64 PFIs are valid--certainly not for all devices 1013*df0e68c1SIan Abbott */ 1014*df0e68c1SIan Abbott #define NI_PFI(x) _TERM_N(NI_NAMES_BASE, 64, x) 1015*df0e68c1SIan Abbott /* 8 trigger lines by standard, Some devices cannot talk to all eight. */ 1016*df0e68c1SIan Abbott #define TRIGGER_LINE(x) _TERM_N(NI_PFI(-1) + 1, 8, x) 1017*df0e68c1SIan Abbott /* 4 RTSI shared MUXes to route signals to/from TRIGGER_LINES on NI hardware */ 1018*df0e68c1SIan Abbott #define NI_RTSI_BRD(x) _TERM_N(TRIGGER_LINE(-1) + 1, 4, x) 1019*df0e68c1SIan Abbott 1020*df0e68c1SIan Abbott /* *** Counter/timer names : 8 counters max *** */ 1021*df0e68c1SIan Abbott #define NI_MAX_COUNTERS 8 1022*df0e68c1SIan Abbott #define NI_COUNTER_NAMES_BASE (NI_RTSI_BRD(-1) + 1) 1023*df0e68c1SIan Abbott #define NI_CtrSource(x) _TERM_N(NI_COUNTER_NAMES_BASE, NI_MAX_COUNTERS, x) 1024*df0e68c1SIan Abbott /* Gate, Aux, A,B,Z are all treated, at times as gates */ 1025*df0e68c1SIan Abbott #define NI_GATES_NAMES_BASE (NI_CtrSource(-1) + 1) 1026*df0e68c1SIan Abbott #define NI_CtrGate(x) _TERM_N(NI_GATES_NAMES_BASE, NI_MAX_COUNTERS, x) 1027*df0e68c1SIan Abbott #define NI_CtrAux(x) _TERM_N(NI_CtrGate(-1) + 1, NI_MAX_COUNTERS, x) 1028*df0e68c1SIan Abbott #define NI_CtrA(x) _TERM_N(NI_CtrAux(-1) + 1, NI_MAX_COUNTERS, x) 1029*df0e68c1SIan Abbott #define NI_CtrB(x) _TERM_N(NI_CtrA(-1) + 1, NI_MAX_COUNTERS, x) 1030*df0e68c1SIan Abbott #define NI_CtrZ(x) _TERM_N(NI_CtrB(-1) + 1, NI_MAX_COUNTERS, x) 1031*df0e68c1SIan Abbott #define NI_GATES_NAMES_MAX NI_CtrZ(-1) 1032*df0e68c1SIan Abbott #define NI_CtrArmStartTrigger(x) _TERM_N(NI_CtrZ(-1) + 1, NI_MAX_COUNTERS, x) 1033*df0e68c1SIan Abbott #define NI_CtrInternalOutput(x) \ 1034*df0e68c1SIan Abbott _TERM_N(NI_CtrArmStartTrigger(-1) + 1, NI_MAX_COUNTERS, x) 1035*df0e68c1SIan Abbott /** external pin(s) labeled conveniently as Ctr<i>Out. */ 1036*df0e68c1SIan Abbott #define NI_CtrOut(x) _TERM_N(NI_CtrInternalOutput(-1) + 1, NI_MAX_COUNTERS, x) 1037*df0e68c1SIan Abbott /** For Buffered sampling of ctr -- x series capability. */ 1038*df0e68c1SIan Abbott #define NI_CtrSampleClock(x) _TERM_N(NI_CtrOut(-1) + 1, NI_MAX_COUNTERS, x) 1039*df0e68c1SIan Abbott #define NI_COUNTER_NAMES_MAX NI_CtrSampleClock(-1) 1040*df0e68c1SIan Abbott 1041*df0e68c1SIan Abbott enum ni_common_signal_names { 1042*df0e68c1SIan Abbott /* PXI_Star: this is a non-NI-specific signal */ 1043*df0e68c1SIan Abbott PXI_Star = NI_COUNTER_NAMES_MAX + 1, 1044*df0e68c1SIan Abbott PXI_Clk10, 1045*df0e68c1SIan Abbott PXIe_Clk100, 1046*df0e68c1SIan Abbott NI_AI_SampleClock, 1047*df0e68c1SIan Abbott NI_AI_SampleClockTimebase, 1048*df0e68c1SIan Abbott NI_AI_StartTrigger, 1049*df0e68c1SIan Abbott NI_AI_ReferenceTrigger, 1050*df0e68c1SIan Abbott NI_AI_ConvertClock, 1051*df0e68c1SIan Abbott NI_AI_ConvertClockTimebase, 1052*df0e68c1SIan Abbott NI_AI_PauseTrigger, 1053*df0e68c1SIan Abbott NI_AI_HoldCompleteEvent, 1054*df0e68c1SIan Abbott NI_AI_HoldComplete, 1055*df0e68c1SIan Abbott NI_AI_ExternalMUXClock, 1056*df0e68c1SIan Abbott NI_AI_STOP, /* pulse signal that occurs when a update is finished(?) */ 1057*df0e68c1SIan Abbott NI_AO_SampleClock, 1058*df0e68c1SIan Abbott NI_AO_SampleClockTimebase, 1059*df0e68c1SIan Abbott NI_AO_StartTrigger, 1060*df0e68c1SIan Abbott NI_AO_PauseTrigger, 1061*df0e68c1SIan Abbott NI_DI_SampleClock, 1062*df0e68c1SIan Abbott NI_DI_SampleClockTimebase, 1063*df0e68c1SIan Abbott NI_DI_StartTrigger, 1064*df0e68c1SIan Abbott NI_DI_ReferenceTrigger, 1065*df0e68c1SIan Abbott NI_DI_PauseTrigger, 1066*df0e68c1SIan Abbott NI_DI_InputBufferFull, 1067*df0e68c1SIan Abbott NI_DI_ReadyForStartEvent, 1068*df0e68c1SIan Abbott NI_DI_ReadyForTransferEventBurst, 1069*df0e68c1SIan Abbott NI_DI_ReadyForTransferEventPipelined, 1070*df0e68c1SIan Abbott NI_DO_SampleClock, 1071*df0e68c1SIan Abbott NI_DO_SampleClockTimebase, 1072*df0e68c1SIan Abbott NI_DO_StartTrigger, 1073*df0e68c1SIan Abbott NI_DO_PauseTrigger, 1074*df0e68c1SIan Abbott NI_DO_OutputBufferFull, 1075*df0e68c1SIan Abbott NI_DO_DataActiveEvent, 1076*df0e68c1SIan Abbott NI_DO_ReadyForStartEvent, 1077*df0e68c1SIan Abbott NI_DO_ReadyForTransferEvent, 1078*df0e68c1SIan Abbott NI_MasterTimebase, 1079*df0e68c1SIan Abbott NI_20MHzTimebase, 1080*df0e68c1SIan Abbott NI_80MHzTimebase, 1081*df0e68c1SIan Abbott NI_100MHzTimebase, 1082*df0e68c1SIan Abbott NI_200MHzTimebase, 1083*df0e68c1SIan Abbott NI_100kHzTimebase, 1084*df0e68c1SIan Abbott NI_10MHzRefClock, 1085*df0e68c1SIan Abbott NI_FrequencyOutput, 1086*df0e68c1SIan Abbott NI_ChangeDetectionEvent, 1087*df0e68c1SIan Abbott NI_AnalogComparisonEvent, 1088*df0e68c1SIan Abbott NI_WatchdogExpiredEvent, 1089*df0e68c1SIan Abbott NI_WatchdogExpirationTrigger, 1090*df0e68c1SIan Abbott NI_SCXI_Trig1, 1091*df0e68c1SIan Abbott NI_LogicLow, 1092*df0e68c1SIan Abbott NI_LogicHigh, 1093*df0e68c1SIan Abbott NI_ExternalStrobe, 1094*df0e68c1SIan Abbott NI_PFI_DO, 1095*df0e68c1SIan Abbott NI_CaseGround, 1096*df0e68c1SIan Abbott /* special internal signal used as variable source for RTSI bus: */ 1097*df0e68c1SIan Abbott NI_RGOUT0, 1098*df0e68c1SIan Abbott 1099*df0e68c1SIan Abbott /* just a name to make the next more convenient, regardless of above */ 1100*df0e68c1SIan Abbott _NI_NAMES_MAX_PLUS_1, 1101*df0e68c1SIan Abbott NI_NUM_NAMES = _NI_NAMES_MAX_PLUS_1 - NI_NAMES_BASE, 1102*df0e68c1SIan Abbott }; 1103*df0e68c1SIan Abbott 1104*df0e68c1SIan Abbott /* *** END GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */ 1105*df0e68c1SIan Abbott 1106*df0e68c1SIan Abbott #define NI_USUAL_PFI_SELECT(x) (((x) < 10) ? (0x1 + (x)) : (0xb + (x))) 1107*df0e68c1SIan Abbott #define NI_USUAL_RTSI_SELECT(x) (((x) < 7) ? (0xb + (x)) : 0x1b) 1108*df0e68c1SIan Abbott 1109*df0e68c1SIan Abbott /* 1110*df0e68c1SIan Abbott * mode bits for NI general-purpose counters, set with 1111*df0e68c1SIan Abbott * INSN_CONFIG_SET_COUNTER_MODE 1112*df0e68c1SIan Abbott */ 1113*df0e68c1SIan Abbott #define NI_GPCT_COUNTING_MODE_SHIFT 16 1114*df0e68c1SIan Abbott #define NI_GPCT_INDEX_PHASE_BITSHIFT 20 1115*df0e68c1SIan Abbott #define NI_GPCT_COUNTING_DIRECTION_SHIFT 24 1116*df0e68c1SIan Abbott enum ni_gpct_mode_bits { 1117*df0e68c1SIan Abbott NI_GPCT_GATE_ON_BOTH_EDGES_BIT = 0x4, 1118*df0e68c1SIan Abbott NI_GPCT_EDGE_GATE_MODE_MASK = 0x18, 1119*df0e68c1SIan Abbott NI_GPCT_EDGE_GATE_STARTS_STOPS_BITS = 0x0, 1120*df0e68c1SIan Abbott NI_GPCT_EDGE_GATE_STOPS_STARTS_BITS = 0x8, 1121*df0e68c1SIan Abbott NI_GPCT_EDGE_GATE_STARTS_BITS = 0x10, 1122*df0e68c1SIan Abbott NI_GPCT_EDGE_GATE_NO_STARTS_NO_STOPS_BITS = 0x18, 1123*df0e68c1SIan Abbott NI_GPCT_STOP_MODE_MASK = 0x60, 1124*df0e68c1SIan Abbott NI_GPCT_STOP_ON_GATE_BITS = 0x00, 1125*df0e68c1SIan Abbott NI_GPCT_STOP_ON_GATE_OR_TC_BITS = 0x20, 1126*df0e68c1SIan Abbott NI_GPCT_STOP_ON_GATE_OR_SECOND_TC_BITS = 0x40, 1127*df0e68c1SIan Abbott NI_GPCT_LOAD_B_SELECT_BIT = 0x80, 1128*df0e68c1SIan Abbott NI_GPCT_OUTPUT_MODE_MASK = 0x300, 1129*df0e68c1SIan Abbott NI_GPCT_OUTPUT_TC_PULSE_BITS = 0x100, 1130*df0e68c1SIan Abbott NI_GPCT_OUTPUT_TC_TOGGLE_BITS = 0x200, 1131*df0e68c1SIan Abbott NI_GPCT_OUTPUT_TC_OR_GATE_TOGGLE_BITS = 0x300, 1132*df0e68c1SIan Abbott NI_GPCT_HARDWARE_DISARM_MASK = 0xc00, 1133*df0e68c1SIan Abbott NI_GPCT_NO_HARDWARE_DISARM_BITS = 0x000, 1134*df0e68c1SIan Abbott NI_GPCT_DISARM_AT_TC_BITS = 0x400, 1135*df0e68c1SIan Abbott NI_GPCT_DISARM_AT_GATE_BITS = 0x800, 1136*df0e68c1SIan Abbott NI_GPCT_DISARM_AT_TC_OR_GATE_BITS = 0xc00, 1137*df0e68c1SIan Abbott NI_GPCT_LOADING_ON_TC_BIT = 0x1000, 1138*df0e68c1SIan Abbott NI_GPCT_LOADING_ON_GATE_BIT = 0x4000, 1139*df0e68c1SIan Abbott NI_GPCT_COUNTING_MODE_MASK = 0x7 << NI_GPCT_COUNTING_MODE_SHIFT, 1140*df0e68c1SIan Abbott NI_GPCT_COUNTING_MODE_NORMAL_BITS = 1141*df0e68c1SIan Abbott 0x0 << NI_GPCT_COUNTING_MODE_SHIFT, 1142*df0e68c1SIan Abbott NI_GPCT_COUNTING_MODE_QUADRATURE_X1_BITS = 1143*df0e68c1SIan Abbott 0x1 << NI_GPCT_COUNTING_MODE_SHIFT, 1144*df0e68c1SIan Abbott NI_GPCT_COUNTING_MODE_QUADRATURE_X2_BITS = 1145*df0e68c1SIan Abbott 0x2 << NI_GPCT_COUNTING_MODE_SHIFT, 1146*df0e68c1SIan Abbott NI_GPCT_COUNTING_MODE_QUADRATURE_X4_BITS = 1147*df0e68c1SIan Abbott 0x3 << NI_GPCT_COUNTING_MODE_SHIFT, 1148*df0e68c1SIan Abbott NI_GPCT_COUNTING_MODE_TWO_PULSE_BITS = 1149*df0e68c1SIan Abbott 0x4 << NI_GPCT_COUNTING_MODE_SHIFT, 1150*df0e68c1SIan Abbott NI_GPCT_COUNTING_MODE_SYNC_SOURCE_BITS = 1151*df0e68c1SIan Abbott 0x6 << NI_GPCT_COUNTING_MODE_SHIFT, 1152*df0e68c1SIan Abbott NI_GPCT_INDEX_PHASE_MASK = 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT, 1153*df0e68c1SIan Abbott NI_GPCT_INDEX_PHASE_LOW_A_LOW_B_BITS = 1154*df0e68c1SIan Abbott 0x0 << NI_GPCT_INDEX_PHASE_BITSHIFT, 1155*df0e68c1SIan Abbott NI_GPCT_INDEX_PHASE_LOW_A_HIGH_B_BITS = 1156*df0e68c1SIan Abbott 0x1 << NI_GPCT_INDEX_PHASE_BITSHIFT, 1157*df0e68c1SIan Abbott NI_GPCT_INDEX_PHASE_HIGH_A_LOW_B_BITS = 1158*df0e68c1SIan Abbott 0x2 << NI_GPCT_INDEX_PHASE_BITSHIFT, 1159*df0e68c1SIan Abbott NI_GPCT_INDEX_PHASE_HIGH_A_HIGH_B_BITS = 1160*df0e68c1SIan Abbott 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT, 1161*df0e68c1SIan Abbott NI_GPCT_INDEX_ENABLE_BIT = 0x400000, 1162*df0e68c1SIan Abbott NI_GPCT_COUNTING_DIRECTION_MASK = 1163*df0e68c1SIan Abbott 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT, 1164*df0e68c1SIan Abbott NI_GPCT_COUNTING_DIRECTION_DOWN_BITS = 1165*df0e68c1SIan Abbott 0x00 << NI_GPCT_COUNTING_DIRECTION_SHIFT, 1166*df0e68c1SIan Abbott NI_GPCT_COUNTING_DIRECTION_UP_BITS = 1167*df0e68c1SIan Abbott 0x1 << NI_GPCT_COUNTING_DIRECTION_SHIFT, 1168*df0e68c1SIan Abbott NI_GPCT_COUNTING_DIRECTION_HW_UP_DOWN_BITS = 1169*df0e68c1SIan Abbott 0x2 << NI_GPCT_COUNTING_DIRECTION_SHIFT, 1170*df0e68c1SIan Abbott NI_GPCT_COUNTING_DIRECTION_HW_GATE_BITS = 1171*df0e68c1SIan Abbott 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT, 1172*df0e68c1SIan Abbott NI_GPCT_RELOAD_SOURCE_MASK = 0xc000000, 1173*df0e68c1SIan Abbott NI_GPCT_RELOAD_SOURCE_FIXED_BITS = 0x0, 1174*df0e68c1SIan Abbott NI_GPCT_RELOAD_SOURCE_SWITCHING_BITS = 0x4000000, 1175*df0e68c1SIan Abbott NI_GPCT_RELOAD_SOURCE_GATE_SELECT_BITS = 0x8000000, 1176*df0e68c1SIan Abbott NI_GPCT_OR_GATE_BIT = 0x10000000, 1177*df0e68c1SIan Abbott NI_GPCT_INVERT_OUTPUT_BIT = 0x20000000 1178*df0e68c1SIan Abbott }; 1179*df0e68c1SIan Abbott 1180*df0e68c1SIan Abbott /* 1181*df0e68c1SIan Abbott * Bits for setting a clock source with 1182*df0e68c1SIan Abbott * INSN_CONFIG_SET_CLOCK_SRC when using NI general-purpose counters. 1183*df0e68c1SIan Abbott */ 1184*df0e68c1SIan Abbott enum ni_gpct_clock_source_bits { 1185*df0e68c1SIan Abbott NI_GPCT_CLOCK_SRC_SELECT_MASK = 0x3f, 1186*df0e68c1SIan Abbott NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS = 0x0, 1187*df0e68c1SIan Abbott NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS = 0x1, 1188*df0e68c1SIan Abbott NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS = 0x2, 1189*df0e68c1SIan Abbott NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3, 1190*df0e68c1SIan Abbott NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4, 1191*df0e68c1SIan Abbott NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5, 1192*df0e68c1SIan Abbott /* NI 660x-specific */ 1193*df0e68c1SIan Abbott NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6, 1194*df0e68c1SIan Abbott NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7, 1195*df0e68c1SIan Abbott NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8, 1196*df0e68c1SIan Abbott NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9, 1197*df0e68c1SIan Abbott NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000, 1198*df0e68c1SIan Abbott NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0, 1199*df0e68c1SIan Abbott /* divide source by 2 */ 1200*df0e68c1SIan Abbott NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000, 1201*df0e68c1SIan Abbott /* divide source by 8 */ 1202*df0e68c1SIan Abbott NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000, 1203*df0e68c1SIan Abbott NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000 1204*df0e68c1SIan Abbott }; 1205*df0e68c1SIan Abbott 1206*df0e68c1SIan Abbott /* NI 660x-specific */ 1207*df0e68c1SIan Abbott #define NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(x) (0x10 + (x)) 1208*df0e68c1SIan Abbott 1209*df0e68c1SIan Abbott #define NI_GPCT_RTSI_CLOCK_SRC_BITS(x) (0x18 + (x)) 1210*df0e68c1SIan Abbott 1211*df0e68c1SIan Abbott /* no pfi on NI 660x */ 1212*df0e68c1SIan Abbott #define NI_GPCT_PFI_CLOCK_SRC_BITS(x) (0x20 + (x)) 1213*df0e68c1SIan Abbott 1214*df0e68c1SIan Abbott /* 1215*df0e68c1SIan Abbott * Possibilities for setting a gate source with 1216*df0e68c1SIan Abbott * INSN_CONFIG_SET_GATE_SRC when using NI general-purpose counters. 1217*df0e68c1SIan Abbott * May be bitwise-or'd with CR_EDGE or CR_INVERT. 1218*df0e68c1SIan Abbott */ 1219*df0e68c1SIan Abbott enum ni_gpct_gate_select { 1220*df0e68c1SIan Abbott /* m-series gates */ 1221*df0e68c1SIan Abbott NI_GPCT_TIMESTAMP_MUX_GATE_SELECT = 0x0, 1222*df0e68c1SIan Abbott NI_GPCT_AI_START2_GATE_SELECT = 0x12, 1223*df0e68c1SIan Abbott NI_GPCT_PXI_STAR_TRIGGER_GATE_SELECT = 0x13, 1224*df0e68c1SIan Abbott NI_GPCT_NEXT_OUT_GATE_SELECT = 0x14, 1225*df0e68c1SIan Abbott NI_GPCT_AI_START1_GATE_SELECT = 0x1c, 1226*df0e68c1SIan Abbott NI_GPCT_NEXT_SOURCE_GATE_SELECT = 0x1d, 1227*df0e68c1SIan Abbott NI_GPCT_ANALOG_TRIGGER_OUT_GATE_SELECT = 0x1e, 1228*df0e68c1SIan Abbott NI_GPCT_LOGIC_LOW_GATE_SELECT = 0x1f, 1229*df0e68c1SIan Abbott /* more gates for 660x */ 1230*df0e68c1SIan Abbott NI_GPCT_SOURCE_PIN_i_GATE_SELECT = 0x100, 1231*df0e68c1SIan Abbott NI_GPCT_GATE_PIN_i_GATE_SELECT = 0x101, 1232*df0e68c1SIan Abbott /* more gates for 660x "second gate" */ 1233*df0e68c1SIan Abbott NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT = 0x201, 1234*df0e68c1SIan Abbott NI_GPCT_SELECTED_GATE_GATE_SELECT = 0x21e, 1235*df0e68c1SIan Abbott /* 1236*df0e68c1SIan Abbott * m-series "second gate" sources are unknown, 1237*df0e68c1SIan Abbott * we should add them here with an offset of 0x300 when 1238*df0e68c1SIan Abbott * known. 1239*df0e68c1SIan Abbott */ 1240*df0e68c1SIan Abbott NI_GPCT_DISABLED_GATE_SELECT = 0x8000, 1241*df0e68c1SIan Abbott }; 1242*df0e68c1SIan Abbott 1243*df0e68c1SIan Abbott #define NI_GPCT_GATE_PIN_GATE_SELECT(x) (0x102 + (x)) 1244*df0e68c1SIan Abbott #define NI_GPCT_RTSI_GATE_SELECT(x) NI_USUAL_RTSI_SELECT(x) 1245*df0e68c1SIan Abbott #define NI_GPCT_PFI_GATE_SELECT(x) NI_USUAL_PFI_SELECT(x) 1246*df0e68c1SIan Abbott #define NI_GPCT_UP_DOWN_PIN_GATE_SELECT(x) (0x202 + (x)) 1247*df0e68c1SIan Abbott 1248*df0e68c1SIan Abbott /* 1249*df0e68c1SIan Abbott * Possibilities for setting a source with 1250*df0e68c1SIan Abbott * INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters. 1251*df0e68c1SIan Abbott */ 1252*df0e68c1SIan Abbott enum ni_gpct_other_index { 1253*df0e68c1SIan Abbott NI_GPCT_SOURCE_ENCODER_A, 1254*df0e68c1SIan Abbott NI_GPCT_SOURCE_ENCODER_B, 1255*df0e68c1SIan Abbott NI_GPCT_SOURCE_ENCODER_Z 1256*df0e68c1SIan Abbott }; 1257*df0e68c1SIan Abbott 1258*df0e68c1SIan Abbott enum ni_gpct_other_select { 1259*df0e68c1SIan Abbott /* m-series gates */ 1260*df0e68c1SIan Abbott /* Still unknown, probably only need NI_GPCT_PFI_OTHER_SELECT */ 1261*df0e68c1SIan Abbott NI_GPCT_DISABLED_OTHER_SELECT = 0x8000, 1262*df0e68c1SIan Abbott }; 1263*df0e68c1SIan Abbott 1264*df0e68c1SIan Abbott #define NI_GPCT_PFI_OTHER_SELECT(x) NI_USUAL_PFI_SELECT(x) 1265*df0e68c1SIan Abbott 1266*df0e68c1SIan Abbott /* 1267*df0e68c1SIan Abbott * start sources for ni general-purpose counters for use with 1268*df0e68c1SIan Abbott * INSN_CONFIG_ARM 1269*df0e68c1SIan Abbott */ 1270*df0e68c1SIan Abbott enum ni_gpct_arm_source { 1271*df0e68c1SIan Abbott NI_GPCT_ARM_IMMEDIATE = 0x0, 1272*df0e68c1SIan Abbott /* 1273*df0e68c1SIan Abbott * Start both the counter and the adjacent paired counter simultaneously 1274*df0e68c1SIan Abbott */ 1275*df0e68c1SIan Abbott NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1, 1276*df0e68c1SIan Abbott /* 1277*df0e68c1SIan Abbott * If the NI_GPCT_HW_ARM bit is set, we will pass the least significant 1278*df0e68c1SIan Abbott * bits (3 bits for 660x or 5 bits for m-series) through to the 1279*df0e68c1SIan Abbott * hardware. To select a hardware trigger, pass the appropriate select 1280*df0e68c1SIan Abbott * bit, e.g., 1281*df0e68c1SIan Abbott * NI_GPCT_HW_ARM | NI_GPCT_AI_START1_GATE_SELECT or 1282*df0e68c1SIan Abbott * NI_GPCT_HW_ARM | NI_GPCT_PFI_GATE_SELECT(pfi_number) 1283*df0e68c1SIan Abbott */ 1284*df0e68c1SIan Abbott NI_GPCT_HW_ARM = 0x1000, 1285*df0e68c1SIan Abbott NI_GPCT_ARM_UNKNOWN = NI_GPCT_HW_ARM, /* for backward compatibility */ 1286*df0e68c1SIan Abbott }; 1287*df0e68c1SIan Abbott 1288*df0e68c1SIan Abbott /* digital filtering options for ni 660x for use with INSN_CONFIG_FILTER. */ 1289*df0e68c1SIan Abbott enum ni_gpct_filter_select { 1290*df0e68c1SIan Abbott NI_GPCT_FILTER_OFF = 0x0, 1291*df0e68c1SIan Abbott NI_GPCT_FILTER_TIMEBASE_3_SYNC = 0x1, 1292*df0e68c1SIan Abbott NI_GPCT_FILTER_100x_TIMEBASE_1 = 0x2, 1293*df0e68c1SIan Abbott NI_GPCT_FILTER_20x_TIMEBASE_1 = 0x3, 1294*df0e68c1SIan Abbott NI_GPCT_FILTER_10x_TIMEBASE_1 = 0x4, 1295*df0e68c1SIan Abbott NI_GPCT_FILTER_2x_TIMEBASE_1 = 0x5, 1296*df0e68c1SIan Abbott NI_GPCT_FILTER_2x_TIMEBASE_3 = 0x6 1297*df0e68c1SIan Abbott }; 1298*df0e68c1SIan Abbott 1299*df0e68c1SIan Abbott /* 1300*df0e68c1SIan Abbott * PFI digital filtering options for ni m-series for use with 1301*df0e68c1SIan Abbott * INSN_CONFIG_FILTER. 1302*df0e68c1SIan Abbott */ 1303*df0e68c1SIan Abbott enum ni_pfi_filter_select { 1304*df0e68c1SIan Abbott NI_PFI_FILTER_OFF = 0x0, 1305*df0e68c1SIan Abbott NI_PFI_FILTER_125ns = 0x1, 1306*df0e68c1SIan Abbott NI_PFI_FILTER_6425ns = 0x2, 1307*df0e68c1SIan Abbott NI_PFI_FILTER_2550us = 0x3 1308*df0e68c1SIan Abbott }; 1309*df0e68c1SIan Abbott 1310*df0e68c1SIan Abbott /* master clock sources for ni mio boards and INSN_CONFIG_SET_CLOCK_SRC */ 1311*df0e68c1SIan Abbott enum ni_mio_clock_source { 1312*df0e68c1SIan Abbott NI_MIO_INTERNAL_CLOCK = 0, 1313*df0e68c1SIan Abbott /* 1314*df0e68c1SIan Abbott * Doesn't work for m-series, use NI_MIO_PLL_RTSI_CLOCK() 1315*df0e68c1SIan Abbott * the NI_MIO_PLL_* sources are m-series only 1316*df0e68c1SIan Abbott */ 1317*df0e68c1SIan Abbott NI_MIO_RTSI_CLOCK = 1, 1318*df0e68c1SIan Abbott NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK = 2, 1319*df0e68c1SIan Abbott NI_MIO_PLL_PXI10_CLOCK = 3, 1320*df0e68c1SIan Abbott NI_MIO_PLL_RTSI0_CLOCK = 4 1321*df0e68c1SIan Abbott }; 1322*df0e68c1SIan Abbott 1323*df0e68c1SIan Abbott #define NI_MIO_PLL_RTSI_CLOCK(x) (NI_MIO_PLL_RTSI0_CLOCK + (x)) 1324*df0e68c1SIan Abbott 1325*df0e68c1SIan Abbott /* 1326*df0e68c1SIan Abbott * Signals which can be routed to an NI RTSI pin with INSN_CONFIG_SET_ROUTING. 1327*df0e68c1SIan Abbott * The numbers assigned are not arbitrary, they correspond to the bits required 1328*df0e68c1SIan Abbott * to program the board. 1329*df0e68c1SIan Abbott */ 1330*df0e68c1SIan Abbott enum ni_rtsi_routing { 1331*df0e68c1SIan Abbott NI_RTSI_OUTPUT_ADR_START1 = 0, 1332*df0e68c1SIan Abbott NI_RTSI_OUTPUT_ADR_START2 = 1, 1333*df0e68c1SIan Abbott NI_RTSI_OUTPUT_SCLKG = 2, 1334*df0e68c1SIan Abbott NI_RTSI_OUTPUT_DACUPDN = 3, 1335*df0e68c1SIan Abbott NI_RTSI_OUTPUT_DA_START1 = 4, 1336*df0e68c1SIan Abbott NI_RTSI_OUTPUT_G_SRC0 = 5, 1337*df0e68c1SIan Abbott NI_RTSI_OUTPUT_G_GATE0 = 6, 1338*df0e68c1SIan Abbott NI_RTSI_OUTPUT_RGOUT0 = 7, 1339*df0e68c1SIan Abbott NI_RTSI_OUTPUT_RTSI_BRD_0 = 8, 1340*df0e68c1SIan Abbott /* Pre-m-series always have RTSI clock on line 7 */ 1341*df0e68c1SIan Abbott NI_RTSI_OUTPUT_RTSI_OSC = 12 1342*df0e68c1SIan Abbott }; 1343*df0e68c1SIan Abbott 1344*df0e68c1SIan Abbott #define NI_RTSI_OUTPUT_RTSI_BRD(x) (NI_RTSI_OUTPUT_RTSI_BRD_0 + (x)) 1345*df0e68c1SIan Abbott 1346*df0e68c1SIan Abbott /* 1347*df0e68c1SIan Abbott * Signals which can be routed to an NI PFI pin on an m-series board with 1348*df0e68c1SIan Abbott * INSN_CONFIG_SET_ROUTING. These numbers are also returned by 1349*df0e68c1SIan Abbott * INSN_CONFIG_GET_ROUTING on pre-m-series boards, even though their routing 1350*df0e68c1SIan Abbott * cannot be changed. The numbers assigned are not arbitrary, they correspond 1351*df0e68c1SIan Abbott * to the bits required to program the board. 1352*df0e68c1SIan Abbott */ 1353*df0e68c1SIan Abbott enum ni_pfi_routing { 1354*df0e68c1SIan Abbott NI_PFI_OUTPUT_PFI_DEFAULT = 0, 1355*df0e68c1SIan Abbott NI_PFI_OUTPUT_AI_START1 = 1, 1356*df0e68c1SIan Abbott NI_PFI_OUTPUT_AI_START2 = 2, 1357*df0e68c1SIan Abbott NI_PFI_OUTPUT_AI_CONVERT = 3, 1358*df0e68c1SIan Abbott NI_PFI_OUTPUT_G_SRC1 = 4, 1359*df0e68c1SIan Abbott NI_PFI_OUTPUT_G_GATE1 = 5, 1360*df0e68c1SIan Abbott NI_PFI_OUTPUT_AO_UPDATE_N = 6, 1361*df0e68c1SIan Abbott NI_PFI_OUTPUT_AO_START1 = 7, 1362*df0e68c1SIan Abbott NI_PFI_OUTPUT_AI_START_PULSE = 8, 1363*df0e68c1SIan Abbott NI_PFI_OUTPUT_G_SRC0 = 9, 1364*df0e68c1SIan Abbott NI_PFI_OUTPUT_G_GATE0 = 10, 1365*df0e68c1SIan Abbott NI_PFI_OUTPUT_EXT_STROBE = 11, 1366*df0e68c1SIan Abbott NI_PFI_OUTPUT_AI_EXT_MUX_CLK = 12, 1367*df0e68c1SIan Abbott NI_PFI_OUTPUT_GOUT0 = 13, 1368*df0e68c1SIan Abbott NI_PFI_OUTPUT_GOUT1 = 14, 1369*df0e68c1SIan Abbott NI_PFI_OUTPUT_FREQ_OUT = 15, 1370*df0e68c1SIan Abbott NI_PFI_OUTPUT_PFI_DO = 16, 1371*df0e68c1SIan Abbott NI_PFI_OUTPUT_I_ATRIG = 17, 1372*df0e68c1SIan Abbott NI_PFI_OUTPUT_RTSI0 = 18, 1373*df0e68c1SIan Abbott NI_PFI_OUTPUT_PXI_STAR_TRIGGER_IN = 26, 1374*df0e68c1SIan Abbott NI_PFI_OUTPUT_SCXI_TRIG1 = 27, 1375*df0e68c1SIan Abbott NI_PFI_OUTPUT_DIO_CHANGE_DETECT_RTSI = 28, 1376*df0e68c1SIan Abbott NI_PFI_OUTPUT_CDI_SAMPLE = 29, 1377*df0e68c1SIan Abbott NI_PFI_OUTPUT_CDO_UPDATE = 30 1378*df0e68c1SIan Abbott }; 1379*df0e68c1SIan Abbott 1380*df0e68c1SIan Abbott #define NI_PFI_OUTPUT_RTSI(x) (NI_PFI_OUTPUT_RTSI0 + (x)) 1381*df0e68c1SIan Abbott 1382*df0e68c1SIan Abbott /* 1383*df0e68c1SIan Abbott * Signals which can be routed to output on a NI PFI pin on a 660x board 1384*df0e68c1SIan Abbott * with INSN_CONFIG_SET_ROUTING. The numbers assigned are 1385*df0e68c1SIan Abbott * not arbitrary, they correspond to the bits required 1386*df0e68c1SIan Abbott * to program the board. Lines 0 to 7 can only be set to 1387*df0e68c1SIan Abbott * NI_660X_PFI_OUTPUT_DIO. Lines 32 to 39 can only be set to 1388*df0e68c1SIan Abbott * NI_660X_PFI_OUTPUT_COUNTER. 1389*df0e68c1SIan Abbott */ 1390*df0e68c1SIan Abbott enum ni_660x_pfi_routing { 1391*df0e68c1SIan Abbott NI_660X_PFI_OUTPUT_COUNTER = 1, /* counter */ 1392*df0e68c1SIan Abbott NI_660X_PFI_OUTPUT_DIO = 2, /* static digital output */ 1393*df0e68c1SIan Abbott }; 1394*df0e68c1SIan Abbott 1395*df0e68c1SIan Abbott /* 1396*df0e68c1SIan Abbott * NI External Trigger lines. These values are not arbitrary, but are related 1397*df0e68c1SIan Abbott * to the bits required to program the board (offset by 1 for historical 1398*df0e68c1SIan Abbott * reasons). 1399*df0e68c1SIan Abbott */ 1400*df0e68c1SIan Abbott #define NI_EXT_PFI(x) (NI_USUAL_PFI_SELECT(x) - 1) 1401*df0e68c1SIan Abbott #define NI_EXT_RTSI(x) (NI_USUAL_RTSI_SELECT(x) - 1) 1402*df0e68c1SIan Abbott 1403*df0e68c1SIan Abbott /* 1404*df0e68c1SIan Abbott * Clock sources for CDIO subdevice on NI m-series boards. Used as the 1405*df0e68c1SIan Abbott * scan_begin_arg for a comedi_command. These sources may also be bitwise-or'd 1406*df0e68c1SIan Abbott * with CR_INVERT to change polarity. 1407*df0e68c1SIan Abbott */ 1408*df0e68c1SIan Abbott enum ni_m_series_cdio_scan_begin_src { 1409*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_GROUND = 0, 1410*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_AI_START = 18, 1411*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_AI_CONVERT = 19, 1412*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_PXI_STAR_TRIGGER = 20, 1413*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_G0_OUT = 28, 1414*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_G1_OUT = 29, 1415*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_ANALOG_TRIGGER = 30, 1416*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_AO_UPDATE = 31, 1417*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_FREQ_OUT = 32, 1418*df0e68c1SIan Abbott NI_CDIO_SCAN_BEGIN_SRC_DIO_CHANGE_DETECT_IRQ = 33 1419*df0e68c1SIan Abbott }; 1420*df0e68c1SIan Abbott 1421*df0e68c1SIan Abbott #define NI_CDIO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x) 1422*df0e68c1SIan Abbott #define NI_CDIO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x) 1423*df0e68c1SIan Abbott 1424*df0e68c1SIan Abbott /* 1425*df0e68c1SIan Abbott * scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command on NI 1426*df0e68c1SIan Abbott * boards. These scan begin sources can also be bitwise-or'd with CR_INVERT to 1427*df0e68c1SIan Abbott * change polarity. 1428*df0e68c1SIan Abbott */ 1429*df0e68c1SIan Abbott #define NI_AO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x) 1430*df0e68c1SIan Abbott #define NI_AO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x) 1431*df0e68c1SIan Abbott 1432*df0e68c1SIan Abbott /* 1433*df0e68c1SIan Abbott * Bits for setting a clock source with 1434*df0e68c1SIan Abbott * INSN_CONFIG_SET_CLOCK_SRC when using NI frequency output subdevice. 1435*df0e68c1SIan Abbott */ 1436*df0e68c1SIan Abbott enum ni_freq_out_clock_source_bits { 1437*df0e68c1SIan Abbott NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC, /* 10 MHz */ 1438*df0e68c1SIan Abbott NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC /* 100 KHz */ 1439*df0e68c1SIan Abbott }; 1440*df0e68c1SIan Abbott 1441*df0e68c1SIan Abbott /* 1442*df0e68c1SIan Abbott * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for 1443*df0e68c1SIan Abbott * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). 1444*df0e68c1SIan Abbott */ 1445*df0e68c1SIan Abbott enum amplc_dio_clock_source { 1446*df0e68c1SIan Abbott /* 1447*df0e68c1SIan Abbott * Per channel external clock 1448*df0e68c1SIan Abbott * input/output pin (pin is only an 1449*df0e68c1SIan Abbott * input when clock source set to this value, 1450*df0e68c1SIan Abbott * otherwise it is an output) 1451*df0e68c1SIan Abbott */ 1452*df0e68c1SIan Abbott AMPLC_DIO_CLK_CLKN, 1453*df0e68c1SIan Abbott AMPLC_DIO_CLK_10MHZ, /* 10 MHz internal clock */ 1454*df0e68c1SIan Abbott AMPLC_DIO_CLK_1MHZ, /* 1 MHz internal clock */ 1455*df0e68c1SIan Abbott AMPLC_DIO_CLK_100KHZ, /* 100 kHz internal clock */ 1456*df0e68c1SIan Abbott AMPLC_DIO_CLK_10KHZ, /* 10 kHz internal clock */ 1457*df0e68c1SIan Abbott AMPLC_DIO_CLK_1KHZ, /* 1 kHz internal clock */ 1458*df0e68c1SIan Abbott /* 1459*df0e68c1SIan Abbott * Output of preceding counter channel 1460*df0e68c1SIan Abbott * (for channel 0, preceding counter 1461*df0e68c1SIan Abbott * channel is channel 2 on preceding 1462*df0e68c1SIan Abbott * counter subdevice, for first counter 1463*df0e68c1SIan Abbott * subdevice, preceding counter 1464*df0e68c1SIan Abbott * subdevice is the last counter 1465*df0e68c1SIan Abbott * subdevice) 1466*df0e68c1SIan Abbott */ 1467*df0e68c1SIan Abbott AMPLC_DIO_CLK_OUTNM1, 1468*df0e68c1SIan Abbott AMPLC_DIO_CLK_EXT, /* per chip external input pin */ 1469*df0e68c1SIan Abbott /* the following are "enhanced" clock sources for PCIe models */ 1470*df0e68c1SIan Abbott AMPLC_DIO_CLK_VCC, /* clock input HIGH */ 1471*df0e68c1SIan Abbott AMPLC_DIO_CLK_GND, /* clock input LOW */ 1472*df0e68c1SIan Abbott AMPLC_DIO_CLK_PAT_PRESENT, /* "pattern present" signal */ 1473*df0e68c1SIan Abbott AMPLC_DIO_CLK_20MHZ /* 20 MHz internal clock */ 1474*df0e68c1SIan Abbott }; 1475*df0e68c1SIan Abbott 1476*df0e68c1SIan Abbott /* 1477*df0e68c1SIan Abbott * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for 1478*df0e68c1SIan Abbott * timer subdevice on some Amplicon DIO PCIe boards (amplc_dio200 driver). 1479*df0e68c1SIan Abbott */ 1480*df0e68c1SIan Abbott enum amplc_dio_ts_clock_src { 1481*df0e68c1SIan Abbott AMPLC_DIO_TS_CLK_1GHZ, /* 1 ns period with 20 ns granularity */ 1482*df0e68c1SIan Abbott AMPLC_DIO_TS_CLK_1MHZ, /* 1 us period */ 1483*df0e68c1SIan Abbott AMPLC_DIO_TS_CLK_1KHZ /* 1 ms period */ 1484*df0e68c1SIan Abbott }; 1485*df0e68c1SIan Abbott 1486*df0e68c1SIan Abbott /* 1487*df0e68c1SIan Abbott * Values for setting a gate source with INSN_CONFIG_SET_GATE_SRC for 1488*df0e68c1SIan Abbott * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). 1489*df0e68c1SIan Abbott */ 1490*df0e68c1SIan Abbott enum amplc_dio_gate_source { 1491*df0e68c1SIan Abbott AMPLC_DIO_GAT_VCC, /* internal high logic level */ 1492*df0e68c1SIan Abbott AMPLC_DIO_GAT_GND, /* internal low logic level */ 1493*df0e68c1SIan Abbott AMPLC_DIO_GAT_GATN, /* per channel external gate input */ 1494*df0e68c1SIan Abbott /* 1495*df0e68c1SIan Abbott * negated output of counter channel minus 2 1496*df0e68c1SIan Abbott * (for channels 0 or 1, channel minus 2 is channel 1 or 2 on 1497*df0e68c1SIan Abbott * the preceding counter subdevice, for the first counter subdevice 1498*df0e68c1SIan Abbott * the preceding counter subdevice is the last counter subdevice) 1499*df0e68c1SIan Abbott */ 1500*df0e68c1SIan Abbott AMPLC_DIO_GAT_NOUTNM2, 1501*df0e68c1SIan Abbott AMPLC_DIO_GAT_RESERVED4, 1502*df0e68c1SIan Abbott AMPLC_DIO_GAT_RESERVED5, 1503*df0e68c1SIan Abbott AMPLC_DIO_GAT_RESERVED6, 1504*df0e68c1SIan Abbott AMPLC_DIO_GAT_RESERVED7, 1505*df0e68c1SIan Abbott /* the following are "enhanced" gate sources for PCIe models */ 1506*df0e68c1SIan Abbott AMPLC_DIO_GAT_NGATN = 6, /* negated per channel gate input */ 1507*df0e68c1SIan Abbott /* non-negated output of counter channel minus 2 */ 1508*df0e68c1SIan Abbott AMPLC_DIO_GAT_OUTNM2, 1509*df0e68c1SIan Abbott AMPLC_DIO_GAT_PAT_PRESENT, /* "pattern present" signal */ 1510*df0e68c1SIan Abbott AMPLC_DIO_GAT_PAT_OCCURRED, /* "pattern occurred" latched */ 1511*df0e68c1SIan Abbott AMPLC_DIO_GAT_PAT_GONE, /* "pattern gone away" latched */ 1512*df0e68c1SIan Abbott AMPLC_DIO_GAT_NPAT_PRESENT, /* negated "pattern present" */ 1513*df0e68c1SIan Abbott AMPLC_DIO_GAT_NPAT_OCCURRED, /* negated "pattern occurred" */ 1514*df0e68c1SIan Abbott AMPLC_DIO_GAT_NPAT_GONE /* negated "pattern gone away" */ 1515*df0e68c1SIan Abbott }; 1516*df0e68c1SIan Abbott 1517*df0e68c1SIan Abbott /* 1518*df0e68c1SIan Abbott * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for 1519*df0e68c1SIan Abbott * the counter subdevice on the Kolter Electronic PCI-Counter board 1520*df0e68c1SIan Abbott * (ke_counter driver). 1521*df0e68c1SIan Abbott */ 1522*df0e68c1SIan Abbott enum ke_counter_clock_source { 1523*df0e68c1SIan Abbott KE_CLK_20MHZ, /* internal 20MHz (default) */ 1524*df0e68c1SIan Abbott KE_CLK_4MHZ, /* internal 4MHz (option) */ 1525*df0e68c1SIan Abbott KE_CLK_EXT /* external clock on pin 21 of D-Sub */ 1526*df0e68c1SIan Abbott }; 1527*df0e68c1SIan Abbott 1528*df0e68c1SIan Abbott #endif /* _COMEDI_H */ 1529