Searched +full:sm6375 +full:- +full:gcc (Results 1 – 12 of 12) sorted by relevance
/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | qcom,sm6375-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6375-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SM6375 Display MDSS 10 - Konrad Dybcio <konradybcio@kernel.org> 13 SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6375-mdss 24 - description: Display AHB clock from gcc [all …]
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H A D | qcom,sc7180-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 12 $ref: /schemas/display/msm/dpu-common.yaml# 17 - qcom,sc7180-dpu 18 - qcom,sm6125-dpu 19 - qcom,sm6350-dpu 20 - qcom,sm6375-dpu [all …]
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H A D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 15 - items: 16 - enum: 17 - qcom,apq8064-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,sm6375-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on SM6375 10 - Konrad Dybcio <konradybcio@kernel.org> 14 domains on SM6375 16 See also:: include/dt-bindings/clock/qcom,sm6375-gcc.h 19 - $ref: qcom,gcc.yaml# 23 const: qcom,sm6375-gcc [all …]
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H A D | qcom,sm6375-dispcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-dispcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display Clock & Reset Controller on SM6375 10 - Konrad Dybcio <konradybcio@kernel.org> 14 domains on SM6375. 16 See also:: include/dt-bindings/clock/qcom,dispcc-sm6375.h 19 - $ref: qcom,gcc.yaml# 23 const: qcom,sm6375-dispcc [all …]
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H A D | qcom,sm6375-gpucc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Graphics Clock & Reset Controller on SM6375 10 - Konrad Dybcio <konradybcio@kernel.org> 16 See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h 21 - qcom,sm6375-gpucc 25 - description: Board XO source 26 - description: GPLL0 main branch source [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sm6375.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmcc.h> 7 #include <dt-bindings/clock/qcom,sm6375-gcc.h> 8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h> 9 #include <dt-bindings/dma/qcom-gpi.h> 10 #include <dt-bindings/firmware/qcom,scm.h> 11 #include <dt-bindings/interconnect/qcom,osm-l3.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/mailbox/qcom-ipcc.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> [all …]
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H A D | sm6375-sony-xperia-murray-pdx225.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include "sm6375.dtsi" 18 /delete-node/ &pmk8350_pon; 22 compatible = "sony,pdx225", "qcom,sm6375"; 23 chassis-type = "handset"; 26 #address-cells = <2>; 27 #size-cells = <2>; 31 compatible = "simple-framebuffer"; [all …]
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/linux/drivers/clk/qcom/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 996 tristate "SM6375 Display Clock Controller" 1001 SM6375 devices. 1062 tristate "SM6375 Global Clock Controller" 1066 Support for the global clock controller on SM6375 devices. 1161 tristate "SM6375 Graphics Clock Controller" 1165 Support for the graphics clock controller on SM6375 devices. 1321 tristate "High-Frequency PLL (HFPLL) Clock Controller" 1323 Support for the high-frequency PLLs present on Qualcomm devices. 1330 Support for the Krait ACC and GCC clock controllers. Say Y
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H A D | gcc-sm6375.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/clk-provider.h> 13 #include <dt-bindings/clock/qcom,sm6375-gcc.h> 15 #include "clk-alpha-pll.h" 16 #include "clk-branch.h" 17 #include "clk-rcg.h" 18 #include "clk-regmap.h" 19 #include "clk-regmap-divider.h" 20 #include "clk-regmap-mux.h" 21 #include "clk-regmap-phy-mux.h" [all …]
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/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,osm-l3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sibi Sankar <quic_sibis@quicinc.com> 20 - items: 21 - enum: 22 - qcom,sc7180-osm-l3 23 - qcom,sc8180x-osm-l3 24 - qcom,sdm670-osm-l3 [all …]
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