Lines Matching +full:sm6375 +full:- +full:gcc

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Krishna Manikandan <quic_mkrishn@quicinc.com>
12 $ref: /schemas/display/msm/dpu-common.yaml#
17       - qcom,sc7180-dpu
18       - qcom,sm6125-dpu
19       - qcom,sm6350-dpu
20       - qcom,sm6375-dpu
24       - description: Address offset and size for mdp register set
25       - description: Address offset and size for vbif register set
27   reg-names:
29       - const: mdp
30       - const: vbif
35       - description: Display hf axi clock
36       - description: Display ahb clock
37       - description: Display rotator clock
38       - description: Display lut clock
39       - description: Display core clock
40       - description: Display vsync clock
41       - description: Display core throttle clock
43   clock-names:
46       - const: bus
47       - const: iface
48       - const: rot
49       - const: lut
50       - const: core
51       - const: vsync
52       - const: throttle
55   - compatible
56   - reg
57   - reg-names
58   - clocks
59   - clock-names
64   - if:
68             - qcom,sm6375-dpu
69             - qcom,sm6125-dpu
76         clock-names:
80   - |
81     #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
82     #include <dt-bindings/clock/qcom,gcc-sc7180.h>
83     #include <dt-bindings/power/qcom-rpmpd.h>
85     display-controller@ae01000 {
86         compatible = "qcom,sc7180-dpu";
90         reg-names = "mdp", "vbif";
92         clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
98         clock-names = "bus", "iface", "rot", "lut", "core",
101         interrupt-parent = <&mdss>;
103         power-domains = <&rpmhpd SC7180_CX>;
104         operating-points-v2 = <&mdp_opp_table>;
107             #address-cells = <1>;
108             #size-cells = <0>;
113                     remote-endpoint = <&dsi0_in>;
120                     remote-endpoint = <&dp_in>;