Lines Matching +full:sm6375 +full:- +full:gcc

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller on SM6375
10   - Konrad Dybcio <konradybcio@kernel.org>
14   domains on SM6375.
16   See also:: include/dt-bindings/clock/qcom,dispcc-sm6375.h
19   - $ref: qcom,gcc.yaml#
23     const: qcom,sm6375-dispcc
27       - description: Board XO source
28       - description: GPLL0 source from GCC
29       - description: Byte clock from DSI PHY
30       - description: Pixel clock from DSI PHY
33   - compatible
34   - clocks
39   - |
40     #include <dt-bindings/clock/qcom,sm6375-gcc.h>
41     #include <dt-bindings/clock/qcom,rpmh.h>
43     clock-controller@5f00000 {
44       compatible = "qcom,sm6375-dispcc";
47                <&gcc GCC_DISP_GPLL0_CLK_SRC>,
50       #clock-cells = <1>;
51       #reset-cells = <1>;
52       #power-domain-cells = <1>;