Lines Matching +full:sm6375 +full:- +full:gcc

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM6375
10   - Konrad Dybcio <konradybcio@kernel.org>
16   See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h
21       - qcom,sm6375-gpucc
25       - description: Board XO source
26       - description: GPLL0 main branch source
27       - description: GPLL0 div branch source
28       - description: SNoC DVM GFX source
30   power-domains:
35   required-opps:
41   - compatible
42   - clocks
43   - power-domains
44   - required-opps
47   - $ref: qcom,gcc.yaml#
52   - |
53     #include <dt-bindings/clock/qcom,sm6375-gcc.h>
54     #include <dt-bindings/clock/qcom,rpmcc.h>
55     #include <dt-bindings/power/qcom-rpmpd.h>
58         #address-cells = <2>;
59         #size-cells = <2>;
61         clock-controller@5990000 {
62             compatible = "qcom,sm6375-gpucc";
65                      <&gcc GCC_GPU_GPLL0_CLK_SRC>,
66                      <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>,
67                      <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
68             power-domains = <&rpmpd SM6375_VDDGX>;
69             required-opps = <&rpmpd_opp_low_svs>;
70             #clock-cells = <1>;
71             #reset-cells = <1>;
72             #power-domain-cells = <1>;